diff options
| author | Vanguput, Narendra K <narendra.k.vanguput@intel.com> | 2019-04-01 16:16:01 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2019-04-04 14:00:32 +0800 |
| commit | 37f9fea5b88d2aa0cc702e1b315a1b939447eb01 (patch) | |
| tree | b92cc51affc7c139525c8ab838046a4fdcfdffe4 /UefiCpuPkg | |
| parent | e4ff6349bf9ee4f3f392141374901ea4994e043e (diff) | |
| download | edk2-37f9fea5b88d2aa0cc702e1b315a1b939447eb01.tar.gz | |
UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1593
For every SMI occurrence, save and restore CR2 register only when SMM
on-demand paging support is enabled in 64 bit operation mode.
This is not a bug but to have better improvement of code.
Patch5 is updated with separate functions for Save and Restore of CR2
based on review feedback.
Patch6 - Removed Global Cr2 instead used function parameter.
Patch7 - Removed checking Cr2 with 0 as per feedback.
Patch8 and 9 - Aligned with EDK2 Coding style.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vanguput Narendra K <narendra.k.vanguput@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 26 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 9 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 30 |
4 files changed, 84 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c index b734a1ea8c..d1e146a70c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c @@ -316,3 +316,29 @@ SetPageTableAttributes ( return ;
}
+
+/**
+ This function returns with no action for 32 bit.
+
+ @param[out] *Cr2 Pointer to variable to hold CR2 register value.
+**/
+VOID
+SaveCr2 (
+ OUT UINTN *Cr2
+ )
+{
+ return ;
+}
+
+/**
+ This function returns with no action for 32 bit.
+
+ @param[in] Cr2 Value to write into CR2 register.
+**/
+VOID
+RestoreCr2 (
+ IN UINTN Cr2
+ )
+{
+ return ;
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 3b0b3b52ac..ce70f77709 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -1112,9 +1112,11 @@ SmiRendezvous ( ASSERT(CpuIndex < mMaxNumberOfCpus);
//
- // Save Cr2 because Page Fault exception in SMM may override its value
+ // Save Cr2 because Page Fault exception in SMM may override its value,
+ // when using on-demand paging for above 4G memory.
//
- Cr2 = AsmReadCr2 ();
+ Cr2 = 0;
+ SaveCr2 (&Cr2);
//
// Perform CPU specific entry hooks
@@ -1253,10 +1255,11 @@ SmiRendezvous ( Exit:
SmmCpuFeaturesRendezvousExit (CpuIndex);
+
//
// Restore Cr2
//
- AsmWriteCr2 (Cr2);
+ RestoreCr2 (Cr2);
}
/**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 84efb22981..38f9104117 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -1243,4 +1243,26 @@ EFIAPI PiSmmCpuSmiEntryFixupAddress (
);
+/**
+ This function reads CR2 register when on-demand paging is enabled
+ for 64 bit and no action for 32 bit.
+
+ @param[out] *Cr2 Pointer to variable to hold CR2 register value.
+**/
+VOID
+SaveCr2 (
+ OUT UINTN *Cr2
+ );
+
+/**
+ This function writes into CR2 register when on-demand paging is enabled
+ for 64 bit and no action for 32 bit.
+
+ @param[in] Cr2 Value to write into CR2 register.
+**/
+VOID
+RestoreCr2 (
+ IN UINTN Cr2
+ );
+
#endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c index 2c77cb47a4..95eaf0b016 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -1053,3 +1053,33 @@ SetPageTableAttributes ( return ;
}
+
+/**
+ This function reads CR2 register when on-demand paging is enabled.
+
+ @param[out] *Cr2 Pointer to variable to hold CR2 register value.
+**/
+VOID
+SaveCr2 (
+ OUT UINTN *Cr2
+ )
+{
+ if (!mCpuSmmStaticPageTable) {
+ *Cr2 = AsmReadCr2 ();
+ }
+}
+
+/**
+ This function restores CR2 register when on-demand paging is enabled.
+
+ @param[in] Cr2 Value to write into CR2 register.
+**/
+VOID
+RestoreCr2 (
+ IN UINTN Cr2
+ )
+{
+ if (!mCpuSmmStaticPageTable) {
+ AsmWriteCr2 (Cr2);
+ }
+}
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