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authorJiaxin Wu <jiaxin.wu@intel.com>2024-05-31 14:37:43 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-06-14 07:02:37 +0000
commitcb3134612d11102fe066c94c8fa7edb20d62c1a8 (patch)
treeb4ad5f2cecc6d3ddbbc4d482a3069f5d7ad3f04b /UefiCpuPkg
parentaf2bbe1b79251f46efaca2ed36860105272dd14f (diff)
downloadedk2-cb3134612d11102fe066c94c8fa7edb20d62c1a8.tar.gz
UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdCpuSmmApSyncTimeout2
This patch is to consume the PcdCpuSmmApSyncTimeout2 to enhance the flexibility of timeout configuration. In some cases, certain processors may not be able to enter SMI, and prolonged waiting could lead to kernel soft/hard lockup. We have now defined two timeouts. The first timeout can be set to a smaller value to reduce the waiting period. Processors that are unable to enter SMI will be woken up through SMIIPL to enter SMI, followed by a second waiting period. The second timeout can be set to a larger value to prevent delays in processors entering SMI case due to the long instruction execution. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c10
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h11
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf1
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c19
4 files changed, 28 insertions, 13 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 10baf3ceb9..570e99177f 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1,7 +1,7 @@
/** @file
SMM MP service implementation
-Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -268,7 +268,7 @@ SmmWaitForApArrival (
// Sync with APs 1st timeout
//
for (Timer = StartSyncTimer ();
- !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal);
+ !IsSyncTimerTimeout (Timer, mTimeoutTicker) && !(LmceEn && LmceSignal);
)
{
mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();
@@ -309,7 +309,7 @@ SmmWaitForApArrival (
// Sync with APs 2nd timeout.
//
for (Timer = StartSyncTimer ();
- !IsSyncTimerTimeout (Timer);
+ !IsSyncTimerTimeout (Timer, mTimeoutTicker2);
)
{
mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();
@@ -736,7 +736,7 @@ APHandler (
// Timeout BSP
//
for (Timer = StartSyncTimer ();
- !IsSyncTimerTimeout (Timer) &&
+ !IsSyncTimerTimeout (Timer, mTimeoutTicker) &&
!(*mSmmMpSyncData->InsideSmm);
)
{
@@ -764,7 +764,7 @@ APHandler (
// Now clock BSP for the 2nd time
//
for (Timer = StartSyncTimer ();
- !IsSyncTimerTimeout (Timer) &&
+ !IsSyncTimerTimeout (Timer, mTimeoutTicker2) &&
!(*mSmmMpSyncData->InsideSmm);
)
{
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 315a33d578..8409891b1d 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -471,6 +471,9 @@ extern BOOLEAN mSmmDebugAgentSupport;
//
extern UINT64 mAddressEncMask;
+extern UINT64 mTimeoutTicker;
+extern UINT64 mTimeoutTicker2;
+
/**
Create 4G PageTable in SMRAM.
@@ -533,15 +536,17 @@ StartSyncTimer (
);
/**
- Check if the SMM AP Sync timer is timeout.
+ Check if the SMM AP Sync Timer is timeout specified by Timeout.
- @param Timer The start timer from the begin.
+ @param Timer The start timer from the begin.
+ @param Timeout The timeout ticker to wait.
**/
BOOLEAN
EFIAPI
IsSyncTimerTimeout (
- IN UINT64 Timer
+ IN UINT64 Timer,
+ IN UINT64 Timeout
);
/**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
index f0598b0364..3c4518da7b 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
@@ -134,6 +134,7 @@
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize ## SOMETIMES_CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout2 ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## SOMETIMES_PRODUCES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode ## CONSUMES
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c
index 0c070c5736..8d29ba7326 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SyncTimer.c
@@ -1,7 +1,7 @@
/** @file
SMM Timer feature support
-Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -9,6 +9,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PiSmmCpuDxeSmm.h"
UINT64 mTimeoutTicker = 0;
+
+UINT64 mTimeoutTicker2 = 0;
+
//
// Number of counts in a roll-over cycle of the performance counter.
//
@@ -36,6 +39,10 @@ InitializeSmmTimer (
MultU64x64 (TimerFrequency, PcdGet64 (PcdCpuSmmApSyncTimeout)),
1000 * 1000
);
+ mTimeoutTicker2 = DivU64x32 (
+ MultU64x64 (TimerFrequency, PcdGet64 (PcdCpuSmmApSyncTimeout2)),
+ 1000 * 1000
+ );
if (End < Start) {
mCountDown = TRUE;
mCycle = Start - End;
@@ -59,15 +66,17 @@ StartSyncTimer (
}
/**
- Check if the SMM AP Sync timer is timeout.
+ Check if the SMM AP Sync Timer is timeout specified by Timeout.
- @param Timer The start timer from the begin.
+ @param Timer The start timer from the begin.
+ @param Timeout The timeout ticker to wait.
**/
BOOLEAN
EFIAPI
IsSyncTimerTimeout (
- IN UINT64 Timer
+ IN UINT64 Timer,
+ IN UINT64 Timeout
)
{
UINT64 CurrentTimer;
@@ -105,5 +114,5 @@ IsSyncTimerTimeout (
}
}
- return (BOOLEAN)(Delta >= mTimeoutTicker);
+ return (BOOLEAN)(Delta >= Timeout);
}