diff options
author | Dun Tan <dun.tan@intel.com> | 2024-02-05 11:35:59 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-02-06 08:51:48 +0000 |
commit | ae59b8ba4166384cbfa32a921aac289bcff2aef9 (patch) | |
tree | 80d0d01d9e8fa3311ebb55089f1a7eef78a1f8be /pip-requirements.txt | |
parent | 397a084b9ba159050825447db2b6a1177195d0be (diff) | |
download | edk2-ae59b8ba4166384cbfa32a921aac289bcff2aef9.tar.gz |
UefiCpuPkg/PiSmmCpuDxeSmm:Map SMRAM in 4K page granularity
This patch is to map SMRAM in 4K page granularity
during SMM page table initialization(SmmInitPageTable)
so as to avoid the SMRAM paging-structure layout
change when SMI happens (PerformRemainingTasks).
The reason is to avoid the Paging-Structure change
impact to the multiple Processors. Refer SDM section
"4.10.4" & "4.10.5".
Currently, SMM BSP needs to update the SMRAM range
paging attribute in smm page table according to the
SmmMemoryAttributesTable when SMM ready to lock
happens. If the SMRAM range is not 4k mapped in page
table, the page table update process may split 1G/2M
paging entries to 4k ones.Meanwhile, all APs are still
running in SMI, which might access the affected
linear-address range between the time of modification
and the time of invalidation access. That will be
a potential problem leading exception happens.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'pip-requirements.txt')
0 files changed, 0 insertions, 0 deletions