diff options
Diffstat (limited to 'IntelFsp2WrapperPkg')
| -rw-r--r-- | IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 38 | ||||
| -rw-r--r-- | IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 3 | ||||
| -rw-r--r-- | IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 34 |
3 files changed, 50 insertions, 25 deletions
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c index 7f1deb9542..d9fbb21417 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
- Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -38,6 +38,7 @@ #include <FspStatusCode.h>
#include <FspGlobalData.h>
#include <Library/FspCommonLib.h>
+#include <Guid/MigratedFvInfo.h>
extern EFI_GUID gFspHobGuid;
@@ -278,18 +279,41 @@ TcgPpiNotify ( IN VOID *Ppi
)
{
- UINT32 FspMeasureMask;
+ UINT32 FspMeasureMask;
+ EFI_PHYSICAL_ADDRESS FsptBaseAddress;
+ EFI_PHYSICAL_ADDRESS FspmBaseAddress;
+ EDKII_MIGRATED_FV_INFO *MigratedFvInfo;
+ EFI_PEI_HOB_POINTERS Hob;
DEBUG ((DEBUG_INFO, "TcgPpiNotify FSPM\n"));
- FspMeasureMask = PcdGet32 (PcdFspMeasurementConfig);
+ FspMeasureMask = PcdGet32 (PcdFspMeasurementConfig);
+ FsptBaseAddress = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFsptBaseAddress);
+ FspmBaseAddress = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFspmBaseAddress);
+ Hob.Raw = GetFirstGuidHob (&gEdkiiMigratedFvInfoGuid);
+ while (Hob.Raw != NULL) {
+ MigratedFvInfo = GET_GUID_HOB_DATA (Hob);
+ if ((MigratedFvInfo->FvOrgBase == PcdGet32 (PcdFsptBaseAddress)) && (MigratedFvInfo->FvDataBase != 0)) {
+ //
+ // Found the migrated FspT raw data
+ //
+ FsptBaseAddress = MigratedFvInfo->FvDataBase;
+ }
+
+ if ((MigratedFvInfo->FvOrgBase == PcdGet32 (PcdFspmBaseAddress)) && (MigratedFvInfo->FvDataBase != 0)) {
+ FspmBaseAddress = MigratedFvInfo->FvDataBase;
+ }
+
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ Hob.Raw = GetNextGuidHob (&gEdkiiMigratedFvInfoGuid, Hob.Raw);
+ }
if ((FspMeasureMask & FSP_MEASURE_FSPT) != 0) {
MeasureFspFirmwareBlob (
0,
"FSPT",
- PcdGet32 (PcdFsptBaseAddress),
- (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFsptBaseAddress))->FvLength
+ FsptBaseAddress,
+ (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FsptBaseAddress)->FvLength
);
}
@@ -297,8 +321,8 @@ TcgPpiNotify ( MeasureFspFirmwareBlob (
0,
"FSPM",
- PcdGet32 (PcdFspmBaseAddress),
- (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspmBaseAddress))->FvLength
+ FspmBaseAddress,
+ (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FspmBaseAddress)->FvLength
);
}
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index 0307ce0acc..a0f384f992 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
# notify to call FspSiliconInit API.
#
-# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2024, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -69,6 +69,7 @@ [Guids]
gFspHobGuid ## PRODUCES ## HOB
gFspApiPerformanceGuid ## SOMETIMES_CONSUMES ## GUID
+ gEdkiiMigratedFvInfoGuid ## SOMETIMES_CONSUMES ## HOB
[Ppis]
gEdkiiTcgPpiGuid ## NOTIFY
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec index 922ccc063f..6865ffaf13 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -90,23 +90,6 @@ # @Prompt Skip FSP API from FSP wrapper.
gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
- ## This PCD decides how FSP is measured
- # 1) The BootGuard ACM may already measured the FSP component, such as FSPT/FSPM.
- # We need a flag (PCD) to indicate if there is need to do such FSP measurement or NOT.
- # 2) The FSP binary includes FSP code and FSP UPD region. The UPD region is considered
- # as configuration block, and it may be updated by OEM by design.
- # This flag (PCD) is to indicate if we need isolate the UPD region from the FSP code region.
- # BIT0: Need measure FSP. (for FSP1.x) - reserved in FSP2.
- # BIT1: Need measure FSPT. (for FSP 2.x)
- # BIT2: Need measure FSPM. (for FSP 2.x)
- # BIT3: Need measure FSPS. (for FSP 2.x)
- # BIT4~30: reserved.
- # BIT31: Need isolate UPD region measurement.
- #0: measure FSP[T|M|S] as one binary in one record (PCR0).
- #1: measure FSP UPD region in one record (PCR1), the FSP code without UPD in another record (PCR0).
- #
- gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig|0x00000000|UINT32|0x4000000B
-
[PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
## This PCD decides how Wrapper code utilizes FSP
# 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)
@@ -137,3 +120,20 @@ # Non-0 means PcdFspsUpdDataAddress will be ignored, otherwise PcdFspsUpdDataAddress will be used.
#
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress64|0x00000000|UINT64|0x50000003
+
+ ## This PCD decides how FSP is measured
+ # 1) The BootGuard ACM may already measured the FSP component, such as FSPT/FSPM.
+ # We need a flag (PCD) to indicate if there is need to do such FSP measurement or NOT.
+ # 2) The FSP binary includes FSP code and FSP UPD region. The UPD region is considered
+ # as configuration block, and it may be updated by OEM by design.
+ # This flag (PCD) is to indicate if we need isolate the UPD region from the FSP code region.
+ # BIT0: Need measure FSP. (for FSP1.x) - reserved in FSP2.
+ # BIT1: Need measure FSPT. (for FSP 2.x)
+ # BIT2: Need measure FSPM. (for FSP 2.x)
+ # BIT3: Need measure FSPS. (for FSP 2.x)
+ # BIT4~30: reserved.
+ # BIT31: Need isolate UPD region measurement.
+ #0: measure FSP[T|M|S] as one binary in one record (PCR0).
+ #1: measure FSP UPD region in one record (PCR1), the FSP code without UPD in another record (PCR0).
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig|0x00000000|UINT32|0x50000004
|