summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* ArmPlatformPkg: Drop bogus reference to MPCore related PCDArd Biesheuvel2024-08-012-4/+0
| | | | | | | The UniCore SEC implementations never bring up secondaries, so the PCD reference is bogus. Drop it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmVirtPkg: Drop bogus reference to MPCore related PCDArd Biesheuvel2024-08-011-5/+0
| | | | | | | Bringing up secondaries is out of scope for ArmVirtPkg, and the declared PCD reference is never actually made from the code. So drop it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* CryptoPkg: Enable Openssl Accel builds for AARCH64Pierre Gondois2024-08-012-18/+19
| | | | | | | | Enable the following modules builds for AARCH64: - OpensslLibAccel.inf - OpensslLibFullAccel.inf Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* CryptoPkg/OpensslLib: Add AArch64Cap for arch specific hooksPierre Gondois2024-08-013-0/+109
| | | | | | | | | | Add AARCH64 specific implementations of: - OPENSSL_cpuid_setup(), probing hardware capabilitie (presence of FEAT_AES, etc.) - OPENSSL_rdtsc(), returning non-trusted entropy by accessing system counter. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* CryptoPkg/OpensslLib: Generate files for AARCH64 native supportPierre Gondois2024-08-0113-2/+24978
| | | | | | | | Generate AARCH64 related files and update .inf files, running: python CryptoPkg/Library/OpensslLib/configure.py Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* CryptoPkg/OpensslLib: Add native instruction support for AARCH64Pierre Gondois2024-08-014-5/+53
| | | | | | Add native instruction support for AARCH64. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/BaseRngLib: Prefer ArmReadIdAA64Isar0Reg() over ArmReadIdIsar0()Pierre Gondois2024-08-015-82/+2
| | | | | | | | | | | | | | | A ArmReadIdAA64Isar0Reg() function was recently added to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent, which was private to the BaseRngLib library. This also allows to avoid the confusion between the following registers: - ID_ISAR0_EL1: allows to probe for Divide instructions, Debug instructions, ... - ID_AA64ISAR0_EL1: AARCH64 specific register allowing to probe for AESE, RNDR, ... instructions Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/BaseLib: AARCH64: Add ArmReadIdAA64Isar0Reg()Pierre Gondois2024-08-014-0/+134
| | | | | | | | | | | | | | To enable AARCH64 native instruction support for Openssl, some interfaces must be implemented. OPENSSL_cpuid_setup() allows to probe the supported features of the platform. Add ArmReadIdAA64Isar0Reg() to read the AA64Isar0, containing Arm64 instruction capabilities. A similar ArmReadIdAA64Isar0() function is available in the ArmPkg, but the CryptoPkg where OPENSSL_cpuid_setup will reside cannot rely on the ArmPkg. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/BaseLib: AARCH64: Add ArmReadCntPctReg()Pierre Gondois2024-08-014-1/+78
| | | | | | | | | | | | | To enable AARCH64 native instruction support for Openssl, some interfaces must be implemented. OPENSSL_rdtsc() requests an access to a counter to get some non-trusted entropy. Add ArmReadCntPctReg() to read system count. A similar ArmReadCntPct() function is available in the ArmPkg, but the CryptoPkg where OPENSSL_rdtsc will reside cannot rely on the ArmPkg. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* BaseTools/Scripts/BinToPcd.py: Update regex strings to use raw strings.Antaeus Kleinert-Strand2024-08-011-2/+2
| | | | | | | | | | | | With Python 3.12 invalid escape sequences now generate warning messages. This change fixes the problem exposed by the warning message. ``` BaseTools/Scripts\BinToPcd.py:40: SyntaxWarning: invalid escape sequence BaseTools\Scripts\BinToPcd.py:46: SyntaxWarning: invalid escape sequence ``` Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* MdePkg: Add PCI Express 6.0 Header SupportSachin Ganesh2024-08-013-22/+173
| | | | | | | | | | | | | | PCI Express 6.0 Specification introduces new registers and modifies fields in existing ones. This commit syncs PciE headers with the spec update. Cc: Sergiy Yakovlev <sergiyy@ami.com> Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
* MdePkg/Acpi65.h: Fix GUID valueMichael Kubacki2024-08-011-1/+1
| | | | | | | | | | Commit c5ef1f0 added Acpi65.h by copying and updating text from Acpi64.h. In that process, `0x624B` was updated to `0x6.5B` likely due to a find/replace regex being used. This restores the value. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* CodeQlQueries.qls: Pin to the 1.1.0 codeq/cpp-queries packMichael Kubacki2024-07-314-1/+22
| | | | | | | | | | | | The codeql/cpp-queries pack used in CodeQlQueries.qls was versioned 1.1.0 for the CodeQL CLI v2.18.1 release currently used. https://github.com/github/codeql/blob/codeql-cli/v2.18.1/cpp/ql/src/qlpack.yml This change pins that pack version to prevent the CodeQL CLI and pack from getting out of sync until explicitly updated. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* StandaloneMmPkg: Enable SmmLockBoxMmDependency.xieyuanh2024-07-311-1/+2
| | | | | | | | | | | | | | Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Cc: Dun Tan <dun.tan@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* StandaloneMmPkg: Add LockBox Dependency Libraryxieyuanh2024-07-312-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LockBox Dependency Library is designed for standalone MM environments where gBS are not accessible to indicates that LockBox API is readyfor use. For DXE drivers use lockbox APIs via a communication mechanism triggering an SMI, it's must to have the corresponding SMI handler pre-installed for interrupt management. To ensure orderly operations and proper notification, besides specified the guid in the [Depex] section of the .inf file. The installation of smi handler, along with the LockBox protocol marked by gEfiLockBoxProtocolGuid, must be informed to the DXE driver. This protocol installation signifies that the LockBox API is ready for use, and this functionality is implemented in the constructor of this library. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Cc: Dun Tan <dun.tan@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* OvmfPkg: Use heap memory for virtio-scsi requestSami Mujawar2024-07-311-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The storage space for virtio-scsi request header being shared with the host was from the stack as the request structure was a local function variable. A bug in the VMM can corrupt the stack space, and such issues can be very hard to debug. Note: This is only an issue with a normal guest VM (non-CCA). A CCA guest VM would perform bounce buffering for sharing the data and therefore not have this issue. Instead of using the stack for sharing the data with the host, memory can be allocated from the heap pool. However, pool allocations are not any safer in terms of pages being shared between different allocations, and so mapping a pool allocation for DMA may expose it to potential corruption by the VMM in exactly the same way. The only difference is the potential impact on program behaviour, which is much higher with the stack. Additionally, for guest-side corruption heap allocations can take advantage by turning on heap guard to help find the bug. Therefore, minor improvement can be achieved by allocating memory for the virtio-scsi request header from the heap for sharing with the host. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
* OvmfPkg: Use heap memory for virtio-blk requestSami Mujawar2024-07-311-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The storage space for virtio-blk request header being shared with the host was from the stack as the request structure was a local function variable. A bug in the VMM can corrupt the stack space, and such issues can be very hard to debug. Note: This is only an issue with a normal guest VM (non-CCA). A CCA guest VM would perform bounce buffering for sharing the data and therefore not have this issue. Instead of using the stack for sharing the data with the host, memory can be allocated from the heap pool. However, pool allocations are not any safer in terms of pages being shared between different allocations, and so mapping a pool allocation for DMA may expose it to potential corruption by the VMM in exactly the same way. The only difference is the potential impact on program behaviour, which is much higher with the stack. Additionally, for guest-side corruption heap allocations can take advantage by turning on heap guard to help find the bug. Therefore, minor improvement can be achieved by allocating memory for the virtio-blk request header from the heap for sharing with the host. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
* EmbeddedPkg: Retire EfiResetSystemLib and ResetRuntimeDxeArd Biesheuvel2024-07-317-282/+0
| | | | | | | | | Retire the ancient reset runtime DXE in EmbeddedPkg, and the associated EfiResetSystemLib library class and template implementation. These are incomplete and have been superseded by a generic implementation in MdeModulePkg. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/LoongArchVirtQemu: Drop bogus references to EfiResetSystemLibArd Biesheuvel2024-07-311-2/+0
| | | | | | | | These libraries do not implement EfiResetSystemLib to begin with, and this library class is going to be dropped. So drop these bogus references first. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* UefiCpuPkg: remove last instances of EFI_D_Leif Lindholm2024-07-311-2/+2
| | | | | | Change debug print levels to modern DEBUG_ format. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
* OvmfPkg: remove last instances of EFI_D_Leif Lindholm2024-07-312-2/+2
| | | | | | Change debug print levels to modern DEBUG_ format. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
* MdeModulePkg: NvmExpressDxe: Add Timeout Status CodesSean Brogan2024-07-311-0/+2
| | | | | | | Add Report status code events to Nvme to trigger when timeouts occur. This improves traceability when critical errors happen. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* MdeModulePkg/UfsPassThruDxe: Migrate UFS Initial Completion Timeout to PCDJason1 Lin2024-07-303-7/+8
| | | | | | | - Remove the hardcoded definition (UFS_INIT_COMPLETION_TIMEOUT) - Migrate the UFS initial completion timeout into PCD value Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg/UfsBlockIoPei: Migrate UFS Initial Completion Timeout to PCDJason1 Lin2024-07-303-7/+7
| | | | | | | - Remove the hardcoded definition (UFS_INIT_COMPLETION_TIMEOUT) - Migrate the UFS initial completion timeout into PCD value Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg: Add the PcdUfsInitialCompletionTimeout in DEC FileJason1 Lin2024-07-301-0/+5
| | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4820 - Add the PCD to indicate the UFS device initialize completion time - Default value of this PCD value is 600ms Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg: Optimize PEI Core Migration AlgorithmAwiral Shrivastava2024-07-303-9/+47
| | | | | | | | | | | | | | | | | | | | | REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4750 Migrate the FV that doesn't contain the currently executing PEI Core when permanent memory is initialized but PEI Core is still potentially running from faster memory (Tepmorary RAM). This may reduce the time required to migrate FVs to permanent memory. The FV containing PEI Core is migrated after the PEI Core reentry when it is executed from permanent memory. This may or may not improve performance depending on the behavior of temporary RAM and the actual performance changes must be measured with the feature enabled and disabled. This migration algorithm is only used for FVs specified in the gEdkiiMigrationInfoGuid HOB and built with flag FLAGS_FV_MIGRATE_BEFORE_PEI_CORE_REENTRY. Signed-off-by: Awiral Shrivastava <awiral.shrivastava@intel.com>
* BaseTools: fix build error with TOOL_CHAIN_TAG VS2015 & VS2015x86wilson_chen2024-07-302-4/+12
| | | | | | | | | | | | | | | | | | Start the build with TOOL_CHAIN_TAG VS2015 by launch: Build -t VS2015 ERROR: Would get following build error message: 'c:\Program' is not recognized as an internal or external command, operable program or batch file. NMAKE : fatal error U1077: '"c:\Program Files\Windows Kits\8.1\bin\x86\\rc.exe' : return code '0x1' Stop. Fix the build error, Tested : TOOL_CHAIN_TAG = VS2015 (>Build -t VS2015) TOOL_CHAIN_TAG = VS2015x86 (>Build -t VS2015x86) Signed-off-by: wilson_chen <wilson_chen@phoenix.com>
* MdePkg: IORT header update for IORT Rev E.f specAbhishek Mainkar2024-07-301-2/+3
| | | | | | | | | | | The IO Remapping Table, Platform Design Document, Revision E.f, April 2024 (https://developer.arm.com/documentation/den0049/ef/) added CANWBS Memory access flag. Therefore, update the IORT header file to add support for CANWBS Memory access flag. Signed-off-by: Abhishek Mainkar <abmainkar@nvidia.com>
* MdePkg: Update HEST Revision As 2Herman Li2024-07-301-1/+1
| | | | | | | | | This modification come from ACPI 6.5 spec. Besides, Starting with revision 2 of HEST, the Error Source Structures must be sorted in Type ascending order for Error Source Structure Types of less than 12. Signed-off-by: Herman Li <herman.li@intel.com>
* EmbeddedPkg: NonCoherentDmaLib: Set EFI_MEMORY_XP Capability on DMA BufferOliver Smith-Denny2024-07-291-4/+32
| | | | | | | | | | | | Commit 8984fba2f22a2cd44e1189403e3553f447b82852 added setting the EFI_MEMORY_XP attribute on DMA buffers. However, it did not ensure that the XP capability was set on that region. This patch adds setting the XP capability before attempting to set the attribute. If setting the capability fails, it defaults to the old behavior of not setting the XP bit. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* DynamicTablesPkg: Add EFIAPI to generators hooksPierre Gondois2024-07-296-4/+9
| | | | | | | | | | | | | For X64 builds, the EFIAPI is replaced by '(__attribute__((ms_abi))'. This might lead to build error for some ACPI tablte generators due to function prototype mismatch. Add the EFIAPI to ACPI table generator hooks: - ACPI_TABLE_GENERATOR_BUILD_TABLEEX - ACPI_TABLE_GENERATOR_FREE_TABLEEX Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Fix conversion compiler warningsPierre Gondois2024-07-293-11/+25
| | | | | | | | | | | | | | Some CM objects fields are wider than the targeted field in ACPI tables. Some assignments are also subject to data loss and trigger the following warnings: - '<': signed/unsigned mismatch - '=': conversion from 'UINTxx' to 'UINTyy', possible loss of data with xx > yy. Add checks/cast to remove the warnings. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Create wrapper to get INTC addr cellsPierre Gondois2024-07-294-2/+65
| | | | | | | | | | | Parent interrupt controller's address cells is arch specific. So, create a wrapper function which can be implemented differently for different archs. Move current implementation to ARM specific file. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Move IRQ map to arch folderPierre Gondois2024-07-293-71/+86
| | | | | | | | | | | The interrupts property in DT is arch specific. Move the current implementation and the way to decode the property to the Arm folder to prepare for other architecture support. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Move ArmLib.h to ArmGicCParser.cPierre Gondois2024-07-292-1/+1
| | | | | | | | | | ArmLib.h is required only for building GIC in ARM. So, move it to ARM specific file. Otherwise, FdtHwInfoParserInclude.h being a common header across architectures will have issue on other architectures. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Make Serial Port parser arch neutralPierre Gondois2024-07-294-15/+15
| | | | | | | | | To allow other architectures to potentially re-use the serial port parser and make the code arch neutral, remove the Arm prefixes. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Make Pci parser arch neutralPierre Gondois2024-07-294-22/+13
| | | | | | | | | | To allow other architectures to potentially re-use the serial port parser and make the code arch neutral, remove the Arm prefixes. Also remove the check searching for a GIC version. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Refactor to prepare for other archsPierre Gondois2024-07-294-82/+121
| | | | | | | | | | | | | To allow other architectures to potentially re-use the serial port parser and make the code arch neutral, make the MainDispatcher() function arch specific. Other architectures can choose which parse/dispatcher are desired to be called through the configuration of the HwInfoParserTable. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: FdtHwInfoParserLib: Move ARM parsers to Arm directoryPierre Gondois2024-07-2919-39/+39
| | | | | | | | | Create an Arm directory in the FdtHwInfoParserLib as a preparation step to support other architectures. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: DynamicTableManagerDxe: Refactor PresenceArrayPierre Gondois2024-07-295-50/+212
| | | | | | | | | | | | Mandatory ACPI tables depend on the architectures. Different architectures might also want to check other tables. Move mAcpiVerifyTables containing the list of ACPI tables to check to an arch specific file and introduce GetAcpiTablePresenceInfo() to get get the relevant information from the array. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSsdtCpuTopologyLib: Avoid dependency on GICCPierre Gondois2024-07-294-301/+647
| | | | | | | | | | | | | | | | The GICC is an ARM specific structure. Other architectures have different local interrupt controller structures from which CPU topology can be created. Avoid the GICC reference in common code by: - creating a wrapper CreateTopologyFromIntC() instead of CreateTopologyFromGicC() so that different archs can implement it differently. - implementing arch specific functions to get the AcpiProcessorUid, CpcToken, EtToken and use them instead of using the GicC CM object directly. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSratLib: Prepare to support other archsPierre Gondois2024-07-295-197/+424
| | | | | | | | Allow other architectures to reuse the AcpiSratLib by extracting the Arm specific part of the table generation. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiSpcrLib: Prepare to support other archsPierre Gondois2024-07-291-1/+1
| | | | | | | | Remove the Arm name from the generator to show the generator can be used by other archs. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiDbg2Lib: Prepare to support other archsPierre Gondois2024-07-295-7/+207
| | | | | | | | Allow other architectures to reuse the AcpiDbg2Lib by extracting the Arm specific part of the table generation. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AcpiFadtLib: Prepare to support other archsPierre Gondois2024-07-295-76/+225
| | | | | | | | | Allow other architectures to reuse the AcpiFadtLib by extracting the Arm specific part of the table generation. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Acpi: Prepare common libraries to support other archsPierre Gondois2024-07-2911-48/+23
| | | | | | | | | | | | Allow other architectures to reuse ACPI common libraries by: - Removing the Arm prefix from the BASE_NAME - Moving Arm specific libraries/packages to ARM/AARCH64 specific sections in the .inf files Also remove the empty .inf sections. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Acpi: Move generic libraries to common folderPierre Gondois2024-07-2927-26/+38
| | | | | | | | | | | | | | | | | | | | | | Some of the ACPI table generators are generic enough to be re-used by other architectures. Move the following generators to a 'Common' folder: - AcpiDbg2Lib - AcpiFadtLib - AcpiMcfgLib - AcpiPcctLib - AcpiPpttLib - AcpiRawLib - AcpiSpcrLib - AcpiSratLib - SsdtSerialPortLib - SsdtCpuTopologyLib - SsdtPcieLib and update DynamicTables.dsc.inc accordingly. Suggested-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Move PSD info to Arch CommonSami Mujawar2024-07-296-24/+23
| | | | | | | | | | | | | | | | | | | | | | | Move the PSD info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - SSDT CPU topology generator - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map. Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* DynamicTablesPkg: Move PCC Type 5 info to Arch CommonSami Mujawar2024-07-297-56/+55
| | | | | | | | | | | | | | | | | | | | | | | Move the PCC Subspace Type 5 info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - PCCT generator - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map. Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* DynamicTablesPkg: Move PCC Type 3 & 4 info to Arch CommonSami Mujawar2024-07-296-74/+72
| | | | | | | | | | | | | | | | | | | | | | | Move the PCC Subspace Type 3 & 4 info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - PCCT generator - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map. Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
generated by cgit (git 2.34.1) at 2025-02-23 05:05:06 +0000