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* .pytool: Sort the list of words in cspell.base.yamlRebecca Cran2024-08-011-234/+234
| | | | | | | Sort the list of words to add to cspell's dictionary by running the list through `sort`. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* .pytool: Add "MPIDR" to the list of known words in cspell.base.yamlRebecca Cran2024-08-011-1/+2
| | | | | | | | "MPIDR" is the Multiprocessor Affinity Register on Arm systems. Add it the list of known words so that cspell doesn't flag it as a misspelling. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* ShellPkg/AcpiView: Add MPAM ParserRohit Mathew2024-08-015-2/+1267
| | | | | | | | | | | | | | | Add a parser for the MPAM (Memory system resource partitioning and monitoring) ACPI table. This parser would parse all MPAM related structures embedded as part of the ACPI table. Necessary validations are also performed where and when required. Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Cc: James Morse <james.Morse@arm.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Thomas Abraham <thomas.abraham@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* ShellPkg: acpiview: Add routines to print reserved fieldsRohit Mathew2024-08-012-0/+164
| | | | | | | | | | | | | Most of the ACPI tables have fields that are marked reserved. Implement functions "DumpReserved" and "DumpReservedBits" aligning with the print-formatter prototype to print out reserved fields. Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Cc: James Morse <james.Morse@arm.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Thomas Abraham <thomas.abraham@arm.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ShellPkg: acpiview: Add routine to print 16 charsRohit Mathew2024-08-012-0/+57
| | | | | | | | | | | | | | | Certain ACPI tables like MPAM has fields which are 16 bytes long. Routines similar to Dump12Chars but for 16 characters are required to print such fields. Add Dump16Chars routine to satisfy this requirement. Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Cc: James Morse <james.Morse@arm.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Thomas Abraham <thomas.abraham@arm.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ShellPkg/AcpiView: Update print-formatter prototypeRohit Mathew2024-08-0112-36/+98
| | | | | | | | | | | | | | | | | As of now, the print-formatter implemented by the FNPTR_PRINT_FORMATTER function pointer takes two parameters, the format string and the pointer to the field. For cases where the print-formatter has to have access to the length of the field, there is no clean way to currently do it. In order to resolve this, update the print-formatter's prototype to take the length of the field as a third parameter. This change should improve the overall robustness and flexibility of AcpiView. Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Cc: James Morse <james.Morse@arm.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Thomas Abraham <thomas.abraham@arm.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* ShellPkg/AcpiView: Update field-validator prototypeRohit Mathew2024-08-0119-137/+266
| | | | | | | | | | | | | | | | | | | | | As of now, the field-validator implemented by FNPTR_FIELD_VALIDATOR function pointer takes two parameters, the pointer to the field and a context pointer. For cases where the validator has to have access to the length of the field, there is no clean way to currently do it. In order to resolve this, this commit updates the field-validator's prototype to take the length of the field as an additional parameter. This enhancement allows field validators to perform more comprehensive validation, especially when the length of the field is critical to the validation logic. This change should improve the overall robustness and flexibility of AcpiView. Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Cc: James Morse <james.Morse@arm.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Thomas Abraham <thomas.abraham@arm.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/IndustryStandard: Add definitions for MPAM ACPI specificationRohit Mathew2024-08-012-1/+252
| | | | | | | | | | | | | | | | Add definitions, macros and types for elements associated with MPAM ACPI 2.0 specification. Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Cc: James Morse <james.Morse@arm.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Thomas Abraham <thomas.abraham@arm.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* IntelFsp2WrapperPkg/FspmWrapperPeim: Fix FspT/M address for measurementZhihao Li2024-08-012-8/+33
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4716 Tcg module should use permanent address of FSP-T/M for measurement. TCG notification checks MigatedFvInfoHob and transmits DRAM address for measurement. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com> Cc: Chen Gang C <gang.c.chen@intel.com> Signed-off-by: Zhihao Li <zhihao.li@intel.com>
* ArmVirtPkg: Switch all PrePeiCore users to new Sec.infArd Biesheuvel2024-08-014-4/+4
| | | | | | | | Switch to the new SEC driver based on PrePeiCore, but with a sane name. The old one will be retired once all users have migrated, including many in edk2-platforms. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg: Clone PrePeiUniCore into SecArd Biesheuvel2024-08-0113-0/+892
| | | | | | | | | | | | PrePeiUniCore was already named rather awkwardly, but now that the UniCore bit has become redundant too, let's rename it in a way that conveys its purpose a bit better: Sec. This also matches what other architectures and platforms tend to provide. A straight rename would break all out-of-tree users, so clone it into a new module with a fresh GUID, giving users some time to update. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg: Clone PrePiUniCore into PeilessSecArd Biesheuvel2024-08-018-0/+607
| | | | | | | | | | | PrePiUniCore was already spectacularly mis-named but now that the UniCore bit has become redundant too, let's rename it in a way that conveys its purpose a bit better: PeilessSec. A straight rename would break all out-of-tree users, so clone it into a new module with a fresh GUID, giving users some time to update. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg/PrePi: Make some functions STATICArd Biesheuvel2024-08-012-6/+17
| | | | | | | Make some functions STATIC that are only called locally, and add some function headers to placate the tools. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPkg/ArmArchTimerLib: Drop pointless constructorArd Biesheuvel2024-08-012-25/+2
| | | | | | | | | | | | Drop the pointless constructor in ArmArchTimerLib, which does nothing useful, especially because AArch64 mandates the presence of the generic timer, and 32-bit ARM is mostly obsolete these days. To preserve the existing behavior in DEBUG builds when actually using the timer, move the ASSERT () on a non-zero frequency to the associated accessor helper function. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg/PrePi: Drop call to TimerConstructor()Ard Biesheuvel2024-08-012-8/+0
| | | | | | | Drop the call to the TimerConstructor, which should not be called explicitly, and does nothing useful to begin with. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmVirtPkg/PrePi: Drop call to TimerConstructor()Ard Biesheuvel2024-08-012-8/+0
| | | | | | | Drop the call to the TimerConstructor, which should not be called explicitly, and does nothing useful to begin with. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg/PrePi: Drop secondary stack handlingArd Biesheuvel2024-08-014-54/+10
| | | | | | | | | | This SEC driver is single CPU only now, so all of the secondary stack handling is dead code, and can be removed. This removes the last remaining user of the associated PCD, so drop that as well. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg/PrePeiCore: Drop secondary stack handlingArd Biesheuvel2024-08-014-89/+25
| | | | | | | This SEC driver is single CPU only now, so all of the secondary stack handling is dead code, and can be removed. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg/PrePeiCore: Drop MPCore variantArd Biesheuvel2024-08-017-272/+11
| | | | | | | | The PrePeiCore SEC driver can be built in unicore and MPcore versions from [mostly] the same source. The latter is obsolete, so remove it and simplify the remaining code accordingly. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg/PrePi: Drop MPCore variantArd Biesheuvel2024-08-017-295/+8
| | | | | | | | The PrePi SEC driver can be built in unicore and MPcore versions from [mostly] the same source. The latter is obsolete, so remove it and simplyify the remaining code accordingly. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmPlatformPkg: Drop bogus reference to MPCore related PCDArd Biesheuvel2024-08-012-4/+0
| | | | | | | The UniCore SEC implementations never bring up secondaries, so the PCD reference is bogus. Drop it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmVirtPkg: Drop bogus reference to MPCore related PCDArd Biesheuvel2024-08-011-5/+0
| | | | | | | Bringing up secondaries is out of scope for ArmVirtPkg, and the declared PCD reference is never actually made from the code. So drop it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* CryptoPkg: Enable Openssl Accel builds for AARCH64Pierre Gondois2024-08-012-18/+19
| | | | | | | | Enable the following modules builds for AARCH64: - OpensslLibAccel.inf - OpensslLibFullAccel.inf Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* CryptoPkg/OpensslLib: Add AArch64Cap for arch specific hooksPierre Gondois2024-08-013-0/+109
| | | | | | | | | | Add AARCH64 specific implementations of: - OPENSSL_cpuid_setup(), probing hardware capabilitie (presence of FEAT_AES, etc.) - OPENSSL_rdtsc(), returning non-trusted entropy by accessing system counter. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* CryptoPkg/OpensslLib: Generate files for AARCH64 native supportPierre Gondois2024-08-0113-2/+24978
| | | | | | | | Generate AARCH64 related files and update .inf files, running: python CryptoPkg/Library/OpensslLib/configure.py Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* CryptoPkg/OpensslLib: Add native instruction support for AARCH64Pierre Gondois2024-08-014-5/+53
| | | | | | Add native instruction support for AARCH64. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/BaseRngLib: Prefer ArmReadIdAA64Isar0Reg() over ArmReadIdIsar0()Pierre Gondois2024-08-015-82/+2
| | | | | | | | | | | | | | | A ArmReadIdAA64Isar0Reg() function was recently added to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent, which was private to the BaseRngLib library. This also allows to avoid the confusion between the following registers: - ID_ISAR0_EL1: allows to probe for Divide instructions, Debug instructions, ... - ID_AA64ISAR0_EL1: AARCH64 specific register allowing to probe for AESE, RNDR, ... instructions Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/BaseLib: AARCH64: Add ArmReadIdAA64Isar0Reg()Pierre Gondois2024-08-014-0/+134
| | | | | | | | | | | | | | To enable AARCH64 native instruction support for Openssl, some interfaces must be implemented. OPENSSL_cpuid_setup() allows to probe the supported features of the platform. Add ArmReadIdAA64Isar0Reg() to read the AA64Isar0, containing Arm64 instruction capabilities. A similar ArmReadIdAA64Isar0() function is available in the ArmPkg, but the CryptoPkg where OPENSSL_cpuid_setup will reside cannot rely on the ArmPkg. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/BaseLib: AARCH64: Add ArmReadCntPctReg()Pierre Gondois2024-08-014-1/+78
| | | | | | | | | | | | | To enable AARCH64 native instruction support for Openssl, some interfaces must be implemented. OPENSSL_rdtsc() requests an access to a counter to get some non-trusted entropy. Add ArmReadCntPctReg() to read system count. A similar ArmReadCntPct() function is available in the ArmPkg, but the CryptoPkg where OPENSSL_rdtsc will reside cannot rely on the ArmPkg. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
* BaseTools/Scripts/BinToPcd.py: Update regex strings to use raw strings.Antaeus Kleinert-Strand2024-08-011-2/+2
| | | | | | | | | | | | With Python 3.12 invalid escape sequences now generate warning messages. This change fixes the problem exposed by the warning message. ``` BaseTools/Scripts\BinToPcd.py:40: SyntaxWarning: invalid escape sequence BaseTools\Scripts\BinToPcd.py:46: SyntaxWarning: invalid escape sequence ``` Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* MdePkg: Add PCI Express 6.0 Header SupportSachin Ganesh2024-08-013-22/+173
| | | | | | | | | | | | | | PCI Express 6.0 Specification introduces new registers and modifies fields in existing ones. This commit syncs PciE headers with the spec update. Cc: Sergiy Yakovlev <sergiyy@ami.com> Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
* MdePkg/Acpi65.h: Fix GUID valueMichael Kubacki2024-08-011-1/+1
| | | | | | | | | | Commit c5ef1f0 added Acpi65.h by copying and updating text from Acpi64.h. In that process, `0x624B` was updated to `0x6.5B` likely due to a find/replace regex being used. This restores the value. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* CodeQlQueries.qls: Pin to the 1.1.0 codeq/cpp-queries packMichael Kubacki2024-07-314-1/+22
| | | | | | | | | | | | The codeql/cpp-queries pack used in CodeQlQueries.qls was versioned 1.1.0 for the CodeQL CLI v2.18.1 release currently used. https://github.com/github/codeql/blob/codeql-cli/v2.18.1/cpp/ql/src/qlpack.yml This change pins that pack version to prevent the CodeQL CLI and pack from getting out of sync until explicitly updated. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* StandaloneMmPkg: Enable SmmLockBoxMmDependency.xieyuanh2024-07-311-1/+2
| | | | | | | | | | | | | | Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Cc: Dun Tan <dun.tan@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* StandaloneMmPkg: Add LockBox Dependency Libraryxieyuanh2024-07-312-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LockBox Dependency Library is designed for standalone MM environments where gBS are not accessible to indicates that LockBox API is readyfor use. For DXE drivers use lockbox APIs via a communication mechanism triggering an SMI, it's must to have the corresponding SMI handler pre-installed for interrupt management. To ensure orderly operations and proper notification, besides specified the guid in the [Depex] section of the .inf file. The installation of smi handler, along with the LockBox protocol marked by gEfiLockBoxProtocolGuid, must be informed to the DXE driver. This protocol installation signifies that the LockBox API is ready for use, and this functionality is implemented in the constructor of this library. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Cc: Dun Tan <dun.tan@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
* OvmfPkg: Use heap memory for virtio-scsi requestSami Mujawar2024-07-311-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The storage space for virtio-scsi request header being shared with the host was from the stack as the request structure was a local function variable. A bug in the VMM can corrupt the stack space, and such issues can be very hard to debug. Note: This is only an issue with a normal guest VM (non-CCA). A CCA guest VM would perform bounce buffering for sharing the data and therefore not have this issue. Instead of using the stack for sharing the data with the host, memory can be allocated from the heap pool. However, pool allocations are not any safer in terms of pages being shared between different allocations, and so mapping a pool allocation for DMA may expose it to potential corruption by the VMM in exactly the same way. The only difference is the potential impact on program behaviour, which is much higher with the stack. Additionally, for guest-side corruption heap allocations can take advantage by turning on heap guard to help find the bug. Therefore, minor improvement can be achieved by allocating memory for the virtio-scsi request header from the heap for sharing with the host. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
* OvmfPkg: Use heap memory for virtio-blk requestSami Mujawar2024-07-311-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The storage space for virtio-blk request header being shared with the host was from the stack as the request structure was a local function variable. A bug in the VMM can corrupt the stack space, and such issues can be very hard to debug. Note: This is only an issue with a normal guest VM (non-CCA). A CCA guest VM would perform bounce buffering for sharing the data and therefore not have this issue. Instead of using the stack for sharing the data with the host, memory can be allocated from the heap pool. However, pool allocations are not any safer in terms of pages being shared between different allocations, and so mapping a pool allocation for DMA may expose it to potential corruption by the VMM in exactly the same way. The only difference is the potential impact on program behaviour, which is much higher with the stack. Additionally, for guest-side corruption heap allocations can take advantage by turning on heap guard to help find the bug. Therefore, minor improvement can be achieved by allocating memory for the virtio-blk request header from the heap for sharing with the host. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
* EmbeddedPkg: Retire EfiResetSystemLib and ResetRuntimeDxeArd Biesheuvel2024-07-317-282/+0
| | | | | | | | | Retire the ancient reset runtime DXE in EmbeddedPkg, and the associated EfiResetSystemLib library class and template implementation. These are incomplete and have been superseded by a generic implementation in MdeModulePkg. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/LoongArchVirtQemu: Drop bogus references to EfiResetSystemLibArd Biesheuvel2024-07-311-2/+0
| | | | | | | | These libraries do not implement EfiResetSystemLib to begin with, and this library class is going to be dropped. So drop these bogus references first. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* UefiCpuPkg: remove last instances of EFI_D_Leif Lindholm2024-07-311-2/+2
| | | | | | Change debug print levels to modern DEBUG_ format. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
* OvmfPkg: remove last instances of EFI_D_Leif Lindholm2024-07-312-2/+2
| | | | | | Change debug print levels to modern DEBUG_ format. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
* MdeModulePkg: NvmExpressDxe: Add Timeout Status CodesSean Brogan2024-07-311-0/+2
| | | | | | | Add Report status code events to Nvme to trigger when timeouts occur. This improves traceability when critical errors happen. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* MdeModulePkg/UfsPassThruDxe: Migrate UFS Initial Completion Timeout to PCDJason1 Lin2024-07-303-7/+8
| | | | | | | - Remove the hardcoded definition (UFS_INIT_COMPLETION_TIMEOUT) - Migrate the UFS initial completion timeout into PCD value Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg/UfsBlockIoPei: Migrate UFS Initial Completion Timeout to PCDJason1 Lin2024-07-303-7/+7
| | | | | | | - Remove the hardcoded definition (UFS_INIT_COMPLETION_TIMEOUT) - Migrate the UFS initial completion timeout into PCD value Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg: Add the PcdUfsInitialCompletionTimeout in DEC FileJason1 Lin2024-07-301-0/+5
| | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4820 - Add the PCD to indicate the UFS device initialize completion time - Default value of this PCD value is 600ms Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdeModulePkg: Optimize PEI Core Migration AlgorithmAwiral Shrivastava2024-07-303-9/+47
| | | | | | | | | | | | | | | | | | | | | REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4750 Migrate the FV that doesn't contain the currently executing PEI Core when permanent memory is initialized but PEI Core is still potentially running from faster memory (Tepmorary RAM). This may reduce the time required to migrate FVs to permanent memory. The FV containing PEI Core is migrated after the PEI Core reentry when it is executed from permanent memory. This may or may not improve performance depending on the behavior of temporary RAM and the actual performance changes must be measured with the feature enabled and disabled. This migration algorithm is only used for FVs specified in the gEdkiiMigrationInfoGuid HOB and built with flag FLAGS_FV_MIGRATE_BEFORE_PEI_CORE_REENTRY. Signed-off-by: Awiral Shrivastava <awiral.shrivastava@intel.com>
* BaseTools: fix build error with TOOL_CHAIN_TAG VS2015 & VS2015x86wilson_chen2024-07-302-4/+12
| | | | | | | | | | | | | | | | | | Start the build with TOOL_CHAIN_TAG VS2015 by launch: Build -t VS2015 ERROR: Would get following build error message: 'c:\Program' is not recognized as an internal or external command, operable program or batch file. NMAKE : fatal error U1077: '"c:\Program Files\Windows Kits\8.1\bin\x86\\rc.exe' : return code '0x1' Stop. Fix the build error, Tested : TOOL_CHAIN_TAG = VS2015 (>Build -t VS2015) TOOL_CHAIN_TAG = VS2015x86 (>Build -t VS2015x86) Signed-off-by: wilson_chen <wilson_chen@phoenix.com>
* MdePkg: IORT header update for IORT Rev E.f specAbhishek Mainkar2024-07-301-2/+3
| | | | | | | | | | | The IO Remapping Table, Platform Design Document, Revision E.f, April 2024 (https://developer.arm.com/documentation/den0049/ef/) added CANWBS Memory access flag. Therefore, update the IORT header file to add support for CANWBS Memory access flag. Signed-off-by: Abhishek Mainkar <abmainkar@nvidia.com>
* MdePkg: Update HEST Revision As 2Herman Li2024-07-301-1/+1
| | | | | | | | | This modification come from ACPI 6.5 spec. Besides, Starting with revision 2 of HEST, the Error Source Structures must be sorted in Type ascending order for Error Source Structure Types of less than 12. Signed-off-by: Herman Li <herman.li@intel.com>
* EmbeddedPkg: NonCoherentDmaLib: Set EFI_MEMORY_XP Capability on DMA BufferOliver Smith-Denny2024-07-291-4/+32
| | | | | | | | | | | | Commit 8984fba2f22a2cd44e1189403e3553f447b82852 added setting the EFI_MEMORY_XP attribute on DMA buffers. However, it did not ensure that the XP capability was set on that region. This patch adds setting the XP capability before attempting to set the attribute. If setting the capability fails, it defaults to the old behavior of not setting the XP bit. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
generated by cgit (git 2.34.1) at 2025-02-23 09:35:22 +0000