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* OvmfPkg/LoongArchVirt: Add self introduction fileChao Li2024-06-181-0/+69
| | | | | | | | | | | | | | | Add self introduction file for LoongArch virtual machine. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
* OvmfPkg/LoongArchVirt: Add build fileChao Li2024-06-184-0/+1098
| | | | | | | | | | | | | | | | | Add infrastructure files to build edk2 for LoongArch QEMU virtual machine. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn> Co-authored-by: Bibo Mao <maobibo@loongson.cn>
* OvmfPkg/LoongArchVirt: Support PEI phaseChao Li2024-06-185-0/+789
| | | | | | | | | | | | | | | | Platfrom PEI module for LoongArch platfrom initialization. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn> Co-authored-by: Bibo Mao <maobibo@loongson.cn>
* OvmfPkg/LoongArchVirt: Support SEC phaseChao Li2024-06-183-0/+750
| | | | | | | | | | | | | | | | Add SEC code for LoongArch virtual machine. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn> Co-authored-by: Bibo Mao <maobibo@loongson.cn>
* OvmfPkg/LoongArchVirt: Add reset system libraryChao Li2024-06-186-0/+637
| | | | | | | | | | | | | | | | | This library provides interface related to restart and shudown the LoongArch64 virtual machine. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn> Co-authored-by: Bibo Mao <maobibo@loongson.cn>
* OvmfPkg/LoongArchVirt: Add real time clock libraryChao Li2024-06-183-0/+409
| | | | | | | | | | | | | | | | This library is provides real time clock for LoongArch virtual machine. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
* OvmfPkg: Add a new GUID called gRtcRegisterBaseAddressHobGuidChao Li2024-06-181-0/+1
| | | | | | | | | | | | Added a new GUID use for store the RTC register base address if the platform can not uses the dynamic PCD in PEI stage. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Chao Li <lichao@loongson.cn>
* OvmfPkg/LoongArchVirt: Add the early serial port output libraryChao Li2024-06-182-0/+866
| | | | | | | | | | | | | | | | | | | | | | Add a early serial port output library into LoongArchVirt that named EarlyFdtSerialPortLib16550, this library is referenced from MdeModulePkg. This library is used in the PEI phase. Since the serial port address can not be saved in memory of the LoongArch QEMU virtual machine in the PEI phase, the serial prot base address will be obtained from the FDT before each output. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
* OvmfPkg/LoongArchVirt: Add serial port hook libraryChao Li2024-06-185-0/+172
| | | | | | | | | | | | | | | | | | | | Add a serial port hook library in LoongArchVirt named Fdt16550SerialProtHookLib, this library is referenced from ArmVirtPkg. LoongArch QEMU virtual machine uses register of LOONGARCH_CSR_KS1 to transfer serial port base addres from the PEI phase to the DXE phase. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/LoongArchVirt: Add CpuMmuInit libraryChao Li2024-06-185-0/+279
| | | | | | | | | | | | | | Added a new library for LoongArch, it use for initialization the CPU MMU, it consumed the CpuMmuLib. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Co-authored-by: Dongyan Qian <qiandongyan@loongson.cn> Co-authored-by: Xianglai Li <lixianglai@loongson.cn> Co-authored-by: Bibo Mao <maobibo@loongson.cn>
* OvmfPkg/LoongArchVirt: Add stable timer driverChao Li2024-06-182-0/+437
| | | | | | | | | | | | | | | | Add a CPU timer driver named StableTimerDxe, which proviedes EFI_TIMER_ARCH_PROTOCOL for LoongArch. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Bibo Mao <maobibo@loongson.cn> Cc: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn>
* .devcontainer: bump Fedora version to 39Rebecca Cran2024-06-181-2/+2
| | | | | | | | | Fedora 35 is EOL. Use Fedora 39 instead: don't use 40 for now since it comes with gcc 14 which still has some problems building edk2. Fix the git command to disable the safe directory checks. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* MdeModulePkg/Core/Pei: Install MigrateTempRamPpiZhihao Li2024-06-186-5/+41
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4716 Migrate FSP-T/M binary from temporary RAM to permanent RAM before NEM tear down. Tcg module will use permanent address of FSP-T/M for measurement. In MdeModulePkg, PeiCore installs mMigrateTempRamPpi if PcdMigrateTemporaryRamFirmwareVolumes is True before NEM tear down and after permanent memory ready. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com> Cc: Chen Gang C <gang.c.chen@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Zhihao Li <zhihao.li@intel.com>
* MdePkg/Include: Update AMD specification referencesPaul Grimes2024-06-182-2/+2
| | | | | | | | | Update AMD sepcification references (code comments) as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
* MdePkg/Include: Update Msr.h header guard definePaul Grimes2024-06-181-2/+2
| | | | | | | | | Update the Msr.h eader guard to comply with latest edk2 coding guidelines. This change is part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
* MdePkg/Include: Remove deprecated AMD SEV-SNP header filePaul Grimes2024-06-181-153/+0
| | | | | | | | Delete Fam17Msr.h as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
* UefiCpuPkg/MpInitLib: Update references to SEV-SNP header filePaul Grimes2024-06-184-4/+5
| | | | | | | | Update reference to SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines. Remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
* MdePkg/Include: Update reference to SEV-SNP header filePaul Grimes2024-06-181-1/+1
| | | | | | | | Update reference to SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines. Remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
* MdePkg/Include: Add AMD SEV-SNP header filePaul Grimes2024-06-181-0/+153
| | | | | | | | Add SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
* MdeModulePkg:Add global variable mVariableRtCacheInfoDun Tan2024-06-171-58/+51
| | | | | | | | | Add global variable mVariableRtCacheInfo to save the content in gEdkiiVariableRuntimeCacheInfoHobGuid. With this new global variable, 7 global variables can be removed. Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg: Refine InitVariableCache()Dun Tan2024-06-171-100/+94
| | | | | | | | | | | Refine the code logic in InitVariableCache(). In this commit, three times calling of InitVariableCache() for different type cache are merged into one calling. This commit is to make the code looks cleaner and doesn't change any code functionality. Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg:Remove the usage of PcdEnableVariableRuntimeCacheDun Tan2024-06-172-7/+7
| | | | | | | | Remove the usage of PcdEnableVariableRuntimeCache. We can use the existence of gEdkiiVariableRuntimeCacheInfoHobGuid to indicate if variable runtime cache is enabled or not. Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg:Consume gEdkiiVariableRuntimeCacheInfoHobGuidDun Tan2024-06-172-74/+55
| | | | | | | | | | | | | | | | | | Consume gEdkiiVariableRuntimeCacheInfoHobGuid in VariableSmmRuntimeDxe driver to initialize the following variable cache related buffer: *mVariableRuntimeHobCacheBuffer *mVariableRuntimeNvCacheBuffer *mVariableRuntimeVolatileCacheBuffer *mVariableRuntimeCachePendingUpdate *mVariableRuntimeCacheReadLock *mHobFlushComplete The code to to allocate and unblock the buffer for different type cache in VariableSmmRuntimeDxe is also removed in this commit. Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg:Remove unneed FreePages for RuntimeHobCacheBufferDun Tan2024-06-171-7/+3
| | | | | | | | | Remove unneed FreePages() for RuntimeHobCacheBuffer which is allocated in PEI phase. So the global variable mVariableRuntimeHobCacheBufferSize also can be removed. Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg:Remove unnecessary global variablesDun Tan2024-06-171-7/+7
| | | | | | | | | Remove the two unnecessary global variables and replace them by two local variables: mVariableRuntimeNvCacheBufferSize mVariableRuntimeVolatileCacheBufferSize Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg:Create gEdkiiVariableRuntimeCacheInfoHobGuidDun Tan2024-06-173-2/+310
| | | | | | | | | | | | | Install the callback of gEfiPeiMemoryDiscoveredPpiGuid to create gEdkiiVariableRuntimeCacheInfoHobGuid in VariablePei module. When PcdEnableVariableRuntimeCache is TRUE, the callback will be installed to allocate the needed buffer for different type variable runtime cache, unblock the buffer and build this HOB. Then the runtime cache buffer address and size will be saved in the HOB content. Signed-off-by: Dun Tan <dun.tan@intel.com>
* MdeModulePkg:Add new gEdkiiVariableRuntimeCacheInfoHobGuidDun Tan2024-06-172-0/+64
| | | | | | | | | | | | | | | | | This commit defines VARIABLE_RUNTIME_CACHE_INFO HOB. The HOB is used to store the address and size of the buffer that will be used for variable runtime service when the PcdEnableVariableRuntimeCache is TRUE. In following patches, when PcdEnableVariableRuntimeCache is TRUE, VariablePei module will install a callback of gEfiPeiMemoryDiscoveredPpiGuid to allocate needed buffer for different type cache, unblock the buffer and build HOB. Then VariableSmmRuntimeDxe driver will consume the gEdkiiVariableRuntimeCacheInfoHobGuid to initialize the variable runtime cache related content. Signed-off-by: Dun Tan <dun.tan@intel.com>
* ArmPkg/ProcessorSubClassDxe: Limit values to 0xFFJeff Brasen2024-06-171-3/+3
| | | | | | | | The CoreCount, EnabledCore and ThreadCount counts should be set to 0xFF if value is greater than 255 per the SMBIOS specification. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
* UefiCpuPkg/SmmCpuSyncLib: Add MM_STANDALONE tag.xieyuanh2024-06-171-2/+2
| | | | | | | | | | | | | Declares in the .inf file that the current component is an MM_STANDALONE Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* CryptoPkg: Fix strncpy for BaseCryptLibMbedTlsWenxing Hou2024-06-171-3/+22
| | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2817 Because the change for strncpy, add the strncpy implementation. Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
* BaseTools/BuildReport: Improve compile_commands generationJeff Brasen2024-06-151-6/+13
| | | | | | | | | | | | | This produces output that matches CodeChecker log command - Set directory to build output path - Set build destination to the object created instead of the path - Add recursive macro support - Add lookup in module.Macros dictionary - Add leading include flag to include list - Add source file to compile commands Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
* ArmPkg/CompilerIntrinsicsLib: provide __ashlti3Jeff Brasen2024-06-152-0/+34
| | | | | | | | The compiler will use this function if it is left shifting a 128 bit value. Seen when updating OpenSSL. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
* OvmfPkg/Xen: Fix use of networkingRoss Lagerwall2024-06-152-0/+4
| | | | | | | | | | | | | | | | | Since commit 4c4ceb2ceb80 ("NetworkPkg: SECURITY PATCH CVE-2023-45237"), networking modules depend on gEfiRngProtocolGuid but nothing in OvmfXen provides it. This is visible in the logs as several modules present but not loading: Driver A2F436EA-A127-4EF8-957C-8048606FF670 was discovered but not loaded!! Driver E4F61863-FE2C-4B56-A8F4-08519BC439DF was discovered but not loaded!! Driver 025BBFC7-E6A9-4B8B-82AD-6815A1AEAF4A was discovered but not loaded!! Driver 529D3F93-E8E9-4E73-B1E1-BDF6A9D50113 was discovered but not loaded!! Driver 94734718-0BBC-47FB-96A5-EE7A5AE6A2AD was discovered but not loaded!! Include SecurityPkg/RandomNumberGenerator/RngDxe to fix this. Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
* ArmPkg,MdePkg: Move ArmPkg/Chipset/Aarch64[|Mmu].h to MdePkgPierre Gondois2024-06-159-8/+8
| | | | | | | | | | | | | | Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/Aarch64[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg,MdePkg: Move ArmPkg/Chipset/ArmV7[|Mmu].h to MdePkgPierre Gondois2024-06-1512-11/+11
| | | | | | | | | | | | | | Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/ArmV7[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* ArmPkg,MdePkg: move ArmLib.h to MdePkgLeif Lindholm2024-06-154-4/+11
| | | | | | | | | | | | | | | | | | | | | Related to https://bugzilla.tianocore.org/show_bug.cgi?id=4121, but not resolving it. (Nearly?) all of ArmPkg describes industry standard behaviour, and hence according to general rules, ought to live in MdePkg. Addressing this will however be a substantial task. Take a first step by moving the ArmLib interface definition to MdePkg, as discussed in https://edk2.groups.io/g/devel/topic/patch_v5_2_6/102725178 Continuous-integration-options: PatchCheck.ignore-multi-package Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
* MdePkg/X86UnitTestHost: set rdrand cpuid bitGerd Hoffmann2024-06-141-1/+10
| | | | | | | Set the rdrand feature bit when faking cpuid for host test cases. Needed to make the CryptoPkg test cases work. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* CryptoPkg/Test: call ProcessLibraryConstructorListGerd Hoffmann2024-06-141-0/+7
| | | | | | Needed to properly initialize BaseRngLib. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg: Override PcdCpuSmmApSyncTimeout2 to 10msJiaxin Wu2024-06-146-6/+14
| | | | | | | | | | | | | PcdCpuSmmApSyncTimeout2 PCD was added in previous patch (52d0a208), this patch is to override PcdCpuSmmApSyncTimeout2 to 10ms (same as PcdCpuSmmApSyncTimeout) so as to align with original behavior. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* UefiCpuPkg: Refine the PCD usage commentJiaxin Wu2024-06-142-4/+4
| | | | | | | | | | | | | PcdCpuSmmApSyncTimeout is not only used by BSP to wait AP, but also for AP to wait BSP (APHandler). This patch is only to refine the PCD comment. No function impact. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdCpuSmmApSyncTimeout2Jiaxin Wu2024-06-144-13/+28
| | | | | | | | | | | | | | | | | | | This patch is to consume the PcdCpuSmmApSyncTimeout2 to enhance the flexibility of timeout configuration. In some cases, certain processors may not be able to enter SMI, and prolonged waiting could lead to kernel soft/hard lockup. We have now defined two timeouts. The first timeout can be set to a smaller value to reduce the waiting period. Processors that are unable to enter SMI will be woken up through SMIIPL to enter SMI, followed by a second waiting period. The second timeout can be set to a larger value to prevent delays in processors entering SMI case due to the long instruction execution. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com>
* UefiCpuPkg: Add PcdCpuSmmApSyncTimeout2 PCDJiaxin Wu2024-06-142-1/+9
| | | | | | | | | | | | | | | | | | | | | | Provide the capability for platform to specifies the 2nd timeout value in microseconds for the BSP/AP in SMM to wait for one another to enter SMM. The added interface can enhance the flexibility of timeout configuration. In some cases, certain processors may not be able to enter SMI, and prolonged waiting could lead to kernel soft/hard lockup. We have now defined two timeouts. The first timeout can be set to a smaller value to reduce the waiting period. Processors that are unable to enter SMI will be woken up through SMIIPL to enter SMI, followed by a second waiting period. The second timeout can be set to a larger value to prevent delays in processors entering SMI case due to the long instruction execution. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg: wire up RngDxeGerd Hoffmann2024-06-1314-12/+27
| | | | | | | | | | | | Add OvmfRng include snippets with the random number generator configuration for OVMF. Include RngDxe, build with BaseRngLib, so the rdrand instruction is used (if available). Also move VirtioRng to the include snippets. Use the new include snippets for OVMF builds. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* SecurityPkg/RngDxe: add rng testGerd Hoffmann2024-06-131-1/+7
| | | | | | | | | | Check whenever RngLib actually returns random numbers, only return a non-zero number of Algorithms if that is the case. This has the effect that RndDxe loads and installs EFI_RNG_PROTOCOL only in case it can actually deliver random numbers. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* MdePkg/BaseRngLib: Add a smoketest for RDRAND and check CPUIDPedro Falcato2024-06-131-8/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RDRAND has notoriously been broken many times over its lifespan. Add a smoketest to RDRAND, in order to better sniff out potential security concerns. Also add a proper CPUID test in order to support older CPUs which may not have it; it was previously being tested but then promptly ignored. Testing algorithm inspired by linux's arch/x86/kernel/cpu/rdrand.c :x86_init_rdrand() per commit 049f9ae9.. Many thanks to Jason Donenfeld for relicensing his linux RDRAND detection code to MIT and the public domain. >On Tue, Nov 22, 2022 at 2:21 PM Jason A. Donenfeld <Jason@zx2c4.com> wrote: <..> > I (re)wrote that function in Linux. I hereby relicense it as MIT, and > also place it into public domain. Do with it what you will now. > > Jason BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4163 Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jason A. Donenfeld <Jason@zx2c4.com>
* MdePkg/BaseLib: Let CpuDeadLoop() be breakable in debuggerRay Ni2024-06-121-2/+4
| | | | | | | | | | | | | | | | | | | Starting from certain version of Visual Studio C compiler (I don’t have the exact version. I am using VS2019), CpuDeadLoop is optimized quite well by compiler. The compiler does not generate instructions that jump out of the loop when the "Index" is non-zero. It becomes harder/impossible for developers to break out of the dead-loop in debugger. The new version of CpuDeadLoop() compares a volatile global to a volatile local. This forces 2 reads and a comparison on every loop iteration. The local variable can be set to 1 to exit the loop without modifying the global variable. Using VS2019 with max opt enabled, The dead-loop can be exit by setting Index to 1 in a debugger. Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
* UefiPayloadPkg: Enable UPL FIT build config from cmdlineDhaval2024-06-111-1/+3
| | | | | | | | | | | Provide commandline configuration to select proper platform file. Cc: Gua Guo <gua.guo@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: James Lu <james.lu@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
* UefiPayloadPkg: Fix LoadDxeCore for payload size > 16MBSebastian Witt2024-06-101-2/+3
| | | | | | | | | | | Fix calculation of first section in FileFindSection for FILE2 headers in UefiPayloadEntry module. Signed-off-by: Sebastian Witt <sebastian.witt@siemens.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com>
* ArmPkg: Revert "Allow SMC/HVC monitor conduit to be specified at runtime"Ard Biesheuvel2024-06-104-8/+8
| | | | | | | | | This reverts commit 32460bb5b17b5caec29037a4e9462ca149a190e6, which is no longer needed as ArmVirtQemu now has its own special implementation for ArmMonitorLib. Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
* ArmVirtPkg/ArmVirtQemu: Revert "Permit the use of dynamic PCDs in PEI"Ard Biesheuvel2024-06-102-2/+6
| | | | | | | | This reverts commit 865229bcc8939c7a69d525f2b0627ef1532d5bc6, and restores the old state where dynamic PCDs are only used when TPM support is configured. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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