From 063e19bab2569219adadcbc32c83f6b1da626e60 Mon Sep 17 00:00:00 2001
From: Aravind P R <aravind.p.r@intel.com>
Date: Mon, 27 Jan 2025 10:36:57 +0530
Subject: IntelFsp2Pkg: Fixing TemporaryRamSize Configurability option.

Issue : Configuring TemporaryRamSize using FSP-T arch UPD
(added as part of Spec 2.5) is not working as expected.

Root cause : Code is reading the ImageAttribute from the wrong
address which confirms the TemporaryRamSize Configurability,
hence the TemporaryRamSize UPD is ignored. This is because
the code expects the FspInfoheader Offset to be in ESI/RSI
(from which ImageAttribute read) is not guaranteed as per the
current implementation.

Fix : Modified code to make sure that ESI/RSI contains the
FspInfoheader offset by time the code reads the ImageAttribute.

Tests : Verified the fix on Both 32 Bit and 64 Bit FSP Binaries
by configuring the TemporaryRamSize using the FSPT Arch UPD.

Signed-off-by: Aravind P R <aravind.p.r@intel.com>
---
 IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 11 +++++++++++
 IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm  | 10 ++++++++--
 2 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 088bd7ee7f..90de12f9af 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -185,6 +185,16 @@ endstruc
 global ASM_PFX(LoadUpdPointerToECX)
 ASM_PFX(LoadUpdPointerToECX):
   ;
+  ; Inputs:
+  ;   esp -> stack with FsptUpdDataPtr parameter
+  ; Outputs:
+  ;   eax -> Address of FspInfoHeader
+  ;   ecx -> Address of FSP-T UPD structure
+  ; Register Usage:
+  ;   ebp is used for return address.
+  ;   All others reserved.
+  ;
+
   ; esp + 4 is input UPD parameter
   ; If esp + 4 is NULL the default UPD should be used
   ; ecx will be the UPD region that should be used
@@ -600,6 +610,7 @@ ASM_PFX(TempRamInitApi):
   SAVE_EDX
 
   CALL_EBP  ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
+  mov       esi, eax                     ; eax contains FspInfoHeader address after previous call
   SAVE_ECX                               ; save UPD param to slot 3 in xmm6
 
   mov       edx, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))
diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
index 3e7a6400a2..d50b3317c9 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
@@ -451,19 +451,25 @@ ASM_PFX(TempRamInitApi):
   ;
   ; Save Input Parameter in YMM10
   ;
+  SAVE_RCX
+  ;
+  ; Get FspInfoHeader address
+  ;
+  CALL_RDI  ASM_PFX(AsmGetFspInfoHeaderNoStack)
+  mov       rsi, rax
+  LOAD_RCX
   cmp       rcx, 0
   jnz       ParamValid
 
   ;
   ; Fall back to default UPD
   ;
-  CALL_RDI  ASM_PFX(AsmGetFspInfoHeaderNoStack)
   xor       rcx, rcx
   mov       ecx,  DWORD [rax + 01Ch]      ; Read FsptImageBaseAddress
   add       ecx,  DWORD [rax + 024h]      ; Get Cfg Region base address = FsptImageBaseAddress + CfgRegionOffset
-ParamValid:
   SAVE_RCX
 
+ParamValid:
   mov       rdx, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))
   mov       edx, DWORD [rdx]
   ;
-- 
cgit