diff options
author | Michael Brown <mcb30@etherboot.org> | 2008-10-21 20:49:10 +0100 |
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committer | Michael Brown <mcb30@etherboot.org> | 2008-10-21 20:49:10 +0100 |
commit | 22979c511eaf9b36c7ed5efee05242c9d482ca6e (patch) | |
tree | 0420163c4018b1ad1b6ec144c92ddc61408040c3 /contrib | |
parent | d9c38d14d678a6aba6d6d52cb4ba079c38fe3a96 (diff) | |
download | ipxe-22979c511eaf9b36c7ed5efee05242c9d482ca6e.tar.gz |
[contrib] Add patch to enable writable ROM images in bochs
Some of the gPXE romprefix.S code attempts to write to the ROM image,
as allowed by the PCI spec. We do gracefully handle the case of
read-only ROM images (for ISA ROMs and for normal bochs/qemu
operation), but it can be handy to be able to use bochs to debug the
code paths that depend on writable ROM images.
Diffstat (limited to 'contrib')
-rw-r--r-- | contrib/bochs/bochs-writable-ROM-patch | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/contrib/bochs/bochs-writable-ROM-patch b/contrib/bochs/bochs-writable-ROM-patch new file mode 100644 index 000000000..1ab9a27a4 --- /dev/null +++ b/contrib/bochs/bochs-writable-ROM-patch @@ -0,0 +1,20 @@ +Index: memory/memory.cc +=================================================================== +RCS file: /cvsroot/bochs/bochs/memory/memory.cc,v +retrieving revision 1.71 +diff -u -r1.71 memory.cc +--- memory/memory.cc 18 Oct 2008 18:10:14 -0000 1.71 ++++ memory/memory.cc 21 Oct 2008 19:47:07 -0000 +@@ -172,7 +172,11 @@ + break; + + case 0x0: // Writes to ROM, Inhibit +- BX_DEBUG(("Write to ROM ignored: address 0x" FMT_PHY_ADDRX ", data %02x", a20addr, *data_ptr)); ++ if ((a20addr & 0xfffe0000) == 0x000e0000) { ++ BX_DEBUG(("Write to ROM ignored: address 0x" FMT_PHY_ADDRX ", data %02x", a20addr, *data_ptr)); ++ } else { ++ BX_MEM_THIS rom[(a20addr & EXROM_MASK) + BIOSROMSZ] = *data_ptr; ++ } + break; + + default: |