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| author | Michael Brown <mcb30@ipxe.org> | 2022-09-19 17:47:57 +0100 |
|---|---|---|
| committer | Michael Brown <mcb30@ipxe.org> | 2022-09-19 17:47:57 +0100 |
| commit | 3aa6b79c8d9dd0b4126c966aa83114dd0b9b4120 (patch) | |
| tree | 99cb3ae4867260a4f9746f861551811e757c32be /src/include/ipxe/pci.h | |
| parent | 649176cd608e74ce54d20488a0618b4c6d8be71d (diff) | |
| download | ipxe-3aa6b79c8d9dd0b4126c966aa83114dd0b9b4120.tar.gz | |
[pci] Add minimal PCI bridge driver
Add a minimal driver for PCI bridges that can be used to locate the
bridge to which a PCI device is attached.
Signed-off-by: Michael Brown <mcb30@ipxe.org>
Diffstat (limited to 'src/include/ipxe/pci.h')
| -rw-r--r-- | src/include/ipxe/pci.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/include/ipxe/pci.h b/src/include/ipxe/pci.h index c91baaddd..637b20d60 100644 --- a/src/include/ipxe/pci.h +++ b/src/include/ipxe/pci.h @@ -127,6 +127,10 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); /** Network controller */ #define PCI_CLASS_NETWORK 0x02 +/** Bridge device */ +#define PCI_CLASS_BRIDGE 0x06 +#define PCI_CLASS_BRIDGE_PCI 0x04 /**< PCI-to-PCI bridge */ + /** Serial bus controller */ #define PCI_CLASS_SERIAL 0x0c #define PCI_CLASS_SERIAL_USB 0x03 /**< USB controller */ @@ -135,9 +139,20 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL ); #define PCI_CLASS_SERIAL_USB_EHCI 0x20 /**< ECHI USB controller */ #define PCI_CLASS_SERIAL_USB_XHCI 0x30 /**< xHCI USB controller */ +/** Primary bus number */ +#define PCI_PRIMARY 0x18 + +/** Secondary bus number */ +#define PCI_SECONDARY 0x19 + /** Subordinate bus number */ #define PCI_SUBORDINATE 0x1a +/** Memory base and limit */ +#define PCI_MEM_BASE 0x20 +#define PCI_MEM_LIMIT 0x22 +#define PCI_MEM_MASK 0x000f + /** Construct PCI class * * @v base Base class (or PCI_ANY_ID) |