aboutsummaryrefslogtreecommitdiffstats
path: root/src/include
diff options
context:
space:
mode:
authorMichael Brown <mcb30@etherboot.org>2005-03-08 18:53:11 +0000
committerMichael Brown <mcb30@etherboot.org>2005-03-08 18:53:11 +0000
commit3d6123e69ab879c72ff489afc5bf93ef0b7a94ce (patch)
tree9f3277569153a550fa8d81ebd61bd88f266eb8da /src/include
downloadipxe-3d6123e69ab879c72ff489afc5bf93ef0b7a94ce.tar.gz
Initial revision
Diffstat (limited to 'src/include')
-rw-r--r--src/include/.cvsignore1
-rw-r--r--src/include/big_bswap.h17
-rw-r--r--src/include/bootp.h230
-rw-r--r--src/include/btext.h76
-rw-r--r--src/include/byteswap.h20
-rw-r--r--src/include/callbacks.h45
-rw-r--r--src/include/coff.h73
-rw-r--r--src/include/cpu.h6
-rw-r--r--src/include/debug.h28
-rw-r--r--src/include/dev.h126
-rw-r--r--src/include/disk.h53
-rw-r--r--src/include/dns_resolver.h58
-rw-r--r--src/include/elf.h234
-rw-r--r--src/include/elf_boot.h84
-rw-r--r--src/include/endian.h19
-rw-r--r--src/include/etherboot.h459
-rw-r--r--src/include/fs.h41
-rw-r--r--src/include/http.h7
-rw-r--r--src/include/i82365.h450
-rw-r--r--src/include/if_arp.h23
-rw-r--r--src/include/if_ether.h27
-rw-r--r--src/include/igmp.h23
-rw-r--r--src/include/in.h21
-rw-r--r--src/include/ip.h17
-rw-r--r--src/include/isa.h32
-rw-r--r--src/include/isapnp.h124
-rw-r--r--src/include/lib.h42
-rw-r--r--src/include/little_bswap.h17
-rw-r--r--src/include/mii.h105
-rw-r--r--src/include/nfs.h63
-rw-r--r--src/include/nic.h49
-rw-r--r--src/include/osdep.h43
-rw-r--r--src/include/pc_kbd.h7
-rw-r--r--src/include/pci.h362
-rw-r--r--src/include/pci_ids.h342
-rw-r--r--src/include/pcmcia-opts.h23
-rw-r--r--src/include/pcmcia.h157
-rw-r--r--src/include/pxe.h929
-rw-r--r--src/include/pxe_export.h61
-rw-r--r--src/include/string.h68
-rw-r--r--src/include/sys_info.h33
-rw-r--r--src/include/tcp.h35
-rw-r--r--src/include/tftp.h77
-rw-r--r--src/include/timer.h62
-rw-r--r--src/include/udp.h27
45 files changed, 4796 insertions, 0 deletions
diff --git a/src/include/.cvsignore b/src/include/.cvsignore
new file mode 100644
index 000000000..de1598ef3
--- /dev/null
+++ b/src/include/.cvsignore
@@ -0,0 +1 @@
+.buildserial.h
diff --git a/src/include/big_bswap.h b/src/include/big_bswap.h
new file mode 100644
index 000000000..66c3360e0
--- /dev/null
+++ b/src/include/big_bswap.h
@@ -0,0 +1,17 @@
+#ifndef ETHERBOOT_BIG_BSWAP_H
+#define ETHERBOOT_BIG_BSWAP_H
+
+#define ntohl(x) (x)
+#define htonl(x) (x)
+#define ntohs(x) (x)
+#define htons(x) (x)
+#define cpu_to_le32(x) __bswap_32(x)
+#define cpu_to_le16(x) __bswap_16(x)
+#define cpu_to_be32(x) (x)
+#define cpu_to_be16(x) (x)
+#define le32_to_cpu(x) __bswap_32(x)
+#define le16_to_cpu(x) __bswap_16(x)
+#define be32_to_cpu(x) (x)
+#define be16_to_cpu(x) (x)
+
+#endif /* ETHERBOOT_BIG_BSWAP_H */
diff --git a/src/include/bootp.h b/src/include/bootp.h
new file mode 100644
index 000000000..0e65477ae
--- /dev/null
+++ b/src/include/bootp.h
@@ -0,0 +1,230 @@
+#ifndef _BOOTP_H
+#define _BOOTP_H
+
+#ifdef ALTERNATE_DHCP_PORTS_1067_1068
+#undef NON_STANDARD_BOOTP_SERVER
+#define NON_STANDARD_BOOTP_SERVER 1067
+#undef NON_STANDARD_BOOTP_CLIENT
+#define NON_STANDARD_BOOTP_CLIENT 1068
+#endif
+
+#ifdef NON_STANDARD_BOOTP_SERVER
+#define BOOTP_SERVER NON_STANDARD_BOOTP_SERVER
+#else
+#define BOOTP_SERVER 67
+#endif
+#ifdef NON_STANDARD_BOOTP_CLIENT
+#define BOOTP_CLIENT NON_STANDARD_BOOTP_CLIENT
+#else
+#define BOOTP_CLIENT 68
+#endif
+#define PROXYDHCP_SERVER 4011 /* For PXE */
+
+#define BOOTP_REQUEST 1
+#define BOOTP_REPLY 2
+
+#define TAG_LEN(p) (*((p)+1))
+#define RFC1533_COOKIE 99, 130, 83, 99
+#define RFC1533_PAD 0
+#define RFC1533_NETMASK 1
+#define RFC1533_TIMEOFFSET 2
+#define RFC1533_GATEWAY 3
+#define RFC1533_TIMESERVER 4
+#define RFC1533_IEN116NS 5
+#define RFC1533_DNS 6
+#define RFC1533_LOGSERVER 7
+#define RFC1533_COOKIESERVER 8
+#define RFC1533_LPRSERVER 9
+#define RFC1533_IMPRESSSERVER 10
+#define RFC1533_RESOURCESERVER 11
+#define RFC1533_HOSTNAME 12
+#define RFC1533_BOOTFILESIZE 13
+#define RFC1533_MERITDUMPFILE 14
+#define RFC1533_DOMAINNAME 15
+#define RFC1533_SWAPSERVER 16
+#define RFC1533_ROOTPATH 17
+#define RFC1533_EXTENSIONPATH 18
+#define RFC1533_IPFORWARDING 19
+#define RFC1533_IPSOURCEROUTING 20
+#define RFC1533_IPPOLICYFILTER 21
+#define RFC1533_IPMAXREASSEMBLY 22
+#define RFC1533_IPTTL 23
+#define RFC1533_IPMTU 24
+#define RFC1533_IPMTUPLATEAU 25
+#define RFC1533_INTMTU 26
+#define RFC1533_INTLOCALSUBNETS 27
+#define RFC1533_INTBROADCAST 28
+#define RFC1533_INTICMPDISCOVER 29
+#define RFC1533_INTICMPRESPOND 30
+#define RFC1533_INTROUTEDISCOVER 31
+#define RFC1533_INTROUTESOLICIT 32
+#define RFC1533_INTSTATICROUTES 33
+#define RFC1533_LLTRAILERENCAP 34
+#define RFC1533_LLARPCACHETMO 35
+#define RFC1533_LLETHERNETENCAP 36
+#define RFC1533_TCPTTL 37
+#define RFC1533_TCPKEEPALIVETMO 38
+#define RFC1533_TCPKEEPALIVEGB 39
+#define RFC1533_NISDOMAIN 40
+#define RFC1533_NISSERVER 41
+#define RFC1533_NTPSERVER 42
+#define RFC1533_VENDOR 43
+#define RFC1533_NBNS 44
+#define RFC1533_NBDD 45
+#define RFC1533_NBNT 46
+#define RFC1533_NBSCOPE 47
+#define RFC1533_XFS 48
+#define RFC1533_XDM 49
+#ifndef NO_DHCP_SUPPORT
+#define RFC2132_REQ_ADDR 50
+#define RFC2132_MSG_TYPE 53
+#define RFC2132_SRV_ID 54
+#define RFC2132_PARAM_LIST 55
+#define RFC2132_MAX_SIZE 57
+#define RFC2132_VENDOR_CLASS_ID 60
+#define RFC2132_CLIENT_ID 61
+#define RFC2132_TFTP_SERVER_NAME 66
+#define RFC2132_BOOTFILE_NAME 67
+#define RFC3004_USER_CLASS 77
+
+#ifdef PXE_DHCP_STRICT
+/*
+ * The following options are acknowledged in RFC3679 because they are
+ * widely used by PXE implementations, but have never been properly
+ * allocated. Despite other PXE options being correctly packed in a
+ * vendor encapsulated field, these are exposed. Sigh. Note that the
+ * client UUID (option 97) is also noted in the PXE spec as using
+ * option 61.
+ */
+#define RFC3679_PXE_CLIENT_ARCH 93
+#define RFC3679_PXE_CLIENT_NDI 94
+#define RFC3679_PXE_CLIENT_UUID 97
+
+/* The lengths are fixed. */
+#define RFC3679_PXE_CLIENT_ARCH_LENGTH 2
+#define RFC3679_PXE_CLIENT_NDI_LENGTH 3
+#define RFC3679_PXE_CLIENT_UUID_LENGTH 17
+
+/*
+ * Values of RFC3679_PXE_CLIENT_ARCH can apparently be one of the
+ * following, according to the PXE spec. The spec only actually
+ * described the 2nd octet, not the first. Duh... assume 0.
+ */
+#define RFC3679_PXE_CLIENT_ARCH_IAX86PC 0,0
+#define RFC3679_PXE_CLIENT_ARCH_NECPC98 0,1
+#define RFC3679_PXE_CLIENT_ARCH_IA64PC 0,2
+#define RFC3679_PXE_CLIENT_ARCH_DECALPHA 0,3
+#define RFC3679_PXE_CLIENT_ARCH_ARCX86 0,4
+#define RFC3679_PXE_CLIENT_ARCH_INTELLEAN 0,5
+
+/*
+ * Only one valid value of NDI type (must be 1) and UNDI version (must
+ * be 2.1)
+ */
+#define RFC3679_PXE_CLIENT_NDI_21 1,2,1
+
+/*
+ * UUID - type must be 1 and then 16 octets of UID, as with the client ID.
+ * The value is a default for testing only
+ */
+#define RFC3679_PXE_CLIENT_UUID_TYPE 0
+#warning "UUID is a default for testing ONLY!"
+#define RFC3679_PXE_CLIENT_UUID_DEFAULT \
+ RFC3679_PXE_CLIENT_UUID_TYPE, \
+ 0xDE,0xAD,0xBE,0xEF, \
+ 0xDE,0xAD,0xBE,0xEF, \
+ 0xDE,0xAD,0xBE,0xEF, \
+ 0xDE,0xAD,0xBE,0xEF
+/*
+ * The Vendor Class ID. Note that the Arch and UNDI version numbers
+ * are fixed and must be same as the ARCH and NDI above.
+ */
+#define RFC2132_VENDOR_CLASS_ID_PXE_LENGTH 32
+#define RFC2132_VENDOR_CLASS_ID_PXE \
+ 'P','X','E','C','l','i','e','n','t',':', \
+ 'A','r','c','h',':','0','0','0','0','0',':', \
+ 'U','N','D','I',':','0','0','2','0','0','1'
+
+/*
+ * The following vendor options are required in the PXE spec to pull
+ * options for the *next* image. The PXE spec doesn't help us with
+ * this (like explaining why).
+ */
+#define RFC1533_VENDOR_PXE_OPT128 128
+#define RFC1533_VENDOR_PXE_OPT129 129
+#define RFC1533_VENDOR_PXE_OPT130 130
+#define RFC1533_VENDOR_PXE_OPT131 131
+#define RFC1533_VENDOR_PXE_OPT132 132
+#define RFC1533_VENDOR_PXE_OPT133 133
+#define RFC1533_VENDOR_PXE_OPT134 134
+#define RFC1533_VENDOR_PXE_OPT135 135
+
+#endif /* PXE_DHCP_STRICT */
+
+#define DHCPDISCOVER 1
+#define DHCPOFFER 2
+#define DHCPREQUEST 3
+#define DHCPACK 5
+#endif /* NO_DHCP_SUPPORT */
+
+#define RFC1533_VENDOR_MAJOR 0
+#define RFC1533_VENDOR_MINOR 0
+
+#define RFC1533_VENDOR_MAGIC 128
+#define RFC1533_VENDOR_ADDPARM 129
+#define RFC1533_VENDOR_ETHDEV 130
+/* We should really apply for an official Etherboot encap option */
+#define RFC1533_VENDOR_ETHERBOOT_ENCAP 150
+/* I'll leave it to FREEBSD to decide if they want to renumber */
+#ifdef IMAGE_FREEBSD
+#define RFC1533_VENDOR_HOWTO 132
+#define RFC1533_VENDOR_KERNEL_ENV 133
+#endif
+#define RFC1533_VENDOR_NIC_DEV_ID 175
+#define RFC1533_VENDOR_ARCH 177
+
+#define RFC1533_END 255
+
+#define BOOTP_VENDOR_LEN 64
+#ifndef NO_DHCP_SUPPORT
+#define DHCP_OPT_LEN 312
+#endif /* NO_DHCP_SUPPORT */
+
+/* Format of a bootp packet */
+struct bootp_t {
+ uint8_t bp_op;
+ uint8_t bp_htype;
+ uint8_t bp_hlen;
+ uint8_t bp_hops;
+ uint32_t bp_xid;
+ uint16_t bp_secs;
+ uint16_t unused;
+ in_addr bp_ciaddr;
+ in_addr bp_yiaddr;
+ in_addr bp_siaddr;
+ in_addr bp_giaddr;
+ uint8_t bp_hwaddr[16];
+ uint8_t bp_sname[64];
+ char bp_file[128];
+#ifdef NO_DHCP_SUPPORT
+ uint8_t bp_vend[BOOTP_VENDOR_LEN];
+#else
+ uint8_t bp_vend[DHCP_OPT_LEN];
+#endif /* NO_DHCP_SUPPORT */
+};
+
+/* Format of a bootp IP packet */
+struct bootpip_t
+{
+ struct iphdr ip;
+ struct udphdr udp;
+ struct bootp_t bp;
+};
+
+/* Format of bootp packet with extensions */
+struct bootpd_t {
+ struct bootp_t bootp_reply;
+ uint8_t bootp_extension[MAX_BOOTP_EXTLEN];
+};
+
+#endif /* _BOOTP_H */
diff --git a/src/include/btext.h b/src/include/btext.h
new file mode 100644
index 000000000..15241cd39
--- /dev/null
+++ b/src/include/btext.h
@@ -0,0 +1,76 @@
+/*
+ * This file describes the structure passed from the BootX application
+ * (for MacOS) when it is used to boot Linux.
+ *
+ * Written by Benjamin Herrenschmidt.
+ *
+ * Move to LinuxBIOS by LYH yhlu@tyan.com
+ *
+ */
+
+
+#ifndef _BTEXT_H__
+#define _BTEXT_H__
+
+#if 1
+#define u32 unsigned int
+#define u16 unsigned short
+#define u8 unsigned char
+#endif
+
+/* Here are the boot informations that are passed to the bootstrap
+ * Note that the kernel arguments and the device tree are appended
+ * at the end of this structure. */
+typedef struct boot_infos
+{
+
+ /* NEW (vers. 2) this holds the current _logical_ base addr of
+ the frame buffer (for use by early boot message) */
+ u8* logicalDisplayBase;
+
+
+ /* Some infos about the current MacOS display */
+ u32 dispDeviceRect[4]; /* left,top,right,bottom */
+ u32 dispDeviceDepth; /* (8, 16 or 32) */
+ u8* dispDeviceBase; /* base address (physical) */
+ u32 dispDeviceRowBytes; /* rowbytes (in bytes) */
+ u32 dispDeviceColorsOffset; /* Colormap (8 bits only) or 0 (*) */
+
+
+ /* The framebuffer size (optional, currently 0) */
+ u32 frameBufferSize; /* Represents a max size, can be 0. */
+
+
+} boot_infos_t;
+
+/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index is represented
+ * by 3 short words containing a 16 bits (unsigned) color component.
+ * Later versions may contain the gamma table for direct-color devices here.
+ */
+#define BOOTX_COLORTABLE_SIZE (256UL*3UL*2UL)
+
+
+/*
+ * Definitions for using the procedures in btext.c.
+ *
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ */
+
+extern void btext_clearscreen(void);
+
+extern boot_infos_t disp_bi;
+extern u32 boot_text_mapped;
+
+void btext_setup_display(u32 width, u32 height, u32 depth, u32 pitch,
+ unsigned long address);
+void map_boot_text(void);
+
+void btext_drawchar(char c);
+void btext_drawstring(const char *str);
+void btext_drawhex(u32 v);
+
+void btext_putc(int c);
+
+void btext_init(void);
+
+#endif /* _BTEXT_H */
diff --git a/src/include/byteswap.h b/src/include/byteswap.h
new file mode 100644
index 000000000..bed14857b
--- /dev/null
+++ b/src/include/byteswap.h
@@ -0,0 +1,20 @@
+#ifndef ETHERBOOT_BYTESWAP_H
+#define ETHERBOOT_BYTESWAP_H
+
+#include "endian.h"
+#include "bits/byteswap.h"
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#include "little_bswap.h"
+#endif
+#if __BYTE_ORDER == __BIG_ENDIAN
+#include "big_bswap.h"
+#endif
+
+/* Make routines available to all */
+#define swap32(x) __bswap_32(x)
+#define swap16(x) __bswap_16(x)
+#define bswap_32(x) __bswap_32(x)
+#define bswap_16(x) __bswap_16(x)
+
+#endif /* ETHERBOOT_BYTESWAP_H */
diff --git a/src/include/callbacks.h b/src/include/callbacks.h
new file mode 100644
index 000000000..2a7547850
--- /dev/null
+++ b/src/include/callbacks.h
@@ -0,0 +1,45 @@
+/* Callout/callback interface for Etherboot
+ *
+ * This file provides the mechanisms for making calls from Etherboot
+ * to external programs and vice-versa.
+ *
+ * Initial version by Michael Brown <mbrown@fensystems.co.uk>, January 2004.
+ *
+ * $Id$
+ */
+
+#ifndef CALLBACKS_H
+#define CALLBACKS_H
+
+/* Opcodes and flags for in_call()
+ */
+#define EB_OPCODE(x) ( (x) & 0xffff )
+#define EB_OPCODE_MAIN (0x0000)
+#define EB_OPCODE_CHECK (0x6948) /* 'Hi' */
+#define EB_OPCODE_PXE (0x7850) /* 'Px' */
+#define EB_OPCODE_PXENV (0x7650) /* 'Pv' */
+#define EB_USE_INTERNAL_STACK ( 1 << 16 )
+#define EB_CALL_FROM_REAL_MODE ( 1 << 17 ) /* i386 only */
+#define EB_SKIP_OPCODE ( 1 << 18 )
+
+/* Standard return codes
+ */
+#define EB_CHECK_RESULT (0x6f486948) /* 'HiHo' */
+
+/* Include arch-specific callbacks bits
+ */
+#include "callbacks_arch.h"
+
+/* Skip the definitions that won't make sense to the assembler */
+#ifndef ASSEMBLY
+
+#include <stdarg.h>
+
+#ifndef in_call_data_t
+typedef struct {} empty_struct_t;
+#define in_call_data_t empty_struct_t
+#endif
+
+#endif /* ASSEMBLY */
+
+#endif /* CALLBACKS_H */
diff --git a/src/include/coff.h b/src/include/coff.h
new file mode 100644
index 000000000..a73fda527
--- /dev/null
+++ b/src/include/coff.h
@@ -0,0 +1,73 @@
+#ifndef COFF_H
+#define COFF_H
+/* Based on the elf.h file
+ * Changed accordingly to support COFF file support
+ */
+
+
+/* Values for f_flags. */
+#define F_RELFLG 0x0001 /* If set, not reloc. info. Clear for executables */
+#define F_EXEC 0x0002 /* No unresolved symbols. Executable file ! */
+#define F_LNNO 0x0004 /* If set, line information numbers removed */
+#define F_LSYMS 0x0008 /* If set, local symbols removed */
+#define F_AR32WR 0x0100 /* Indicates little endian file */
+
+/* Values for e_machine (architecute). */
+#define EM_E1 0x17a /* Magic number for Hyperstone. Big endian format */
+
+/* Values for f_flags. */
+#define O_MAGIC 0x017c /* Optional's header magic number for Hyperstone */
+
+/* Values for s_flags. */
+#define S_TYPE_TEXT 0x0020 /* If set, the section contains only executable */
+#define S_TYPE_DATA 0x0040 /* If set, the section contains only initialized data */
+#define S_TYPE_BSS 0x0080 /* If set, the section is BSS no data stored */
+
+
+typedef struct
+{
+ unsigned short f_magic; /* magic number */
+ unsigned short f_nscns; /* number of sections */
+ unsigned long f_timdat; /* time & date stamp */
+ unsigned long f_symptr; /* file pointer to symtab */
+ unsigned long f_nsyms; /* number of symtab entries */
+ unsigned short f_opthdr; /* sizeof(optional hdr) */
+ unsigned short f_flags; /* flags */
+}
+COFF_filehdr;
+
+/*
+ * Optional header.
+ */
+typedef struct
+{
+ unsigned short magic; /* type of file */
+ unsigned short vstamp; /* version stamp */
+ unsigned long tsize; /* text size in bytes, padded to FW bdry*/
+ unsigned long dsize; /* initialized data " " */
+ unsigned long bsize; /* uninitialized data " " */
+ unsigned long entry; /* entry pt. */
+ unsigned long text_start; /* base of text used for this file */
+ unsigned long data_start; /* base of data used for this file */
+}
+COFF_opthdr;
+
+/*
+ * Section header.
+ */
+typedef struct
+{
+ char s_name[8]; /* section name */
+ unsigned long s_paddr; /* physical address, aliased s_nlib */
+ unsigned long s_vaddr; /* virtual address */
+ unsigned long s_size; /* section size */
+ unsigned long s_scnptr; /* file ptr to raw data for section */
+ unsigned long s_relptr; /* file ptr to relocation */
+ unsigned long s_lnnoptr; /* file ptr to line numbers */
+ unsigned short s_nreloc; /* number of relocation entries */
+ unsigned short s_nlnno; /* number of line number entries*/
+ unsigned long s_flags; /* flags */
+}
+COFF_scnhdr;
+
+#endif /* COFF_H */
diff --git a/src/include/cpu.h b/src/include/cpu.h
new file mode 100644
index 000000000..b2c428f77
--- /dev/null
+++ b/src/include/cpu.h
@@ -0,0 +1,6 @@
+#ifndef CPU_H
+#define CPU_H
+
+#include "bits/cpu.h"
+
+#endif /* CPU_H */
diff --git a/src/include/debug.h b/src/include/debug.h
new file mode 100644
index 000000000..bb5d33f3c
--- /dev/null
+++ b/src/include/debug.h
@@ -0,0 +1,28 @@
+#ifndef DEBUG_H
+#define DEBUG_H
+
+//#include <lib.h>
+extern int last_putchar;
+
+/* Defining DEBUG_THIS before including this file enables debug() macro
+ * for the file. DEBUG_ALL is for global control. */
+
+#if DEBUG_THIS || DEBUG_ALL
+#define DEBUG 1
+#else
+#undef DEBUG
+#endif
+
+#if DEBUG
+# define debug(...) \
+ ((last_putchar=='\n' ? printf("%s: ", __FUNCTION__) : 0), \
+ printf(__VA_ARGS__))
+# define debug_hexdump hexdump
+#else
+# define debug(...) /* nothing */
+# define debug_hexdump(...) /* nothing */
+#endif
+
+#define debugx debug
+
+#endif /* DEBUG_H */
diff --git a/src/include/dev.h b/src/include/dev.h
new file mode 100644
index 000000000..bd352eb70
--- /dev/null
+++ b/src/include/dev.h
@@ -0,0 +1,126 @@
+#ifndef DEV_H
+#define DEV_H
+
+#include "isa.h"
+#include "pci.h"
+
+/* Need to check the packing of this struct if Etherboot is ported */
+struct dev_id
+{
+ unsigned short vendor_id;
+ unsigned short device_id;
+ unsigned char bus_type;
+#define PCI_BUS_TYPE 1
+#define ISA_BUS_TYPE 2
+};
+
+/* Dont use sizeof, that will include the padding */
+#define DEV_ID_SIZE 8
+
+
+struct pci_probe_state
+{
+#ifdef CONFIG_PCI
+ struct pci_device dev;
+ int advance;
+#else
+ int dummy;
+#endif
+};
+struct isa_probe_state
+{
+#ifdef CONFIG_ISA
+ const struct isa_driver *driver;
+ int advance;
+#else
+ int dummy;
+#endif
+};
+
+union probe_state
+{
+ struct pci_probe_state pci;
+ struct isa_probe_state isa;
+};
+
+struct dev
+{
+ void (*disable)P((struct dev *));
+ struct dev_id devid; /* device ID string (sent to DHCP server) */
+ int index; /* Index of next device on this controller to probe */
+ int type; /* Type of device I am probing for */
+ int how_probe; /* First, next or awake */
+ int to_probe; /* Flavor of device I am probing */
+ int failsafe; /* Failsafe probe requested */
+ int type_index; /* Index of this device (within type) */
+#define PROBE_NONE 0
+#define PROBE_PCI 1
+#define PROBE_ISA 2
+ union probe_state state;
+};
+
+
+#define NIC_DRIVER 0
+#define DISK_DRIVER 1
+#define FLOPPY_DRIVER 2
+
+#define BRIDGE_DRIVER 1000
+
+#define PROBE_FIRST (-1)
+#define PROBE_NEXT 0
+#define PROBE_AWAKE 1 /* After calling disable bring up the same device */
+
+/* The probe result codes are selected
+ * to allow them to be fed back into the probe
+ * routine and get a successful probe.
+ */
+#define PROBE_FAILED PROBE_FIRST
+#define PROBE_WORKED PROBE_NEXT
+
+extern int probe(struct dev *dev);
+extern void disable(struct dev *dev);
+
+/* Boot option values
+ * option & BOOT_TYPE_MASK should equal a driver for probing
+ */
+
+#define BOOT_NIC 0x0 /* Boot from a nic */
+#define BOOT_DISK 0x1 /* Boot from disk */
+#define BOOT_FLOPPY 0x2 /* Boot from a floppy */
+
+#define BOOT_NOTHING 0x3 /* Last valid boot choice */
+
+/* Do magic failsafe boot processing */
+#define BOOT_FAILSAFE 0x8
+
+#define BOOT_BITS 4
+#define BOOT_MASK ((1 << (BOOT_BITS)) - 1)
+#define BOOT_TYPE_MASK ((1 << (BOOT_BITS - 1)) - 1)
+
+#define MAX_BOOT_ENTRIES 3
+
+#define BOOT_ALL_VALUE (1<<BOOT_FIRST|1<<BOOT_SECOND|1<<BOOT_THIRD)
+
+/* These could be customised for different languages perhaps */
+#if BOOT_ALL_VALUE&(1<<BOOT_DISK)
+#define BOOT_DISK_PROMPT "(D)isk "
+#else
+#define BOOT_DISK_PROMPT
+#endif
+
+#if BOOT_ALL_VALUE&(1<<BOOT_FLOPPY)
+#define BOOT_FLOPPY_PROMPT "(F)loppy "
+#else
+#define BOOT_FLOPPY_PROMPT
+#endif
+
+#define ASK_PROMPT \
+ "Boot from (N)etwork " BOOT_DISK_PROMPT BOOT_FLOPPY_PROMPT "or (Q)uit? "
+
+#define ANS_NETWORK 'N'
+#define ANS_DISK 'D'
+#define ANS_FLOPPY 'F'
+#define ANS_QUIT 'Q'
+#define ANS_DEFAULT '\n'
+
+#endif /* DEV_H */
diff --git a/src/include/disk.h b/src/include/disk.h
new file mode 100644
index 000000000..739902f7e
--- /dev/null
+++ b/src/include/disk.h
@@ -0,0 +1,53 @@
+#ifndef DISK_H
+#define DISK_H
+
+#include "dev.h"
+
+/*
+ * Structure returned from disk_probe and passed to other driver
+ * functions.
+ */
+struct disk
+{
+ struct dev dev; /* This must come first */
+ int (*read)(struct disk *, sector_t sector);
+ unsigned int drive;
+ unsigned long hw_sector_size; /* The hardware sector size for dealing
+ * with partition tables and the like.
+ * Must be >= 512
+ */
+ unsigned int sectors_per_read; /* The number of 512 byte sectors
+ * returned by each read call.
+ * All I/O must be aligned to this size.
+ */
+ unsigned int bytes; /* The number of bytes in the read buffer. */
+ sector_t sectors; /* The number of sectors on the drive. */
+ sector_t sector; /* The first sector in the driver buffer */
+ unsigned char *buffer; /* The data read from the drive */
+ void *priv; /* driver can hang private data here */
+
+ unsigned long disk_offset;
+ int direction;
+};
+
+extern struct disk disk;
+extern int url_file(const char *name,
+ int (*fnc)(unsigned char *, unsigned int, unsigned int, int));
+
+extern int disk_probe(struct dev *dev);
+extern int disk_load_configuration(struct dev *dev);
+extern int disk_load(struct dev *dev);
+extern void disk_disable(void);
+
+
+#ifndef DOWNLOAD_PROTO_DISK
+#define disk_disable() do { } while(0)
+#endif
+
+#define SECTOR_SIZE 512
+#define SECTOR_SHIFT 9
+
+/* Maximum block_size that may be set. */
+#define DISK_BUFFER_SIZE (18 * SECTOR_SIZE)
+
+#endif /* DISK_H */
diff --git a/src/include/dns_resolver.h b/src/include/dns_resolver.h
new file mode 100644
index 000000000..b04a9764f
--- /dev/null
+++ b/src/include/dns_resolver.h
@@ -0,0 +1,58 @@
+// dns_resolver.h - #define statements for the DNS resolver
+
+// We only need A and CNAME queries (later possibly AAAA/A6?)
+#define QUERYTYPE_A 1
+#define QUERYTYPE_CNAME 5
+
+// We only query with INTERNET class (not CHAOS or whatever)
+#define QUERYCLASS_INET 1
+
+// Our first query will have the identifier <1> (arbitrary -
+// remember however that (256 - QUERYIDENTIFIER)/2 > MAX_CNAME_RECURSION !!!
+#define QUERYIDENTIFIER 1
+
+// Query flags are standard values here
+#define QUERYFLAGS 0x0100
+#define QUERYFLAGS_MASK 0xf8
+#define QUERYFLAGS_WANT 0x80
+
+// Indices inside the byte array that holds DNS queries/answers
+#define QINDEX_ID 0
+#define QINDEX_FLAGS 2
+#define QINDEX_NUMQUEST 4
+#define QINDEX_NUMANSW 6
+#define QINDEX_NUMAUTH 8
+#define QINDEX_NUMADDIT 10
+#define QINDEX_QUESTION 12
+#define QINDEX_QTYPE 14
+#define QINDEX_QCLASS 16
+#define QINDEX_STORE_A 256
+
+// Constant UDP port number for DNS traffic
+#define UDP_PORT_DNS 53
+
+// Return values that the package parser may give
+// This packet was not for us (broadcast or whatever)
+#define RET_PACK_GARBAG 0
+// Retrieved an address - query finishes
+#define RET_GOT_ADDR 1
+// No A record for that hostname - try running a CNAME query
+#define RET_RUN_CNAME_Q 2
+// The CNAME query returned a valid hostname - run A query on that
+#define RET_RUN_NEXT_A 3
+// The CNAME query failed - stop resolving
+#define RET_CNAME_FAIL 4
+// We have a reliable input that claims that the hostname does not exist
+#define RET_NOSUCHNAME 5
+// The name server response is somehow bogus/can not be parsed -> Abort
+#define RET_DNSERROR 6
+
+// Return values that the query engine may give
+// DNS query succeeded, IP address delivered
+#define RET_DNS_OK 0
+// DNS query failed
+#define RET_DNS_FAIL 1
+
+// Error codes the DNS server can send to us
+#define ERR_NOSUCHNAME 3
+
diff --git a/src/include/elf.h b/src/include/elf.h
new file mode 100644
index 000000000..606b4192a
--- /dev/null
+++ b/src/include/elf.h
@@ -0,0 +1,234 @@
+#ifndef ELF_H
+#define ELF_H
+
+#define EI_NIDENT 16 /* Size of e_ident array. */
+
+/* Values for e_type. */
+#define ET_NONE 0 /* No file type */
+#define ET_REL 1 /* Relocatable file */
+#define ET_EXEC 2 /* Executable file */
+#define ET_DYN 3 /* Shared object file */
+#define ET_CORE 4 /* Core file */
+
+/* Values for e_machine (architecute). */
+#define EM_NONE 0 /* No machine */
+#define EM_M32 1 /* AT&T WE 32100 */
+#define EM_SPARC 2 /* SUN SPARC */
+#define EM_386 3 /* Intel 80386+ */
+#define EM_68K 4 /* Motorola m68k family */
+#define EM_88K 5 /* Motorola m88k family */
+#define EM_486 6 /* Perhaps disused */
+#define EM_860 7 /* Intel 80860 */
+#define EM_MIPS 8 /* MIPS R3000 big-endian */
+#define EM_S370 9 /* IBM System/370 */
+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */
+
+#define EM_PARISC 15 /* HPPA */
+#define EM_VPP500 17 /* Fujitsu VPP500 */
+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
+#define EM_960 19 /* Intel 80960 */
+#define EM_PPC 20 /* PowerPC */
+#define EM_PPC64 21 /* PowerPC 64-bit */
+#define EM_S390 22 /* IBM S390 */
+
+#define EM_V800 36 /* NEC V800 series */
+#define EM_FR20 37 /* Fujitsu FR20 */
+#define EM_RH32 38 /* TRW RH-32 */
+#define EM_RCE 39 /* Motorola RCE */
+#define EM_ARM 40 /* ARM */
+#define EM_FAKE_ALPHA 41 /* Digital Alpha */
+#define EM_SH 42 /* Hitachi SH */
+#define EM_SPARCV9 43 /* SPARC v9 64-bit */
+#define EM_TRICORE 44 /* Siemens Tricore */
+#define EM_ARC 45 /* Argonaut RISC Core */
+#define EM_H8_300 46 /* Hitachi H8/300 */
+#define EM_H8_300H 47 /* Hitachi H8/300H */
+#define EM_H8S 48 /* Hitachi H8S */
+#define EM_H8_500 49 /* Hitachi H8/500 */
+#define EM_IA_64 50 /* Intel Merced */
+#define EM_MIPS_X 51 /* Stanford MIPS-X */
+#define EM_COLDFIRE 52 /* Motorola Coldfire */
+#define EM_68HC12 53 /* Motorola M68HC12 */
+#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/
+#define EM_PCP 55 /* Siemens PCP */
+#define EM_NCPU 56 /* Sony nCPU embeeded RISC */
+#define EM_NDR1 57 /* Denso NDR1 microprocessor */
+#define EM_STARCORE 58 /* Motorola Start*Core processor */
+#define EM_ME16 59 /* Toyota ME16 processor */
+#define EM_ST100 60 /* STMicroelectronic ST100 processor */
+#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/
+#define EM_X86_64 62 /* AMD x86-64 architecture */
+#define EM_PDSP 63 /* Sony DSP Processor */
+
+#define EM_FX66 66 /* Siemens FX66 microcontroller */
+#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */
+#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */
+#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */
+#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */
+#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */
+#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */
+#define EM_SVX 73 /* Silicon Graphics SVx */
+#define EM_AT19 74 /* STMicroelectronics ST19 8 bit mc */
+#define EM_VAX 75 /* Digital VAX */
+#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
+#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */
+#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */
+#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */
+#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */
+#define EM_HUANY 81 /* Harvard University machine-independent object files */
+#define EM_PRISM 82 /* SiTera Prism */
+#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */
+#define EM_FR30 84 /* Fujitsu FR30 */
+#define EM_D10V 85 /* Mitsubishi D10V */
+#define EM_D30V 86 /* Mitsubishi D30V */
+#define EM_V850 87 /* NEC v850 */
+#define EM_M32R 88 /* Mitsubishi M32R */
+#define EM_MN10300 89 /* Matsushita MN10300 */
+#define EM_MN10200 90 /* Matsushita MN10200 */
+#define EM_PJ 91 /* picoJava */
+#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
+#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
+#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
+#define EM_NUM 95
+
+/* Values for p_type. */
+#define PT_NULL 0 /* Unused entry. */
+#define PT_LOAD 1 /* Loadable segment. */
+#define PT_DYNAMIC 2 /* Dynamic linking information segment. */
+#define PT_INTERP 3 /* Pathname of interpreter. */
+#define PT_NOTE 4 /* Auxiliary information. */
+#define PT_SHLIB 5 /* Reserved (not used). */
+#define PT_PHDR 6 /* Location of program header itself. */
+
+/* Values for p_flags. */
+#define PF_X 0x1 /* Executable. */
+#define PF_W 0x2 /* Writable. */
+#define PF_R 0x4 /* Readable. */
+
+
+#define ELF_PROGRAM_RETURNS_BIT 0x8000000 /* e_flags bit 31 */
+
+#define EI_MAG0 0
+#define ELFMAG0 0x7f
+
+#define EI_MAG1 1
+#define ELFMAG1 'E'
+
+#define EI_MAG2 2
+#define ELFMAG2 'L'
+
+#define EI_MAG3 3
+#define ELFMAG3 'F'
+
+#define ELFMAG "\177ELF"
+
+#define EI_CLASS 4 /* File class byte index */
+#define ELFCLASSNONE 0 /* Invalid class */
+#define ELFCLASS32 1 /* 32-bit objects */
+#define ELFCLASS64 2 /* 64-bit objects */
+
+#define EI_DATA 5 /* Data encodeing byte index */
+#define ELFDATANONE 0 /* Invalid data encoding */
+#define ELFDATA2LSB 1 /* 2's complement little endian */
+#define ELFDATA2MSB 2 /* 2's complement big endian */
+
+#define EI_VERSION 6 /* File version byte index */
+ /* Value must be EV_CURRENT */
+
+#define EV_NONE 0 /* Invalid ELF Version */
+#define EV_CURRENT 1 /* Current version */
+
+#define ELF32_PHDR_SIZE (8*4) /* Size of an elf program header */
+
+#ifndef ASSEMBLY
+/*
+ * ELF definitions common to all 32-bit architectures.
+ */
+
+typedef uint32_t Elf32_Addr;
+typedef uint16_t Elf32_Half;
+typedef uint32_t Elf32_Off;
+typedef int32_t Elf32_Sword;
+typedef uint32_t Elf32_Word;
+typedef uint32_t Elf32_Size;
+
+typedef uint64_t Elf64_Addr;
+typedef uint16_t Elf64_Half;
+typedef uint64_t Elf64_Off;
+typedef int32_t Elf64_Sword;
+typedef uint32_t Elf64_Word;
+typedef uint64_t Elf64_Size;
+
+/*
+ * ELF header.
+ */
+typedef struct {
+ unsigned char e_ident[EI_NIDENT]; /* File identification. */
+ Elf32_Half e_type; /* File type. */
+ Elf32_Half e_machine; /* Machine architecture. */
+ Elf32_Word e_version; /* ELF format version. */
+ Elf32_Addr e_entry; /* Entry point. */
+ Elf32_Off e_phoff; /* Program header file offset. */
+ Elf32_Off e_shoff; /* Section header file offset. */
+ Elf32_Word e_flags; /* Architecture-specific flags. */
+ Elf32_Half e_ehsize; /* Size of ELF header in bytes. */
+ Elf32_Half e_phentsize; /* Size of program header entry. */
+ Elf32_Half e_phnum; /* Number of program header entries. */
+ Elf32_Half e_shentsize; /* Size of section header entry. */
+ Elf32_Half e_shnum; /* Number of section header entries. */
+ Elf32_Half e_shstrndx; /* Section name strings section. */
+} Elf32_Ehdr;
+
+typedef struct {
+ unsigned char e_ident[EI_NIDENT]; /* File identification. */
+ Elf64_Half e_type; /* File type. */
+ Elf64_Half e_machine; /* Machine architecture. */
+ Elf64_Word e_version; /* ELF format version. */
+ Elf64_Addr e_entry; /* Entry point. */
+ Elf64_Off e_phoff; /* Program header file offset. */
+ Elf64_Off e_shoff; /* Section header file offset. */
+ Elf64_Word e_flags; /* Architecture-specific flags. */
+ Elf64_Half e_ehsize; /* Size of ELF header in bytes. */
+ Elf64_Half e_phentsize; /* Size of program header entry. */
+ Elf64_Half e_phnum; /* Number of program header entries. */
+ Elf64_Half e_shentsize; /* Size of section header entry. */
+ Elf64_Half e_shnum; /* Number of section header entries. */
+ Elf64_Half e_shstrndx; /* Section name strings section. */
+} Elf64_Ehdr;
+
+/*
+ * Program header.
+ */
+typedef struct {
+ Elf32_Word p_type; /* Entry type. */
+ Elf32_Off p_offset; /* File offset of contents. */
+ Elf32_Addr p_vaddr; /* Virtual address (not used). */
+ Elf32_Addr p_paddr; /* Physical address. */
+ Elf32_Size p_filesz; /* Size of contents in file. */
+ Elf32_Size p_memsz; /* Size of contents in memory. */
+ Elf32_Word p_flags; /* Access permission flags. */
+ Elf32_Size p_align; /* Alignment in memory and file. */
+} Elf32_Phdr;
+
+typedef struct {
+ Elf64_Word p_type; /* Entry type. */
+ Elf64_Word p_flags; /* Access permission flags. */
+ Elf64_Off p_offset; /* File offset of contents. */
+ Elf64_Addr p_vaddr; /* Virtual address (not used). */
+ Elf64_Addr p_paddr; /* Physical address. */
+ Elf64_Size p_filesz; /* Size of contents in file. */
+ Elf64_Size p_memsz; /* Size of contents in memory. */
+ Elf64_Size p_align; /* Alignment in memory and file. */
+} Elf64_Phdr;
+
+/* Standardized Elf image notes for booting... The name for all of these is ELFBoot */
+
+
+/* ELF Defines for the current architecture */
+#include "bits/elf.h"
+
+#endif /* ASSEMBLY */
+
+#include "elf_boot.h"
+
+#endif /* ELF_H */
diff --git a/src/include/elf_boot.h b/src/include/elf_boot.h
new file mode 100644
index 000000000..878a870a8
--- /dev/null
+++ b/src/include/elf_boot.h
@@ -0,0 +1,84 @@
+#ifndef ELF_BOOT_H
+#define ELF_BOOT_H
+
+
+/* This defines the structure of a table of parameters useful for ELF
+ * bootable images. These parameters are all passed and generated
+ * by the bootloader to the booted image. For simplicity and
+ * consistency the Elf Note format is reused.
+ *
+ * All of the information must be Position Independent Data.
+ * That is it must be safe to relocate the whole ELF boot parameter
+ * block without changing the meaning or correctnes of the data.
+ * Additionally it must be safe to permute the order of the ELF notes
+ * to any possible permutation without changing the meaning or correctness
+ * of the data.
+ *
+ */
+
+#define ELF_BHDR_MAGIC 0x0E1FB007
+
+#ifndef ASSEMBLY
+#include <stdint.h>
+typedef uint16_t Elf_Half;
+typedef uint32_t Elf_Word;
+
+typedef struct Elf_Bhdr
+{
+ Elf_Word b_signature; /* "0x0E1FB007" */
+ Elf_Word b_size;
+ Elf_Half b_checksum;
+ Elf_Half b_records;
+} Elf_Bhdr;
+
+typedef struct Elf_Nhdr
+{
+ Elf_Word n_namesz; /* Length of the note's name. */
+ Elf_Word n_descsz; /* Length of the note's descriptor. */
+ Elf_Word n_type; /* Type of the note. */
+} Elf_Nhdr;
+
+#endif /* ASSEMBLY */
+
+/* Standardized Elf image notes for booting... The name for all of these is ELFBoot */
+#define ELF_NOTE_BOOT "ELFBoot"
+
+#define EIN_PROGRAM_NAME 0x00000001
+/* The program in this ELF file */
+#define EIN_PROGRAM_VERSION 0x00000002
+/* The version of the program in this ELF file */
+#define EIN_PROGRAM_CHECKSUM 0x00000003
+/* ip style checksum of the memory image. */
+
+
+/* Notes that are passed to a loaded image */
+/* For standard notes n_namesz must be zero */
+#define EBN_FIRMWARE_TYPE 0x00000001
+/* ASCIZ name of the platform firmware. */
+#define EBN_BOOTLOADER_NAME 0x00000002
+/* This specifies just the ASCIZ name of the bootloader */
+#define EBN_BOOTLOADER_VERSION 0x00000003
+/* This specifies the version of the bootloader as an ASCIZ string */
+#define EBN_COMMAND_LINE 0x00000004
+/* This specifies a command line that can be set by user interaction,
+ * and is provided as a free form ASCIZ string to the loaded image.
+ */
+#define EBN_NOP 0x00000005
+/* A note nop note has no meaning, useful for inserting explicit padding */
+#define EBN_LOADED_IMAGE 0x00000006
+/* An ASCIZ string naming the loaded image */
+
+
+/* Etherboot specific notes */
+#define EB_PARAM_NOTE "Etherboot"
+#define EB_IA64_SYSTAB 0x00000001
+#define EB_IA64_MEMMAP 0x00000002
+#define EB_IA64_FPSWA 0x00000003
+#define EB_IA64_CONINFO 0x00000004
+#define EB_BOOTP_DATA 0x00000005
+#define EB_HEADER 0x00000006
+#define EB_IA64_IMAGE_HANDLE 0x00000007
+#define EB_I386_MEMMAP 0x00000008
+
+
+#endif /* ELF_BOOT_H */
diff --git a/src/include/endian.h b/src/include/endian.h
new file mode 100644
index 000000000..320062248
--- /dev/null
+++ b/src/include/endian.h
@@ -0,0 +1,19 @@
+#ifndef ETHERBOOT_ENDIAN_H
+#define ETHERBOOT_ENDIAN_H
+
+/* Definitions for byte order, according to significance of bytes,
+ from low addresses to high addresses. The value is what you get by
+ putting '4' in the most significant byte, '3' in the second most
+ significant byte, '2' in the second least significant byte, and '1'
+ in the least significant byte, and then writing down one digit for
+ each byte, starting with the byte at the lowest address at the left,
+ and proceeding to the byte with the highest address at the right. */
+
+#define __LITTLE_ENDIAN 1234
+#define __BIG_ENDIAN 4321
+#define __PDP_ENDIAN 3412
+
+#include "bits/endian.h"
+
+
+#endif /* ETHERBOOT_ENDIAN_H */
diff --git a/src/include/etherboot.h b/src/include/etherboot.h
new file mode 100644
index 000000000..3d01fb9e8
--- /dev/null
+++ b/src/include/etherboot.h
@@ -0,0 +1,459 @@
+#ifndef ETHERBOOT_H
+#define ETHERBOOT_H
+
+#include <stdarg.h>
+#include "osdep.h"
+
+#ifndef BOOT_FIRST
+#define BOOT_FIRST BOOT_NIC
+#endif
+#ifndef BOOT_SECOND
+#define BOOT_SECOND BOOT_NOTHING
+#endif
+#ifndef BOOT_THIRD
+#define BOOT_THIRD BOOT_NOTHING
+#endif
+
+#define DEFAULT_BOOT_ORDER ( \
+ (BOOT_FIRST << (0*BOOT_BITS)) | \
+ (BOOT_SECOND << (1*BOOT_BITS)) | \
+ (BOOT_THIRD << (2*BOOT_BITS)) | \
+ (BOOT_NOTHING << (3*BOOT_BITS)) | \
+ 0)
+
+#ifdef BOOT_INDEX
+#define DEFAULT_BOOT_INDEX BOOT_INDEX
+#else
+#define DEFAULT_BOOT_INDEX 0
+#endif
+
+#if !defined(TAGGED_IMAGE) && !defined(AOUT_IMAGE) && !defined(ELF_IMAGE) && !defined(ELF64_IMAGE) && !defined(COFF_IMAGE) && !defined(RAW_IMAGE)
+#define TAGGED_IMAGE /* choose at least one */
+#endif
+
+#undef CODE16
+#if defined(PCBIOS)
+#define CODE16
+#endif
+
+#define K_ESC '\033'
+#define K_EOF '\04' /* Ctrl-D */
+#define K_INTR '\03' /* Ctrl-C */
+
+/* Edit this to change the path to hostspecific kernel image
+ kernel.<client_ip_address> in RARP boot */
+#ifndef DEFAULT_KERNELPATH
+#define DEFAULT_KERNELPATH "/tftpboot/kernel.%@"
+#endif
+
+#ifdef FREEBSD_PXEEMU
+#undef DEFAULT_BOOTFILE
+#ifndef PXENFSROOTPATH
+#define PXENFSROOTPATH ""
+#endif
+#define DEFAULT_BOOTFILE PXENFSROOTPATH "/boot/pxeboot"
+#endif
+
+/* Clean up console settings... mainly CONSOLE_FIRMWARE and CONSOLE_SERIAL are used
+ * in the sources (except start.S and serial.S which cannot include
+ * etherboot.h). At least one of the CONSOLE_xxx has to be set, and
+ * CONSOLE_DUAL sets both CONSOLE_CRT and CONSOLE_SERIAL. If none is set,
+ * CONSOLE_CRT is assumed. */
+#ifdef CONSOLE_CRT
+#define CONSOLE_FIRMWARE
+#endif
+#ifdef CONSOLE_DUAL
+#undef CONSOLE_FIRMWARE
+#define CONSOLE_FIRMWARE
+#undef CONSOLE_SERIAL
+#define CONSOLE_SERIAL
+#endif
+#if defined(CONSOLE_FIRMWARE) && defined(CONSOLE_SERIAL)
+#undef CONSOLE_DUAL
+#define CONSOLE_DUAL
+#endif
+#if !defined(CONSOLE_FIRMWARE) && !defined(CONSOLE_SERIAL)
+#define CONSOLE_FIRMWARE
+#endif
+
+#if !defined(DOWNLOAD_PROTO_TFTP) && !defined(DOWNLOAD_PROTO_NFS) && !defined(DOWNLOAD_PROTO_SLAM) && !defined(DOWNLOAD_PROTO_TFTM) && !defined(DOWNLOAD_PROTO_DISK) && !defined(DOWNLOAD_PROTO_HTTP)
+#error No download protocol defined!
+#endif
+
+#ifndef MAX_TFTP_RETRIES
+#define MAX_TFTP_RETRIES 20
+#endif
+
+#ifndef MAX_BOOTP_RETRIES
+#define MAX_BOOTP_RETRIES 20
+#endif
+
+#define MAX_BOOTP_EXTLEN (ETH_MAX_MTU-sizeof(struct bootpip_t))
+
+#ifndef MAX_ARP_RETRIES
+#define MAX_ARP_RETRIES 20
+#endif
+
+#ifndef MAX_RPC_RETRIES
+#define MAX_RPC_RETRIES 20
+#endif
+
+/* Link configuration time in tenths of a second */
+#ifndef VALID_LINK_TIMEOUT
+#define VALID_LINK_TIMEOUT 100 /* 10.0 seconds */
+#endif
+
+/* Inter-packet retry in ticks */
+#ifndef TIMEOUT
+#define TIMEOUT (10*TICKS_PER_SEC)
+#endif
+
+#ifndef BOOTP_TIMEOUT
+#define BOOTP_TIMEOUT (2*TICKS_PER_SEC)
+#endif
+
+/* Max interval between IGMP packets */
+#define IGMP_INTERVAL (10*TICKS_PER_SEC)
+#define IGMPv1_ROUTER_PRESENT_TIMEOUT (400*TICKS_PER_SEC)
+
+/* These settings have sense only if compiled with -DCONGESTED */
+/* total retransmission timeout in ticks */
+#define TFTP_TIMEOUT (30*TICKS_PER_SEC)
+/* packet retransmission timeout in ticks */
+#ifdef CONGESTED
+#define TFTP_REXMT (3*TICKS_PER_SEC)
+#else
+#define TFTP_REXMT TIMEOUT
+#endif
+
+#ifndef NULL
+#define NULL ((void *)0)
+#endif
+
+#include "if_ether.h"
+
+enum {
+ ARP_CLIENT, ARP_SERVER, ARP_GATEWAY,
+#ifdef DNS_RESOLVER
+ ARP_NAMESERVER,
+#endif
+#ifdef PXE_EXPORT
+ ARP_PROXYDHCP,
+#endif
+ MAX_ARP
+};
+
+#define IGMP_SERVER 0
+#define MAX_IGMP IGMP_SERVER+1
+
+#define RARP_REQUEST 3
+#define RARP_REPLY 4
+
+#include "in.h"
+
+#define MULTICAST_MASK 0xF0000000
+#define MULTICAST_NETWORK 0xE0000000
+
+/* Helper macros used to identify when DHCP options are valid/invalid in/outside of encapsulation */
+#define NON_ENCAP_OPT in_encapsulated_options == 0 &&
+#ifdef ALLOW_ONLY_ENCAPSULATED
+#define ENCAP_OPT in_encapsulated_options == 1 &&
+#else
+#define ENCAP_OPT
+#endif
+
+#include "if_arp.h"
+#include "ip.h"
+#include "udp.h"
+#include "tcp.h"
+#include "bootp.h"
+#include "tftp.h"
+#include "igmp.h"
+#include "nfs.h"
+
+struct arptable_t {
+ in_addr ipaddr;
+ uint8_t node[6];
+} PACKED;
+
+struct igmptable_t {
+ in_addr group;
+ unsigned long time;
+} PACKED;
+
+#define KERNEL_BUF (BOOTP_DATA_ADDR->bootp_reply.bp_file)
+
+#define FLOPPY_BOOT_LOCATION 0x7c00
+
+struct rom_info {
+ unsigned short rom_segment;
+ unsigned short rom_length;
+};
+
+extern inline int rom_address_ok(struct rom_info *rom, int assigned_rom_segment)
+{
+ return (assigned_rom_segment < 0xC000
+ || assigned_rom_segment == rom->rom_segment);
+}
+
+/* Define a type for passing info to a loaded program */
+struct ebinfo {
+ uint8_t major, minor; /* Version */
+ uint16_t flags; /* Bit flags */
+};
+
+/***************************************************************************
+External prototypes
+***************************************************************************/
+/* main.c */
+struct Elf_Bhdr;
+extern int in_call(in_call_data_t *data, uint32_t opcode, va_list params);
+extern void console_init(void);
+extern int main(in_call_data_t *data, va_list params);
+extern int loadkernel P((const char *fname));
+extern char as_main_program;
+/* nic.c */
+extern void rx_qdrain P((void));
+extern int tftp P((const char *name, int (*)(unsigned char *, unsigned int, unsigned int, int)));
+extern int tftp_block P((struct tftpreq_info_t *, struct tftpblk_info_t *));
+extern int ip_transmit P((int len, const void *buf));
+extern void build_ip_hdr P((unsigned long destip, int ttl, int protocol,
+ int option_len, int len, const void *buf));
+extern void build_udp_hdr P((unsigned long destip,
+ unsigned int srcsock, unsigned int destsock, int ttl,
+ int len, const void *buf));
+extern int udp_transmit P((unsigned long destip, unsigned int srcsock,
+ unsigned int destsock, int len, const void *buf));
+extern int tcp_transmit(unsigned long destip, unsigned int srcsock,
+ unsigned int destsock, long send_seq, long recv_seq,
+ int window, int flags, int len, const void *buf);
+int tcp_reset(struct iphdr *ip);
+typedef int (*reply_t)(int ival, void *ptr, unsigned short ptype, struct iphdr *ip, struct udphdr *udp, struct tcphdr *tcp);
+extern int await_reply P((reply_t reply, int ival, void *ptr, long timeout));
+extern int decode_rfc1533 P((unsigned char *, unsigned int, unsigned int, int));
+extern void join_group(int slot, unsigned long group);
+extern void leave_group(int slot);
+#define RAND_MAX 2147483647L
+extern uint16_t ipchksum P((const void *ip, unsigned long len));
+extern uint16_t add_ipchksums P((unsigned long offset, uint16_t sum, uint16_t new));
+extern int32_t random P((void));
+extern long rfc2131_sleep_interval P((long base, int exp));
+extern long rfc1112_sleep_interval P((long base, int exp));
+#ifndef DOWNLOAD_PROTO_TFTP
+#define tftp(fname, load_block) 0
+#endif
+extern void cleanup P((void));
+
+/* nfs.c */
+extern void rpc_init(void);
+extern int nfs P((const char *name, int (*)(unsigned char *, unsigned int, unsigned int, int)));
+extern void nfs_umountall P((int));
+
+/* proto_slam.c */
+extern int url_slam P((const char *name, int (*fnc)(unsigned char *, unsigned int, unsigned int, int)));
+
+/* proto_tftm.c */
+extern int url_tftm P((const char *name, int (*fnc)(unsigned char *, unsigned int, unsigned int, int)));
+
+/* config.c */
+extern void print_config(void);
+
+/* isa_probe.c and pci_probe.c */
+struct dev;
+extern void isa_enumerate(void);
+extern int isa_probe(struct dev *, const char *);
+extern void pci_enumerate(void);
+extern int pci_probe(struct dev *, const char *);
+
+/* heap.c */
+extern void init_heap(void);
+extern void *allot(size_t size);
+void forget(void *ptr);
+extern void *allot2(size_t size, uint32_t mask);
+void forget2(void *ptr);
+/* Physical address of the heap */
+extern size_t heap_ptr, heap_top, heap_bot;
+
+/* osloader.c */
+/* Be careful with sector_t it is an unsigned long long on x86 */
+typedef uint64_t sector_t;
+typedef sector_t (*os_download_t)(unsigned char *data, unsigned int len, int eof);
+extern os_download_t probe_image(unsigned char *data, unsigned int len);
+extern int load_block P((unsigned char *, unsigned int, unsigned int, int ));
+
+/* misc.c */
+extern void twiddle P((void));
+extern void sleep P((int secs));
+extern void interruptible_sleep P((int secs));
+extern void poll_interruptions P((void));
+extern int strcasecmp P((const char *a, const char *b));
+extern char *substr P((const char *a, const char *b));
+extern unsigned long strtoul P((const char *p, const char **, int base));
+extern void printf P((const char *, ...));
+extern int sprintf P((char *, const char *, ...));
+extern int inet_aton P((const char *p, in_addr *i));
+#ifdef PCBIOS
+extern void gateA20_set P((void));
+#define gateA20_unset()
+#else
+#define gateA20_set()
+#define gateA20_unset()
+#endif
+extern void putchar P((int));
+extern int getchar P((void));
+extern int iskey P((void));
+
+/* pcbios.S */
+extern int console_getc P((void));
+extern void console_putc P((int));
+extern int console_ischar P((void));
+extern int getshift P((void));
+extern int int15 P((int));
+#ifdef POWERSAVE
+extern void cpu_nap P((void));
+#endif /* POWERSAVE */
+
+/* basemem.c */
+extern uint32_t get_free_base_memory ( void );
+extern void allot_real_mode_stack ( void );
+extern void forget_real_mode_stack ( void );
+extern void * allot_base_memory ( size_t );
+extern void forget_base_memory ( void*, size_t );
+extern void free_unused_base_memory ( void );
+extern void forget_prefix_base_memory ( void );
+extern void forget_runtime_base_memory ( uint32_t old_addr );
+
+struct e820entry {
+ uint64_t addr;
+ uint64_t size;
+ uint32_t type;
+#define E820_RAM 1
+#define E820_RESERVED 2
+#define E820_ACPI 3 /* usable as RAM once ACPI tables have been read */
+#define E820_NVS 4
+} PACKED;
+#define E820ENTRY_SIZE 20
+#define E820MAX 32
+struct meminfo {
+ uint16_t basememsize;
+ uint16_t pad;
+ uint32_t memsize;
+ uint32_t map_count;
+ struct e820entry map[E820MAX];
+} PACKED;
+extern struct meminfo meminfo;
+extern void get_memsizes(void);
+extern unsigned long get_boot_order(unsigned long order, unsigned *index);
+#ifndef NORELOCATE
+extern void relocate(void);
+extern void relocate_to(unsigned long phys_dest);
+#else
+#define relocate() do {} while(0)
+#endif
+extern void disk_init P((void));
+extern unsigned int pcbios_disk_read P((int drv,int c,int h,int s,char *buf));
+
+/* start32.S */
+struct os_entry_regs {
+ /* Be careful changing this structure
+ * as it is used by assembly language code.
+ */
+ uint32_t edi; /* 0 */
+ uint32_t esi; /* 4 */
+ uint32_t ebp; /* 8 */
+ uint32_t esp; /* 12 */
+ uint32_t ebx; /* 16 */
+ uint32_t edx; /* 20 */
+ uint32_t ecx; /* 24 */
+ uint32_t eax; /* 28 */
+
+ uint32_t saved_ebp; /* 32 */
+ uint32_t saved_esi; /* 36 */
+ uint32_t saved_edi; /* 40 */
+ uint32_t saved_ebx; /* 44 */
+ uint32_t saved_eip; /* 48 */
+ uint32_t saved_esp; /* 52 */
+};
+struct regs {
+ /* Be careful changing this structure
+ * as it is used by assembly language code.
+ */
+ uint32_t edi; /* 0 */
+ uint32_t esi; /* 4 */
+ uint32_t ebp; /* 8 */
+ uint32_t esp; /* 12 */
+ uint32_t ebx; /* 16 */
+ uint32_t edx; /* 20 */
+ uint32_t ecx; /* 24 */
+ uint32_t eax; /* 28 */
+};
+extern struct os_entry_regs os_regs;
+extern struct regs initial_regs;
+extern int xstart32(unsigned long entry_point, ...);
+extern int xstart_lm(unsigned long entry_point, unsigned long params);
+extern void xend32 P((void));
+struct Elf_Bhdr *prepare_boot_params(void *header);
+extern int elf_start(unsigned long machine, unsigned long entry, unsigned long params);
+extern unsigned long currticks P((void));
+extern void exit P((int status));
+extern void _stack;
+extern char _prefix_copy[512];
+extern uint32_t image_basemem;
+
+/* serial.c */
+extern int serial_getc P((void));
+extern void serial_putc P((int));
+extern int serial_ischar P((void));
+extern int serial_init P((void));
+extern void serial_fini P((void));
+
+/* floppy.c */
+extern int bootdisk P((int dev,int part));
+
+/* pxe_callbacks.c */
+extern int pxe_in_call ( in_call_data_t *in_call_data, va_list params );
+
+/***************************************************************************
+External variables
+***************************************************************************/
+/* main.c */
+extern struct rom_info rom;
+extern char *hostname;
+extern int hostnamelen;
+extern jmp_buf restart_etherboot;
+extern int url_port;
+extern struct arptable_t arptable[MAX_ARP];
+extern struct igmptable_t igmptable[MAX_IGMP];
+#ifdef IMAGE_MENU
+extern int menutmo,menudefault;
+extern unsigned char *defparams;
+extern int defparams_max;
+#endif
+#ifdef MOTD
+extern unsigned char *motd[RFC1533_VENDOR_NUMOFMOTD];
+#endif
+extern struct bootpd_t bootp_data;
+#define BOOTP_DATA_ADDR (&bootp_data)
+extern unsigned char *end_of_rfc1533;
+#ifdef IMAGE_FREEBSD
+extern int freebsd_howto;
+#define FREEBSD_KERNEL_ENV_SIZE 256
+extern char freebsd_kernel_env[FREEBSD_KERNEL_ENV_SIZE];
+#endif
+
+/* bootmenu.c */
+
+/* osloader.c */
+
+/* created by linker */
+extern char _virt_start[], _text[], _etext[], _text16[], _etext16[];
+extern char _data[], _edata[], _bss[], _ebss[], _end[];
+
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
+
+#endif /* ETHERBOOT_H */
diff --git a/src/include/fs.h b/src/include/fs.h
new file mode 100644
index 000000000..1dfe8fd9e
--- /dev/null
+++ b/src/include/fs.h
@@ -0,0 +1,41 @@
+#ifndef FS_H
+#define FS_H
+
+#include <stdint.h>
+
+//typedef uint64_t sector_t;
+
+#ifdef IDE_DISK
+int ide_probe(int drive);
+int ide_read(int drive, sector_t sector, void *buffer);
+#endif
+
+#ifdef USB_DISK
+int usb_probe(int drive);
+int usb_read(int drive, sector_t sector, void *buffer);
+#endif
+
+#define DISK_IDE 1
+#define DISK_MEM 2
+#define DISK_USB 3
+
+int devopen(const char *name, int *reopen);
+int devread(unsigned long sector, unsigned long byte_offset,
+ unsigned long byte_len, void *buf);
+
+int file_open(const char *filename);
+int file_read(void *buf, unsigned long len);
+int file_seek(unsigned long offset);
+unsigned long file_size(void);
+
+#define PARTITION_UNKNOWN 0xbad6a7
+
+#ifdef ELTORITO
+int open_eltorito_image(int part, unsigned long *start, unsigned long *length);
+#else
+# define open_eltorito_image(x,y,z) PARTITION_UNKNOWN
+#endif
+
+extern int using_devsize;
+
+#endif /* FS_H */
diff --git a/src/include/http.h b/src/include/http.h
new file mode 100644
index 000000000..cc1bfdfe8
--- /dev/null
+++ b/src/include/http.h
@@ -0,0 +1,7 @@
+#ifndef HTTP_H
+#define HTTP_H
+
+extern int http(const char *url,
+ int (*fnc)(unsigned char *, unsigned int, unsigned int, int));
+
+#endif /* HTTP_H */
diff --git a/src/include/i82365.h b/src/include/i82365.h
new file mode 100644
index 000000000..3b0e00ca4
--- /dev/null
+++ b/src/include/i82365.h
@@ -0,0 +1,450 @@
+/*
+ * i82365.h 1.15 1999/10/25 20:03:34
+ *
+ * The contents of this file may be used under the
+ * terms of the GNU General Public License version 2 (the "GPL").
+ *
+ * Software distributed under the License is distributed on an "AS IS"
+ * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
+ * the License for the specific language governing rights and
+ * limitations under the License.
+ *
+ * The initial developer of the original code is David A. Hinds
+ * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
+ * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
+ */
+
+#ifndef _LINUX_I82365_H
+#define _LINUX_I82365_H
+
+/* register definitions for the Intel 82365SL PCMCIA controller */
+
+/* Offsets for PCIC registers */
+#define I365_IDENT 0x00 /* Identification and revision */
+#define I365_STATUS 0x01 /* Interface status */
+#define I365_POWER 0x02 /* Power and RESETDRV control */
+#define I365_INTCTL 0x03 /* Interrupt and general control */
+#define I365_CSC 0x04 /* Card status change */
+#define I365_CSCINT 0x05 /* Card status change interrupt control */
+#define I365_ADDRWIN 0x06 /* Address window enable */
+#define I365_IOCTL 0x07 /* I/O control */
+#define I365_GENCTL 0x16 /* Card detect and general control */
+#define I365_GBLCTL 0x1E /* Global control register */
+
+/* Offsets for I/O and memory window registers */
+#define I365_IO(map) (0x08+((map)<<2))
+#define I365_MEM(map) (0x10+((map)<<3))
+#define I365_W_START 0
+#define I365_W_STOP 2
+#define I365_W_OFF 4
+
+/* Flags for I365_STATUS */
+#define I365_CS_BVD1 0x01
+#define I365_CS_STSCHG 0x01
+#define I365_CS_BVD2 0x02
+#define I365_CS_SPKR 0x02
+#define I365_CS_DETECT 0x0C
+#define I365_CS_WRPROT 0x10
+#define I365_CS_READY 0x20 /* Inverted */
+#define I365_CS_POWERON 0x40
+#define I365_CS_GPI 0x80
+
+/* Flags for I365_POWER */
+#define I365_PWR_OFF 0x00 /* Turn off the socket */
+#define I365_PWR_OUT 0x80 /* Output enable */
+#define I365_PWR_NORESET 0x40 /* Disable RESETDRV on resume */
+#define I365_PWR_AUTO 0x20 /* Auto pwr switch enable */
+#define I365_VCC_MASK 0x18 /* Mask for turning off Vcc */
+/* There are different layouts for B-step and DF-step chips: the B
+ step has independent Vpp1/Vpp2 control, and the DF step has only
+ Vpp1 control, plus 3V control */
+#define I365_VCC_5V 0x10 /* Vcc = 5.0v */
+#define I365_VCC_3V 0x18 /* Vcc = 3.3v */
+#define I365_VPP2_MASK 0x0c /* Mask for turning off Vpp2 */
+#define I365_VPP2_5V 0x04 /* Vpp2 = 5.0v */
+#define I365_VPP2_12V 0x08 /* Vpp2 = 12.0v */
+#define I365_VPP1_MASK 0x03 /* Mask for turning off Vpp1 */
+#define I365_VPP1_5V 0x01 /* Vpp2 = 5.0v */
+#define I365_VPP1_12V 0x02 /* Vpp2 = 12.0v */
+
+/* Flags for I365_INTCTL */
+#define I365_RING_ENA 0x80
+#define I365_PC_RESET 0x40
+#define I365_PC_IOCARD 0x20
+#define I365_INTR_ENA 0x10
+#define I365_IRQ_MASK 0x0F
+
+/* Flags for I365_CSC and I365_CSCINT*/
+#define I365_CSC_BVD1 0x01
+#define I365_CSC_STSCHG 0x01
+#define I365_CSC_BVD2 0x02
+#define I365_CSC_READY 0x04
+#define I365_CSC_DETECT 0x08
+#define I365_CSC_ANY 0x0F
+#define I365_CSC_GPI 0x10
+
+/* Flags for I365_ADDRWIN */
+#define I365_ENA_IO(map) (0x40 << (map))
+#define I365_ENA_MEM(map) (0x01 << (map))
+
+/* Flags for I365_IOCTL */
+#define I365_IOCTL_MASK(map) (0x0F << (map<<2))
+#define I365_IOCTL_WAIT(map) (0x08 << (map<<2))
+#define I365_IOCTL_0WS(map) (0x04 << (map<<2))
+#define I365_IOCTL_IOCS16(map) (0x02 << (map<<2))
+#define I365_IOCTL_16BIT(map) (0x01 << (map<<2))
+
+/* Flags for I365_GENCTL */
+#define I365_CTL_16DELAY 0x01
+#define I365_CTL_RESET 0x02
+#define I365_CTL_GPI_ENA 0x04
+#define I365_CTL_GPI_CTL 0x08
+#define I365_CTL_RESUME 0x10
+#define I365_CTL_SW_IRQ 0x20
+
+/* Flags for I365_GBLCTL */
+#define I365_GBL_PWRDOWN 0x01
+#define I365_GBL_CSC_LEV 0x02
+#define I365_GBL_WRBACK 0x04
+#define I365_GBL_IRQ_0_LEV 0x08
+#define I365_GBL_IRQ_1_LEV 0x10
+
+/* Flags for memory window registers */
+#define I365_MEM_16BIT 0x8000 /* In memory start high byte */
+#define I365_MEM_0WS 0x4000
+#define I365_MEM_WS1 0x8000 /* In memory stop high byte */
+#define I365_MEM_WS0 0x4000
+#define I365_MEM_WRPROT 0x8000 /* In offset high byte */
+#define I365_MEM_REG 0x4000
+
+#define I365_REG(slot, reg) (((slot) << 6) + reg)
+
+#endif /* _LINUX_I82365_H */
+
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+// Beginning vg468.h (for VADEM chipset)
+
+#ifndef _LINUX_VG468_H
+#define _LINUX_VG468_H
+
+/* Special bit in I365_IDENT used for Vadem chip detection */
+#define I365_IDENT_VADEM 0x08
+
+/* Special definitions in I365_POWER */
+#define VG468_VPP2_MASK 0x0c
+#define VG468_VPP2_5V 0x04
+#define VG468_VPP2_12V 0x08
+
+/* Unique Vadem registers */
+#define VG469_VSENSE 0x1f /* Card voltage sense */
+#define VG469_VSELECT 0x2f /* Card voltage select */
+#define VG468_CTL 0x38 /* Control register */
+#define VG468_TIMER 0x39 /* Timer control */
+#define VG468_MISC 0x3a /* Miscellaneous */
+#define VG468_GPIO_CFG 0x3b /* GPIO configuration */
+#define VG469_EXT_MODE 0x3c /* Extended mode register */
+#define VG468_SELECT 0x3d /* Programmable chip select */
+#define VG468_SELECT_CFG 0x3e /* Chip select configuration */
+#define VG468_ATA 0x3f /* ATA control */
+
+/* Flags for VG469_VSENSE */
+#define VG469_VSENSE_A_VS1 0x01
+#define VG469_VSENSE_A_VS2 0x02
+#define VG469_VSENSE_B_VS1 0x04
+#define VG469_VSENSE_B_VS2 0x08
+
+/* Flags for VG469_VSELECT */
+#define VG469_VSEL_VCC 0x03
+#define VG469_VSEL_5V 0x00
+#define VG469_VSEL_3V 0x03
+#define VG469_VSEL_MAX 0x0c
+#define VG469_VSEL_EXT_STAT 0x10
+#define VG469_VSEL_EXT_BUS 0x20
+#define VG469_VSEL_MIXED 0x40
+#define VG469_VSEL_ISA 0x80
+
+/* Flags for VG468_CTL */
+#define VG468_CTL_SLOW 0x01 /* 600ns memory timing */
+#define VG468_CTL_ASYNC 0x02 /* Asynchronous bus clocking */
+#define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */
+#define VG468_CTL_DELAY 0x10 /* Card detect debounce */
+#define VG468_CTL_INPACK 0x20 /* Obey INPACK signal? */
+#define VG468_CTL_POLARITY 0x40 /* VCCEN polarity */
+#define VG468_CTL_COMPAT 0x80 /* Compatibility stuff */
+
+#define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */
+#define VG469_CTL_STRETCH 0x10 /* LED stretch */
+
+/* Flags for VG468_TIMER */
+#define VG468_TIMER_ZEROPWR 0x10 /* Zero power control */
+#define VG468_TIMER_SIGEN 0x20 /* Power up */
+#define VG468_TIMER_STATUS 0x40 /* Activity timer status */
+#define VG468_TIMER_RES 0x80 /* Timer resolution */
+#define VG468_TIMER_MASK 0x0f /* Activity timer timeout */
+
+/* Flags for VG468_MISC */
+#define VG468_MISC_GPIO 0x04 /* General-purpose IO */
+#define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */
+#define VG469_MISC_LEDENA 0x10 /* LED enable */
+#define VG468_MISC_VADEMREV 0x40 /* Vadem revision control */
+#define VG468_MISC_UNLOCK 0x80 /* Unique register lock */
+
+/* Flags for VG469_EXT_MODE_A */
+#define VG469_MODE_VPPST 0x03 /* Vpp steering control */
+#define VG469_MODE_INT_SENSE 0x04 /* Internal voltage sense */
+#define VG469_MODE_CABLE 0x08
+#define VG469_MODE_COMPAT 0x10 /* i82365sl B or DF step */
+#define VG469_MODE_TEST 0x20
+#define VG469_MODE_RIO 0x40 /* Steer RIO to INTR? */
+
+/* Flags for VG469_EXT_MODE_B */
+#define VG469_MODE_B_3V 0x01 /* 3.3v for socket B */
+
+#endif /* _LINUX_VG468_H */
+
+
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+// Beginning ricoh.h (RICOH chipsets)
+
+#ifndef _LINUX_RICOH_H
+#define _LINUX_RICOH_H
+
+
+#define RF5C_MODE_CTL 0x1f /* Mode control */
+#define RF5C_PWR_CTL 0x2f /* Mixed voltage control */
+#define RF5C_CHIP_ID 0x3a /* Chip identification */
+#define RF5C_MODE_CTL_3 0x3b /* Mode control 3 */
+
+/* I/O window address offset */
+#define RF5C_IO_OFF(w) (0x36+((w)<<1))
+
+/* Flags for RF5C_MODE_CTL */
+#define RF5C_MODE_ATA 0x01 /* ATA mode */
+#define RF5C_MODE_LED_ENA 0x02 /* IRQ 12 is LED */
+#define RF5C_MODE_CA21 0x04
+#define RF5C_MODE_CA22 0x08
+#define RF5C_MODE_CA23 0x10
+#define RF5C_MODE_CA24 0x20
+#define RF5C_MODE_CA25 0x40
+#define RF5C_MODE_3STATE_BIT7 0x80
+
+/* Flags for RF5C_PWR_CTL */
+#define RF5C_PWR_VCC_3V 0x01
+#define RF5C_PWR_IREQ_HIGH 0x02
+#define RF5C_PWR_INPACK_ENA 0x04
+#define RF5C_PWR_5V_DET 0x08
+#define RF5C_PWR_TC_SEL 0x10 /* Terminal Count: irq 11 or 15 */
+#define RF5C_PWR_DREQ_LOW 0x20
+#define RF5C_PWR_DREQ_OFF 0x00 /* DREQ steering control */
+#define RF5C_PWR_DREQ_INPACK 0x40
+#define RF5C_PWR_DREQ_SPKR 0x80
+#define RF5C_PWR_DREQ_IOIS16 0xc0
+
+/* Values for RF5C_CHIP_ID */
+#define RF5C_CHIP_RF5C296 0x32
+#define RF5C_CHIP_RF5C396 0xb2
+
+/* Flags for RF5C_MODE_CTL_3 */
+#define RF5C_MCTL3_DISABLE 0x01 /* Disable PCMCIA interface */
+#define RF5C_MCTL3_DMA_ENA 0x02
+
+/* Register definitions for Ricoh PCI-to-CardBus bridges */
+
+/* Extra bits in CB_BRIDGE_CONTROL */
+#define RL5C46X_BCR_3E0_ENA 0x0800
+#define RL5C46X_BCR_3E2_ENA 0x1000
+
+/* Bridge Configuration Register */
+#define RL5C4XX_CONFIG 0x80 /* 16 bit */
+#define RL5C4XX_CONFIG_IO_1_MODE 0x0200
+#define RL5C4XX_CONFIG_IO_0_MODE 0x0100
+#define RL5C4XX_CONFIG_PREFETCH 0x0001
+
+
+/* Misc Control Register */
+#define RL5C4XX_MISC 0x0082 /* 16 bit */
+#define RL5C4XX_MISC_HW_SUSPEND_ENA 0x0002
+#define RL5C4XX_MISC_VCCEN_POL 0x0100
+#define RL5C4XX_MISC_VPPEN_POL 0x0200
+#define RL5C46X_MISC_SUSPEND 0x0001
+#define RL5C46X_MISC_PWR_SAVE_2 0x0004
+#define RL5C46X_MISC_IFACE_BUSY 0x0008
+#define RL5C46X_MISC_B_LOCK 0x0010
+#define RL5C46X_MISC_A_LOCK 0x0020
+#define RL5C46X_MISC_PCI_LOCK 0x0040
+#define RL5C47X_MISC_IFACE_BUSY 0x0004
+#define RL5C47X_MISC_PCI_INT_MASK 0x0018
+#define RL5C47X_MISC_PCI_INT_DIS 0x0020
+#define RL5C47X_MISC_SUBSYS_WR 0x0040
+#define RL5C47X_MISC_SRIRQ_ENA 0x0080
+#define RL5C47X_MISC_5V_DISABLE 0x0400
+#define RL5C47X_MISC_LED_POL 0x0800
+
+/* 16-bit Interface Control Register */
+#define RL5C4XX_16BIT_CTL 0x0084 /* 16 bit */
+#define RL5C4XX_16CTL_IO_TIMING 0x0100
+#define RL5C4XX_16CTL_MEM_TIMING 0x0200
+#define RL5C46X_16CTL_LEVEL_1 0x0010
+#define RL5C46X_16CTL_LEVEL_2 0x0020
+
+/* 16-bit IO and memory timing registers */
+#define RL5C4XX_16BIT_IO_0 0x0088 /* 16 bit */
+#define RL5C4XX_16BIT_MEM_0 0x0088 /* 16 bit */
+#define RL5C4XX_SETUP_MASK 0x0007
+#define RL5C4XX_SETUP_SHIFT 0
+#define RL5C4XX_CMD_MASK 0x01f0
+#define RL5C4XX_CMD_SHIFT 4
+#define RL5C4XX_HOLD_MASK 0x1c00
+#define RL5C4XX_HOLD_SHIFT 10
+#define RL5C4XX_MISC_CONTROL 0x2F /* 8 bit */
+#define RL5C4XX_ZV_ENABLE 0x08
+
+#endif /* _LINUX_RICOH_H */
+
+
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+//*****************************************************************************
+// Beginning cirrus.h (CIRRUS chipsets)
+
+#ifndef _LINUX_CIRRUS_H
+#define _LINUX_CIRRUS_H
+
+#ifndef PCI_VENDOR_ID_CIRRUS
+#define PCI_VENDOR_ID_CIRRUS 0x1013
+#endif
+#ifndef PCI_DEVICE_ID_CIRRUS_6729
+#define PCI_DEVICE_ID_CIRRUS_6729 0x1100
+#endif
+#ifndef PCI_DEVICE_ID_CIRRUS_6832
+#define PCI_DEVICE_ID_CIRRUS_6832 0x1110
+#endif
+
+#define PD67_MISC_CTL_1 0x16 /* Misc control 1 */
+#define PD67_FIFO_CTL 0x17 /* FIFO control */
+#define PD67_MISC_CTL_2 0x1E /* Misc control 2 */
+#define PD67_CHIP_INFO 0x1f /* Chip information */
+#define PD67_ATA_CTL 0x026 /* 6730: ATA control */
+#define PD67_EXT_INDEX 0x2e /* Extension index */
+#define PD67_EXT_DATA 0x2f /* Extension data */
+
+/* PD6722 extension registers -- indexed in PD67_EXT_INDEX */
+#define PD67_DATA_MASK0 0x01 /* Data mask 0 */
+#define PD67_DATA_MASK1 0x02 /* Data mask 1 */
+#define PD67_DMA_CTL 0x03 /* DMA control */
+
+/* PD6730 extension registers -- indexed in PD67_EXT_INDEX */
+#define PD67_EXT_CTL_1 0x03 /* Extension control 1 */
+#define PD67_MEM_PAGE(n) ((n)+5) /* PCI window bits 31:24 */
+#define PD67_EXTERN_DATA 0x0a
+#define PD67_MISC_CTL_3 0x25
+#define PD67_SMB_PWR_CTL 0x26
+
+/* I/O window address offset */
+#define PD67_IO_OFF(w) (0x36+((w)<<1))
+
+/* Timing register sets */
+#define PD67_TIME_SETUP(n) (0x3a + 3*(n))
+#define PD67_TIME_CMD(n) (0x3b + 3*(n))
+#define PD67_TIME_RECOV(n) (0x3c + 3*(n))
+
+/* Flags for PD67_MISC_CTL_1 */
+#define PD67_MC1_5V_DET 0x01 /* 5v detect */
+#define PD67_MC1_MEDIA_ENA 0x01 /* 6730: Multimedia enable */
+#define PD67_MC1_VCC_3V 0x02 /* 3.3v Vcc */
+#define PD67_MC1_PULSE_MGMT 0x04
+#define PD67_MC1_PULSE_IRQ 0x08
+#define PD67_MC1_SPKR_ENA 0x10
+#define PD67_MC1_INPACK_ENA 0x80
+
+/* Flags for PD67_FIFO_CTL */
+#define PD67_FIFO_EMPTY 0x80
+
+/* Flags for PD67_MISC_CTL_2 */
+#define PD67_MC2_FREQ_BYPASS 0x01
+#define PD67_MC2_DYNAMIC_MODE 0x02
+#define PD67_MC2_SUSPEND 0x04
+#define PD67_MC2_5V_CORE 0x08
+#define PD67_MC2_LED_ENA 0x10 /* IRQ 12 is LED enable */
+#define PD67_MC2_FAST_PCI 0x10 /* 6729: PCI bus > 25 MHz */
+#define PD67_MC2_3STATE_BIT7 0x20 /* Floppy change bit */
+#define PD67_MC2_DMA_MODE 0x40
+#define PD67_MC2_IRQ15_RI 0x80 /* IRQ 15 is ring enable */
+
+/* Flags for PD67_CHIP_INFO */
+#define PD67_INFO_SLOTS 0x20 /* 0 = 1 slot, 1 = 2 slots */
+#define PD67_INFO_CHIP_ID 0xc0
+#define PD67_INFO_REV 0x1c
+
+/* Fields in PD67_TIME_* registers */
+#define PD67_TIME_SCALE 0xc0
+#define PD67_TIME_SCALE_1 0x00
+#define PD67_TIME_SCALE_16 0x40
+#define PD67_TIME_SCALE_256 0x80
+#define PD67_TIME_SCALE_4096 0xc0
+#define PD67_TIME_MULT 0x3f
+
+/* Fields in PD67_DMA_CTL */
+#define PD67_DMA_MODE 0xc0
+#define PD67_DMA_OFF 0x00
+#define PD67_DMA_DREQ_INPACK 0x40
+#define PD67_DMA_DREQ_WP 0x80
+#define PD67_DMA_DREQ_BVD2 0xc0
+#define PD67_DMA_PULLUP 0x20 /* Disable socket pullups? */
+
+/* Fields in PD67_EXT_CTL_1 */
+#define PD67_EC1_VCC_PWR_LOCK 0x01
+#define PD67_EC1_AUTO_PWR_CLEAR 0x02
+#define PD67_EC1_LED_ENA 0x04
+#define PD67_EC1_INV_CARD_IRQ 0x08
+#define PD67_EC1_INV_MGMT_IRQ 0x10
+#define PD67_EC1_PULLUP_CTL 0x20
+
+/* Fields in PD67_MISC_CTL_3 */
+#define PD67_MC3_IRQ_MASK 0x03
+#define PD67_MC3_IRQ_PCPCI 0x00
+#define PD67_MC3_IRQ_EXTERN 0x01
+#define PD67_MC3_IRQ_PCIWAY 0x02
+#define PD67_MC3_IRQ_PCI 0x03
+#define PD67_MC3_PWR_MASK 0x0c
+#define PD67_MC3_PWR_SERIAL 0x00
+#define PD67_MC3_PWR_TI2202 0x08
+#define PD67_MC3_PWR_SMB 0x0c
+
+/* Register definitions for Cirrus PD6832 PCI-to-CardBus bridge */
+
+/* PD6832 extension registers -- indexed in PD67_EXT_INDEX */
+#define PD68_EXT_CTL_2 0x0b
+#define PD68_PCI_SPACE 0x22
+#define PD68_PCCARD_SPACE 0x23
+#define PD68_WINDOW_TYPE 0x24
+#define PD68_EXT_CSC 0x2e
+#define PD68_MISC_CTL_4 0x2f
+#define PD68_MISC_CTL_5 0x30
+#define PD68_MISC_CTL_6 0x31
+
+/* Extra flags in PD67_MISC_CTL_3 */
+#define PD68_MC3_HW_SUSP 0x10
+#define PD68_MC3_MM_EXPAND 0x40
+#define PD68_MC3_MM_ARM 0x80
+
+/* Bridge Control Register */
+#define PD6832_BCR_MGMT_IRQ_ENA 0x0800
+
+/* Socket Number Register */
+#define PD6832_SOCKET_NUMBER 0x004c /* 8 bit */
+
+#endif /* _LINUX_CIRRUS_H */
+
+
+
diff --git a/src/include/if_arp.h b/src/include/if_arp.h
new file mode 100644
index 000000000..b3aebf743
--- /dev/null
+++ b/src/include/if_arp.h
@@ -0,0 +1,23 @@
+#ifndef _IF_ARP_H
+#define _IF_ARP_H
+
+#define ARP_REQUEST 1
+#define ARP_REPLY 2
+
+/*
+ * A pity sipaddr and tipaddr are not longword aligned or we could use
+ * in_addr. No, I don't want to use #pragma packed.
+ */
+struct arprequest {
+ uint16_t hwtype;
+ uint16_t protocol;
+ uint8_t hwlen;
+ uint8_t protolen;
+ uint16_t opcode;
+ uint8_t shwaddr[6];
+ uint8_t sipaddr[4];
+ uint8_t thwaddr[6];
+ uint8_t tipaddr[4];
+} PACKED;
+
+#endif /* _IF_ARP_H */
diff --git a/src/include/if_ether.h b/src/include/if_ether.h
new file mode 100644
index 000000000..c36ec889f
--- /dev/null
+++ b/src/include/if_ether.h
@@ -0,0 +1,27 @@
+#ifndef _IF_ETHER_H
+#define _IF_ETHER_H
+
+/*
+ I'm moving towards the defined names in linux/if_ether.h for clarity.
+ The confusion between 60/64 and 1514/1518 arose because the NS8390
+ counts the 4 byte frame checksum in the incoming packet, but not
+ in the outgoing packet. 60/1514 are the correct numbers for most
+ if not all of the other NIC controllers.
+*/
+
+#define ETH_ALEN 6 /* Size of Ethernet address */
+#define ETH_HLEN 14 /* Size of ethernet header */
+#define ETH_ZLEN 60 /* Minimum packet */
+#define ETH_FRAME_LEN 1514 /* Maximum packet */
+#define ETH_DATA_ALIGN 2 /* Amount needed to align the data after an ethernet header */
+#ifndef ETH_MAX_MTU
+#define ETH_MAX_MTU (ETH_FRAME_LEN-ETH_HLEN)
+#endif
+
+#define ETH_P_IP 0x0800 /* Internet Protocl Packet */
+#define ETH_P_ARP 0x0806 /* Address Resolution Protocol */
+#define ETH_P_RARP 0x8035 /* Reverse Address resolution Protocol */
+#define ETH_P_IPV6 0x86DD /* IPv6 over blueblook */
+#define ETH_P_SLOW 0x8809 /* Ethernet slow protocols */
+
+#endif /* _IF_ETHER_H */
diff --git a/src/include/igmp.h b/src/include/igmp.h
new file mode 100644
index 000000000..2235d6c66
--- /dev/null
+++ b/src/include/igmp.h
@@ -0,0 +1,23 @@
+#ifndef _IGMP_H
+#define _IGMP_H
+
+#define IGMP_QUERY 0x11
+#define IGMPv1_REPORT 0x12
+#define IGMPv2_REPORT 0x16
+#define IGMP_LEAVE 0x17
+#define GROUP_ALL_HOSTS 0xe0000001 /* 224.0.0.1 Host byte order */
+
+struct igmp {
+ uint8_t type;
+ uint8_t response_time;
+ uint16_t chksum;
+ in_addr group;
+} PACKED;
+
+struct igmp_ip_t { /* Format of an igmp ip packet */
+ struct iphdr ip;
+ uint8_t router_alert[4]; /* Router alert option */
+ struct igmp igmp;
+} PACKED;
+
+#endif /* _IGMP_H */
diff --git a/src/include/in.h b/src/include/in.h
new file mode 100644
index 000000000..7fb207da4
--- /dev/null
+++ b/src/include/in.h
@@ -0,0 +1,21 @@
+#ifndef _IN_H
+#define _IN_H
+
+#include <if_ether.h>
+#define IP ETH_P_IP
+#define ARP ETH_P_ARP
+#define RARP ETH_P_RARP
+
+#define IP_ICMP 1
+#define IP_IGMP 2
+#define IP_TCP 6
+#define IP_UDP 17
+
+/* Same after going through htonl */
+#define IP_BROADCAST 0xFFFFFFFF
+
+typedef struct {
+ uint32_t s_addr;
+} in_addr;
+
+#endif /* _IN_H */
diff --git a/src/include/ip.h b/src/include/ip.h
new file mode 100644
index 000000000..0f8fad6ab
--- /dev/null
+++ b/src/include/ip.h
@@ -0,0 +1,17 @@
+#ifndef _IP_H
+#define _IP_H
+
+struct iphdr {
+ uint8_t verhdrlen;
+ uint8_t service;
+ uint16_t len;
+ uint16_t ident;
+ uint16_t frags;
+ uint8_t ttl;
+ uint8_t protocol;
+ uint16_t chksum;
+ in_addr src;
+ in_addr dest;
+} PACKED;
+
+#endif /* _IP_H */
diff --git a/src/include/isa.h b/src/include/isa.h
new file mode 100644
index 000000000..23a8f2ffa
--- /dev/null
+++ b/src/include/isa.h
@@ -0,0 +1,32 @@
+#ifndef ISA_H
+#define ISA_H
+
+struct dev;
+
+#define ISAPNP_VENDOR(a,b,c) (((((a)-'A'+1)&0x3f)<<2)|\
+ ((((b)-'A'+1)&0x18)>>3)|((((b)-'A'+1)&7)<<13)|\
+ ((((c)-'A'+1)&0x1f)<<8))
+
+#define GENERIC_ISAPNP_VENDOR ISAPNP_VENDOR('P','N','P')
+
+struct isa_driver
+{
+ int type;
+ const char *name;
+ int (*probe)(struct dev *, unsigned short *);
+ unsigned short *ioaddrs;
+};
+
+#ifndef __HYPERSTONE__
+#define __isa_driver __attribute__ ((used,__section__(".drivers.isa")))
+#else
+#define __isa_driver __attribute__ ((used,__section__(".drivisa")))
+#endif
+
+extern const struct isa_driver isa_drivers[];
+extern const struct isa_driver isa_drivers_end[];
+
+#define ISA_ROM(IMAGE, DESCRIPTION)
+
+#endif /* ISA_H */
+
diff --git a/src/include/isapnp.h b/src/include/isapnp.h
new file mode 100644
index 000000000..228823b29
--- /dev/null
+++ b/src/include/isapnp.h
@@ -0,0 +1,124 @@
+/**************************************************************************
+*
+* isapnp.h -- Etherboot isapnp support for the 3Com 3c515
+* Written 2002-2003 by Timothy Legge <tlegge@rogers.com>
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+* Portions of this code:
+* Copyright (C) 2001 P.J.H.Fox (fox@roestock.demon.co.uk)
+*
+*
+*
+* REVISION HISTORY:
+* ================
+* Version 0.1 April 26, 2002 TJL
+* Version 0.2 01/08/2003 TJL Renamed from 3c515_isapnp.h
+*
+***************************************************************************/
+
+/*extern int read_port;*/
+/*#define DEBUG*/
+#define ADDRESS_ADDR 0x0279
+#define WRITEDATA_ADDR 0x0a79
+/* MIN and MAX READ_ADDR must have the bottom two bits set */
+#define MIN_READ_ADDR 0x0203
+#define START_READ_ADDR 0x203
+#define MAX_READ_ADDR 0x03ff
+/* READ_ADDR_STEP must be a multiple of 4 */
+#ifndef READ_ADDR_STEP
+#define READ_ADDR_STEP 8
+#endif
+
+#ifdef EDEBUG
+static int x;
+#define ADDRESS(x) (outb(x, ADDRESS_ADDR), printf("\nAddress: %hX", x))
+#define WRITE_DATA(x) (outb(x, WRITEDATA_ADDR), printf(" WR(%hX)", x & 0xff))
+#define READ_DATA (x = inb(read_port), printf(" RD(%hX)", x & 0xff), x)
+#define READ_IOPORT(p) (x = inb(p), printf(" [%hX](%hX)", p, x & 0xff), x)
+#else /* !DEBUG */
+#define ADDRESS(x) outb(x, ADDRESS_ADDR)
+#define WRITE_DATA(x) outb(x, WRITEDATA_ADDR)
+#define READ_DATA inb(read_port)
+#define READ_IOPORT(p) inb(p)
+#endif /* !DEBUG */
+
+
+
+#define INIT_LENGTH 32
+
+#define INITDATA { 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe,\
+ 0xdf, 0x6f, 0x37, 0x1b, 0x0d, 0x86, 0xc3, 0x61,\
+ 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1,\
+ 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }
+
+/* Registers */
+#define SetRdPort(x) (ADDRESS(0x00),WRITE_DATA((x)>>2),read_port=((x)|3))
+#define SERIALISOLATION ADDRESS(0x01)
+#define CONFIGCONTROL ADDRESS(0x02)
+#define Wake(x) (ADDRESS(0x03),WRITE_DATA(x))
+#define RESOURCEDATA (ADDRESS(0x04),READ_DATA)
+#define STATUS (ADDRESS(0x05),READ_DATA)
+#define CARDSELECTNUMBER ADDRESS(0x06)
+#define LOGICALDEVICENUMBER ADDRESS(0x07)
+#define ACTIVATE ADDRESS(0x30)
+#define IORANGECHECK ADDRESS(0x31)
+
+/* Bits */
+#define CONFIG_RESET 0x01
+#define CONFIG_WAIT_FOR_KEY 0x02
+#define CONFIG_RESET_CSN 0x04
+#define CONFIG_RESET_DRV 0x07
+
+/* Short Tags */
+#define PnPVerNo_TAG 0x01
+#define LogDevId_TAG 0x02
+#define CompatDevId_TAG 0x03
+#define IRQ_TAG 0x04
+#define DMA_TAG 0x05
+#define StartDep_TAG 0x06
+#define EndDep_TAG 0x07
+#define IOport_TAG 0x08
+#define FixedIO_TAG 0x09
+#define RsvdShortA_TAG 0x0A
+#define RsvdShortB_TAG 0x0B
+#define RsvdShortC_TAG 0x0C
+#define RsvdShortD_TAG 0x0D
+#define VendorShort_TAG 0x0E
+#define End_TAG 0x0F
+/* Long Tags */
+#define MemRange_TAG 0x81
+#define ANSIstr_TAG 0x82
+#define UNICODEstr_TAG 0x83
+#define VendorLong_TAG 0x84
+#define Mem32Range_TAG 0x85
+#define FixedMem32Range_TAG 0x86
+#define RsvdLong0_TAG 0xF0
+#define RsvdLong1_TAG 0xF1
+#define RsvdLong2_TAG 0xF2
+#define RsvdLong3_TAG 0xF3
+#define RsvdLong4_TAG 0xF4
+#define RsvdLong5_TAG 0xF5
+#define RsvdLong6_TAG 0xF6
+#define RsvdLong7_TAG 0xF7
+#define RsvdLong8_TAG 0xF8
+#define RsvdLong9_TAG 0xF9
+#define RsvdLongA_TAG 0xFA
+#define RsvdLongB_TAG 0xFB
+#define RsvdLongC_TAG 0xFC
+#define RsvdLongD_TAG 0xFD
+#define RsvdLongE_TAG 0xFE
+#define RsvdLongF_TAG 0xFF
+#define NewBoard_PSEUDOTAG 0x100
diff --git a/src/include/lib.h b/src/include/lib.h
new file mode 100644
index 000000000..400ea468d
--- /dev/null
+++ b/src/include/lib.h
@@ -0,0 +1,42 @@
+#ifndef LIB_H
+#define LIB_H
+
+#include <stdint.h>
+
+int getline(char *buf, int max);
+
+extern struct pci_device *dev_list;
+extern int n_devs;
+
+extern void pci_init(void);
+extern struct pci_device *pci_find_device(int vendor, int device, int devclass,
+int prog_if, int index);
+
+void *calloc(size_t nmemb, size_t size);
+void *realloc(void *ptr, size_t size);
+
+char *strdup(const char *s);
+
+int isspace(int c);
+
+unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base);
+unsigned long long strtoull_with_suffix(const char *cp,char **endp,unsigned int base);
+
+unsigned int get_le32(const unsigned char *);
+unsigned int get_le16(const unsigned char *);
+void hexdump(const void *p, unsigned int len);
+
+long long simple_strtoll(const char *cp,char **endp,unsigned int base);
+
+#define LOADER_NOT_SUPPORT 0xbadf11e
+
+struct sys_info;
+int elf_load(struct sys_info *, const char *filename, const char *cmdline);
+
+#if LINUX_LOADER
+int linux_load(struct sys_info *, const char *filename, const char *cmdline);
+#else
+#define linux_load(x,y,z) LOADER_NOT_SUPPORT /* nop */
+#endif
+
+#endif /* LIB_H */
diff --git a/src/include/little_bswap.h b/src/include/little_bswap.h
new file mode 100644
index 000000000..35918530b
--- /dev/null
+++ b/src/include/little_bswap.h
@@ -0,0 +1,17 @@
+#ifndef ETHERBOOT_LITTLE_BSWAP_H
+#define ETHERBOOT_LITTLE_BSWAP_H
+
+#define ntohl(x) __bswap_32(x)
+#define htonl(x) __bswap_32(x)
+#define ntohs(x) __bswap_16(x)
+#define htons(x) __bswap_16(x)
+#define cpu_to_le32(x) (x)
+#define cpu_to_le16(x) (x)
+#define cpu_to_be32(x) __bswap_32(x)
+#define cpu_to_be16(x) __bswap_16(x)
+#define le32_to_cpu(x) (x)
+#define le16_to_cpu(x) (x)
+#define be32_to_cpu(x) __bswap_32(x)
+#define be16_to_cpu(x) __bswap_16(x)
+
+#endif /* ETHERBOOT_LITTLE_BSWAP_H */
diff --git a/src/include/mii.h b/src/include/mii.h
new file mode 100644
index 000000000..34c1ca9b1
--- /dev/null
+++ b/src/include/mii.h
@@ -0,0 +1,105 @@
+/*
+ * linux/mii.h: definitions for MII-compatible transceivers
+ * Originally drivers/net/sunhme.h.
+ *
+ * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
+ *
+ * Copied Form Linux 2.4.25 an unneeded items removed by:
+ * Timothy Legge (timlegge at etherboot dot org)
+ *
+ * 03/26/2004
+ */
+
+/* Generic MII registers. */
+
+#define MII_BMCR 0x00 /* Basic mode control register */
+#define MII_BMSR 0x01 /* Basic mode status register */
+#define MII_PHYSID1 0x02 /* PHYS ID 1 */
+#define MII_PHYSID2 0x03 /* PHYS ID 2 */
+#define MII_ADVERTISE 0x04 /* Advertisement control reg */
+#define MII_LPA 0x05 /* Link partner ability reg */
+#define MII_EXPANSION 0x06 /* Expansion register */
+#define MII_DCOUNTER 0x12 /* Disconnect counter */
+#define MII_FCSCOUNTER 0x13 /* False carrier counter */
+#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
+#define MII_RERRCOUNTER 0x15 /* Receive error counter */
+#define MII_SREVISION 0x16 /* Silicon revision */
+#define MII_RESV1 0x17 /* Reserved... */
+#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
+#define MII_PHYADDR 0x19 /* PHY address */
+#define MII_RESV2 0x1a /* Reserved... */
+#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
+#define MII_NCONFIG 0x1c /* Network interface config */
+
+/* Basic mode control register. */
+#define BMCR_RESV 0x007f /* Unused... */
+#define BMCR_CTST 0x0080 /* Collision test */
+#define BMCR_FULLDPLX 0x0100 /* Full duplex */
+#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
+#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
+#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
+#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
+#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
+#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
+#define BMCR_RESET 0x8000 /* Reset the DP83840 */
+
+/* Basic mode status register. */
+#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
+#define BMSR_JCD 0x0002 /* Jabber detected */
+#define BMSR_LSTATUS 0x0004 /* Link status */
+#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
+#define BMSR_RFAULT 0x0010 /* Remote fault detected */
+#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
+#define BMSR_RESV 0x07c0 /* Unused... */
+#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
+#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
+#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
+#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
+#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
+
+/* Advertisement control register. */
+#define ADVERTISE_SLCT 0x001f /* Selector bits */
+#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
+#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
+#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
+#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
+#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
+#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
+#define ADVERTISE_RESV 0x1c00 /* Unused... */
+#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
+#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
+#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
+
+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
+ ADVERTISE_CSMA)
+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+ ADVERTISE_100HALF | ADVERTISE_100FULL)
+
+/* Link partner ability register. */
+#define LPA_SLCT 0x001f /* Same as advertise selector */
+#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
+#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
+#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
+#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
+#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
+#define LPA_RESV 0x1c00 /* Unused... */
+#define LPA_RFAULT 0x2000 /* Link partner faulted */
+#define LPA_LPACK 0x4000 /* Link partner acked us */
+#define LPA_NPAGE 0x8000 /* Next page bit */
+
+#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
+#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
+
+/* Expansion register for auto-negotiation. */
+#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
+#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
+#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
+#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
+#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
+#define EXPANSION_RESV 0xffe0 /* Unused... */
+
+/* N-way test register. */
+#define NWAYTEST_RESV1 0x00ff /* Unused... */
+#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
+#define NWAYTEST_RESV2 0xfe00 /* Unused... */
+
diff --git a/src/include/nfs.h b/src/include/nfs.h
new file mode 100644
index 000000000..0877bb664
--- /dev/null
+++ b/src/include/nfs.h
@@ -0,0 +1,63 @@
+#ifndef _NFS_H
+#define _NFS_H
+
+#define SUNRPC_PORT 111
+
+#define PROG_PORTMAP 100000
+#define PROG_NFS 100003
+#define PROG_MOUNT 100005
+
+#define MSG_CALL 0
+#define MSG_REPLY 1
+
+#define PORTMAP_GETPORT 3
+
+#define MOUNT_ADDENTRY 1
+#define MOUNT_UMOUNTALL 4
+
+#define NFS_LOOKUP 4
+#define NFS_READLINK 5
+#define NFS_READ 6
+
+#define NFS_FHSIZE 32
+
+#define NFSERR_PERM 1
+#define NFSERR_NOENT 2
+#define NFSERR_ACCES 13
+#define NFSERR_ISDIR 21
+#define NFSERR_INVAL 22
+
+/* Block size used for NFS read accesses. A RPC reply packet (including all
+ * headers) must fit within a single Ethernet frame to avoid fragmentation.
+ * Chosen to be a power of two, as most NFS servers are optimized for this. */
+#define NFS_READ_SIZE 1024
+
+#define NFS_MAXLINKDEPTH 16
+
+struct rpc_t {
+ struct iphdr ip;
+ struct udphdr udp;
+ union {
+ uint8_t data[300]; /* longest RPC call must fit!!!! */
+ struct {
+ uint32_t id;
+ uint32_t type;
+ uint32_t rpcvers;
+ uint32_t prog;
+ uint32_t vers;
+ uint32_t proc;
+ uint32_t data[1];
+ } call;
+ struct {
+ uint32_t id;
+ uint32_t type;
+ uint32_t rstatus;
+ uint32_t verifier;
+ uint32_t v2;
+ uint32_t astatus;
+ uint32_t data[1];
+ } reply;
+ } u;
+} PACKED;
+
+#endif /* _NFS_H */
diff --git a/src/include/nic.h b/src/include/nic.h
new file mode 100644
index 000000000..c258d7450
--- /dev/null
+++ b/src/include/nic.h
@@ -0,0 +1,49 @@
+ /*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2, or (at
+ * your option) any later version.
+ */
+
+#ifndef NIC_H
+#define NIC_H
+
+#include "dev.h"
+
+typedef enum {
+ DISABLE = 0,
+ ENABLE,
+ FORCE
+} irq_action_t;
+
+/*
+ * Structure returned from eth_probe and passed to other driver
+ * functions.
+ */
+struct nic
+{
+ struct dev dev; /* This must come first */
+ int (*poll)P((struct nic *, int retrieve));
+ void (*transmit)P((struct nic *, const char *d,
+ unsigned int t, unsigned int s, const char *p));
+ void (*irq)P((struct nic *, irq_action_t));
+ int flags; /* driver specific flags */
+ struct rom_info *rom_info; /* -> rom_info from main */
+ unsigned char *node_addr;
+ unsigned char *packet;
+ unsigned int packetlen;
+ unsigned int ioaddr;
+ unsigned char irqno;
+ void *priv_data; /* driver can hang private data here */
+};
+
+
+extern struct nic nic;
+extern int eth_probe(struct dev *dev);
+extern int eth_poll(int retrieve);
+extern void eth_transmit(const char *d, unsigned int t, unsigned int s, const void *p);
+extern void eth_disable(void);
+extern void eth_irq(irq_action_t action);
+extern int eth_load_configuration(struct dev *dev);
+extern int eth_load(struct dev *dev);;
+#endif /* NIC_H */
diff --git a/src/include/osdep.h b/src/include/osdep.h
new file mode 100644
index 000000000..1b03e5671
--- /dev/null
+++ b/src/include/osdep.h
@@ -0,0 +1,43 @@
+#ifndef ETHERBOOT_OSDEP_H
+#define ETHERBOOT_OSDEP_H
+
+#define __unused __attribute__((unused))
+#define __aligned __attribute__((aligned(16)))
+#define PACKED __attribute__((packed))
+
+/* Optimization barrier */
+/* The "volatile" is due to gcc bugs */
+#define barrier() __asm__ __volatile__("": : :"memory")
+
+#include "stdint.h"
+#include "limits.h"
+#include "string.h"
+#include "io.h"
+#include "endian.h"
+#include "byteswap.h"
+#include "setjmp.h"
+#include "latch.h"
+#include "callbacks.h"
+#include "hooks.h"
+
+/* within 1MB of 4GB is too close.
+ * MAX_ADDR is the maximum address we can easily do DMA to.
+ */
+#define MAX_ADDR (0xfff00000UL)
+
+typedef unsigned long Address;
+
+/* ANSI prototyping macro */
+#ifdef __STDC__
+#define P(x) x
+#else
+#define P(x) ()
+#endif
+
+#endif
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff --git a/src/include/pc_kbd.h b/src/include/pc_kbd.h
new file mode 100644
index 000000000..c125efa08
--- /dev/null
+++ b/src/include/pc_kbd.h
@@ -0,0 +1,7 @@
+#ifndef _PC_KBD_H
+#define _PC_KBD_H
+
+int kbd_ischar(void);
+
+int kbd_getc(void);
+#endif
diff --git a/src/include/pci.h b/src/include/pci.h
new file mode 100644
index 000000000..236e0bc9f
--- /dev/null
+++ b/src/include/pci.h
@@ -0,0 +1,362 @@
+#ifndef PCI_H
+#define PCI_H
+
+/*
+** Support for NE2000 PCI clones added David Monro June 1997
+** Generalised for other PCI NICs by Ken Yap July 1997
+**
+** Most of this is taken from:
+**
+** /usr/src/linux/drivers/pci/pci.c
+** /usr/src/linux/include/linux/pci.h
+** /usr/src/linux/arch/i386/bios32.c
+** /usr/src/linux/include/linux/bios32.h
+** /usr/src/linux/drivers/net/ne.c
+*/
+
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2, or (at
+ * your option) any later version.
+ */
+
+#include "pci_ids.h"
+
+#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
+#define PCI_COMMAND_MEM 0x2 /* Enable response in mem space */
+#define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
+#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
+#define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
+#define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */
+#define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
+#define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
+#define PCI_COMMAND_WAIT 0x80 /* Enable address/data stepping */
+#define PCI_COMMAND_SERR 0x100 /* Enable SERR */
+#define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
+
+#define PCIBIOS_PCI_FUNCTION_ID 0xb1XX
+#define PCIBIOS_PCI_BIOS_PRESENT 0xb101
+#define PCIBIOS_FIND_PCI_DEVICE 0xb102
+#define PCIBIOS_FIND_PCI_CLASS_CODE 0xb103
+#define PCIBIOS_GENERATE_SPECIAL_CYCLE 0xb106
+#define PCIBIOS_READ_CONFIG_BYTE 0xb108
+#define PCIBIOS_READ_CONFIG_WORD 0xb109
+#define PCIBIOS_READ_CONFIG_DWORD 0xb10a
+#define PCIBIOS_WRITE_CONFIG_BYTE 0xb10b
+#define PCIBIOS_WRITE_CONFIG_WORD 0xb10c
+#define PCIBIOS_WRITE_CONFIG_DWORD 0xb10d
+
+#define PCI_VENDOR_ID 0x00 /* 16 bits */
+#define PCI_DEVICE_ID 0x02 /* 16 bits */
+#define PCI_COMMAND 0x04 /* 16 bits */
+
+#define PCI_STATUS 0x06 /* 16 bits */
+#define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */
+#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */
+#define PCI_STATUS_UDF 0x40 /* Support User Definable Features [obsolete] */
+#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
+#define PCI_STATUS_PARITY 0x100 /* Detected parity error */
+#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */
+#define PCI_STATUS_DEVSEL_FAST 0x000
+#define PCI_STATUS_DEVSEL_MEDIUM 0x200
+#define PCI_STATUS_DEVSEL_SLOW 0x400
+#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
+#define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
+#define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
+#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
+#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
+
+#define PCI_REVISION 0x08 /* 8 bits */
+#define PCI_REVISION_ID 0x08 /* 8 bits */
+#define PCI_CLASS_REVISION 0x08 /* 32 bits */
+#define PCI_CLASS_CODE 0x0b /* 8 bits */
+#define PCI_SUBCLASS_CODE 0x0a /* 8 bits */
+#define PCI_HEADER_TYPE 0x0e /* 8 bits */
+#define PCI_HEADER_TYPE_NORMAL 0
+#define PCI_HEADER_TYPE_BRIDGE 1
+#define PCI_HEADER_TYPE_CARDBUS 2
+
+
+/* Header type 0 (normal devices) */
+#define PCI_CARDBUS_CIS 0x28
+#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
+#define PCI_SUBSYSTEM_ID 0x2e
+
+#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
+#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits */
+#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits */
+#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
+#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
+#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
+
+#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
+#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */
+#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */
+#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */
+
+#ifndef PCI_BASE_ADDRESS_IO_MASK
+#define PCI_BASE_ADDRESS_IO_MASK (~0x03)
+#endif
+#ifndef PCI_BASE_ADDRESS_MEM_MASK
+#define PCI_BASE_ADDRESS_MEM_MASK (~0x0f)
+#endif
+#define PCI_BASE_ADDRESS_SPACE_IO 0x01
+#define PCI_ROM_ADDRESS 0x30 /* 32 bits */
+#define PCI_ROM_ADDRESS_ENABLE 0x01 /* Write 1 to enable ROM,
+ bits 31..11 are address,
+ 10..2 are reserved */
+
+#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
+
+#define PCI_INTERRUPT_LINE 0x3c /* IRQ number (0-15) */
+#define PCI_INTERRUPT_PIN 0x3d /* IRQ pin on PCI bus (A-D) */
+
+/* Header type 1 (PCI-to-PCI bridges) */
+#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
+#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
+#define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */
+#define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */
+#define PCI_IO_BASE 0x1c /* I/O range behind the bridge */
+#define PCI_IO_LIMIT 0x1d
+#define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */
+#define PCI_IO_RANGE_TYPE_16 0x00
+#define PCI_IO_RANGE_TYPE_32 0x01
+#define PCI_IO_RANGE_MASK ~0x0f
+#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
+#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
+#define PCI_MEMORY_LIMIT 0x22
+#define PCI_MEMORY_RANGE_TYPE_MASK 0x0f
+#define PCI_MEMORY_RANGE_MASK ~0x0f
+#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
+#define PCI_PREF_MEMORY_LIMIT 0x26
+#define PCI_PREF_RANGE_TYPE_MASK 0x0f
+#define PCI_PREF_RANGE_TYPE_32 0x00
+#define PCI_PREF_RANGE_TYPE_64 0x01
+#define PCI_PREF_RANGE_MASK ~0x0f
+#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */
+#define PCI_PREF_LIMIT_UPPER32 0x2c
+#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */
+#define PCI_IO_LIMIT_UPPER16 0x32
+/* 0x34 same as for htype 0 */
+/* 0x35-0x3b is reserved */
+#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */
+/* 0x3c-0x3d are same as for htype 0 */
+#define PCI_BRIDGE_CONTROL 0x3e
+#define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */
+#define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */
+#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */
+#define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */
+#define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */
+#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
+#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */
+
+#define PCI_CB_CAPABILITY_LIST 0x14
+
+/* Capability lists */
+
+#define PCI_CAP_LIST_ID 0 /* Capability ID */
+#define PCI_CAP_ID_PM 0x01 /* Power Management */
+#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */
+#define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */
+#define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */
+#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */
+#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
+#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
+#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
+#define PCI_CAP_SIZEOF 4
+
+/* Power Management Registers */
+
+#define PCI_PM_PMC 2 /* PM Capabilities Register */
+#define PCI_PM_CAP_VER_MASK 0x0007 /* Version */
+#define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */
+#define PCI_PM_CAP_RESERVED 0x0010 /* Reserved field */
+#define PCI_PM_CAP_DSI 0x0020 /* Device specific initialization */
+#define PCI_PM_CAP_AUX_POWER 0x01C0 /* Auxilliary power support mask */
+#define PCI_PM_CAP_D1 0x0200 /* D1 power state support */
+#define PCI_PM_CAP_D2 0x0400 /* D2 power state support */
+#define PCI_PM_CAP_PME 0x0800 /* PME pin supported */
+#define PCI_PM_CAP_PME_MASK 0xF800 /* PME Mask of all supported states */
+#define PCI_PM_CAP_PME_D0 0x0800 /* PME# from D0 */
+#define PCI_PM_CAP_PME_D1 0x1000 /* PME# from D1 */
+#define PCI_PM_CAP_PME_D2 0x2000 /* PME# from D2 */
+#define PCI_PM_CAP_PME_D3 0x4000 /* PME# from D3 (hot) */
+#define PCI_PM_CAP_PME_D3cold 0x8000 /* PME# from D3 (cold) */
+#define PCI_PM_CTRL 4 /* PM control and status register */
+#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */
+#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */
+#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */
+#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */
+#define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */
+#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (??) */
+#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (??) */
+#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */
+#define PCI_PM_DATA_REGISTER 7 /* (??) */
+#define PCI_PM_SIZEOF 8
+
+/* AGP registers */
+
+#define PCI_AGP_VERSION 2 /* BCD version number */
+#define PCI_AGP_RFU 3 /* Rest of capability flags */
+#define PCI_AGP_STATUS 4 /* Status register */
+#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */
+#define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */
+#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */
+#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */
+#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */
+#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */
+#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */
+#define PCI_AGP_COMMAND 8 /* Control register */
+#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */
+#define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */
+#define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */
+#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */
+#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */
+#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */
+#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 2x rate */
+#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 1x rate */
+#define PCI_AGP_SIZEOF 12
+
+/* Slot Identification */
+
+#define PCI_SID_ESR 2 /* Expansion Slot Register */
+#define PCI_SID_ESR_NSLOTS 0x1f /* Number of expansion slots available */
+#define PCI_SID_ESR_FIC 0x20 /* First In Chassis Flag */
+#define PCI_SID_CHASSIS_NR 3 /* Chassis Number */
+
+/* Message Signalled Interrupts registers */
+
+#define PCI_MSI_FLAGS 2 /* Various flags */
+#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */
+#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */
+#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */
+#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */
+#define PCI_MSI_RFU 3 /* Rest of capability flags */
+#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */
+#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
+#define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */
+#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */
+
+#define PCI_SLOT(devfn) ((devfn) >> 3)
+#define PCI_FUNC(devfn) ((devfn) & 0x07)
+
+#define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
+
+/* PCI signature: "PCI " */
+#define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
+
+/* PCI service signature: "$PCI" */
+#define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
+
+union bios32 {
+ struct {
+ unsigned long signature; /* _32_ */
+ unsigned long entry; /* 32 bit physical address */
+ unsigned char revision; /* Revision level, 0 */
+ unsigned char length; /* Length in paragraphs should be 01 */
+ unsigned char checksum; /* All bytes must add up to zero */
+ unsigned char reserved[5]; /* Must be zero */
+ } fields;
+ char chars[16];
+};
+
+struct pci_device;
+struct dev;
+typedef int (*pci_probe_t)(struct dev *, struct pci_device *);
+
+struct pci_device {
+ uint32_t class;
+ uint16_t vendor, dev_id;
+ const char *name;
+ /* membase and ioaddr are silly and depricated */
+ unsigned int membase;
+ unsigned int ioaddr;
+ unsigned int romaddr;
+ unsigned char irq;
+ unsigned char devfn;
+ unsigned char bus;
+ unsigned char use_specified;
+ const struct pci_driver *driver;
+};
+
+extern void scan_pci_bus(int type, struct pci_device *dev);
+extern void find_pci(int type, struct pci_device *dev);
+
+extern int pcibios_read_config_byte(unsigned int bus, unsigned int device_fn, unsigned int where, uint8_t *value);
+extern int pcibios_write_config_byte (unsigned int bus, unsigned int device_fn, unsigned int where, uint8_t value);
+extern int pcibios_read_config_word(unsigned int bus, unsigned int device_fn, unsigned int where, uint16_t *value);
+extern int pcibios_write_config_word (unsigned int bus, unsigned int device_fn, unsigned int where, uint16_t value);
+extern int pcibios_read_config_dword(unsigned int bus, unsigned int device_fn, unsigned int where, uint32_t *value);
+extern int pcibios_write_config_dword(unsigned int bus, unsigned int device_fn, unsigned int where, uint32_t value);
+extern unsigned long pcibios_bus_base(unsigned int bus);
+extern void adjust_pci_device(struct pci_device *p);
+
+
+static inline int
+pci_read_config_byte(struct pci_device *dev, unsigned int where, uint8_t *value)
+{
+ return pcibios_read_config_byte(dev->bus, dev->devfn, where, value);
+}
+static inline int
+pci_write_config_byte(struct pci_device *dev, unsigned int where, uint8_t value)
+{
+ return pcibios_write_config_byte(dev->bus, dev->devfn, where, value);
+}
+static inline int
+pci_read_config_word(struct pci_device *dev, unsigned int where, uint16_t *value)
+{
+ return pcibios_read_config_word(dev->bus, dev->devfn, where, value);
+}
+static inline int
+pci_write_config_word(struct pci_device *dev, unsigned int where, uint16_t value)
+{
+ return pcibios_write_config_word(dev->bus, dev->devfn, where, value);
+}
+static inline int
+pci_read_config_dword(struct pci_device *dev, unsigned int where, uint32_t *value)
+{
+ return pcibios_read_config_dword(dev->bus, dev->devfn, where, value);
+}
+static inline int
+pci_write_config_dword(struct pci_device *dev, unsigned int where, uint32_t value)
+{
+ return pcibios_write_config_dword(dev->bus, dev->devfn, where, value);
+}
+
+/* Helper functions to find the size of a pci bar */
+extern unsigned long pci_bar_start(struct pci_device *dev, unsigned int bar);
+extern unsigned long pci_bar_size(struct pci_device *dev, unsigned int bar);
+/* Helper function to find pci capabilities */
+extern int pci_find_capability(struct pci_device *dev, int cap);
+struct pci_id {
+ unsigned short vendor, dev_id;
+ const char *name;
+};
+
+struct dev;
+/* Most pci drivers will use this */
+struct pci_driver {
+ int type;
+ const char *name;
+ pci_probe_t probe;
+ struct pci_id *ids;
+ int id_count;
+
+/* On a few occasions the hardware is standardized enough that
+ * we only need to know the class of the device and not the exact
+ * type to drive the device correctly. If this is the case
+ * set a class value other than 0.
+ */
+ unsigned short class;
+};
+
+#define __pci_driver __attribute__ ((used,__section__(".drivers.pci")))
+/* Defined by the linker... */
+extern const struct pci_driver pci_drivers[];
+extern const struct pci_driver pci_drivers_end[];
+
+#define PCI_ROM(VENDOR_ID, DEVICE_ID, IMAGE, DESCRIPTION) \
+ { VENDOR_ID, DEVICE_ID, IMAGE, }
+
+#endif /* PCI_H */
diff --git a/src/include/pci_ids.h b/src/include/pci_ids.h
new file mode 100644
index 000000000..bcf4c3cd8
--- /dev/null
+++ b/src/include/pci_ids.h
@@ -0,0 +1,342 @@
+/*
+ * PCI Class, Vendor and Device IDs
+ *
+ * Please keep sorted.
+ */
+
+/* Device classes and subclasses */
+
+#define PCI_CLASS_NOT_DEFINED 0x0000
+#define PCI_CLASS_NOT_DEFINED_VGA 0x0001
+
+#define PCI_BASE_CLASS_STORAGE 0x01
+#define PCI_CLASS_STORAGE_SCSI 0x0100
+#define PCI_CLASS_STORAGE_IDE 0x0101
+#define PCI_CLASS_STORAGE_FLOPPY 0x0102
+#define PCI_CLASS_STORAGE_IPI 0x0103
+#define PCI_CLASS_STORAGE_RAID 0x0104
+#define PCI_CLASS_STORAGE_OTHER 0x0180
+
+#define PCI_BASE_CLASS_NETWORK 0x02
+#define PCI_CLASS_NETWORK_ETHERNET 0x0200
+#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201
+#define PCI_CLASS_NETWORK_FDDI 0x0202
+#define PCI_CLASS_NETWORK_ATM 0x0203
+#define PCI_CLASS_NETWORK_OTHER 0x0280
+
+#define PCI_BASE_CLASS_DISPLAY 0x03
+#define PCI_CLASS_DISPLAY_VGA 0x0300
+#define PCI_CLASS_DISPLAY_XGA 0x0301
+#define PCI_CLASS_DISPLAY_3D 0x0302
+#define PCI_CLASS_DISPLAY_OTHER 0x0380
+
+#define PCI_BASE_CLASS_MULTIMEDIA 0x04
+#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400
+#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401
+#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402
+#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480
+
+#define PCI_BASE_CLASS_MEMORY 0x05
+#define PCI_CLASS_MEMORY_RAM 0x0500
+#define PCI_CLASS_MEMORY_FLASH 0x0501
+#define PCI_CLASS_MEMORY_OTHER 0x0580
+
+#define PCI_BASE_CLASS_BRIDGE 0x06
+#define PCI_CLASS_BRIDGE_HOST 0x0600
+#define PCI_CLASS_BRIDGE_ISA 0x0601
+#define PCI_CLASS_BRIDGE_EISA 0x0602
+#define PCI_CLASS_BRIDGE_MC 0x0603
+#define PCI_CLASS_BRIDGE_PCI 0x0604
+#define PCI_CLASS_BRIDGE_PCMCIA 0x0605
+#define PCI_CLASS_BRIDGE_NUBUS 0x0606
+#define PCI_CLASS_BRIDGE_CARDBUS 0x0607
+#define PCI_CLASS_BRIDGE_RACEWAY 0x0608
+#define PCI_CLASS_BRIDGE_OTHER 0x0680
+
+#define PCI_BASE_CLASS_COMMUNICATION 0x07
+#define PCI_CLASS_COMMUNICATION_SERIAL 0x0700
+#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
+#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702
+#define PCI_CLASS_COMMUNICATION_MODEM 0x0703
+#define PCI_CLASS_COMMUNICATION_OTHER 0x0780
+
+#define PCI_BASE_CLASS_SYSTEM 0x08
+#define PCI_CLASS_SYSTEM_PIC 0x0800
+#define PCI_CLASS_SYSTEM_DMA 0x0801
+#define PCI_CLASS_SYSTEM_TIMER 0x0802
+#define PCI_CLASS_SYSTEM_RTC 0x0803
+#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804
+#define PCI_CLASS_SYSTEM_OTHER 0x0880
+
+#define PCI_BASE_CLASS_INPUT 0x09
+#define PCI_CLASS_INPUT_KEYBOARD 0x0900
+#define PCI_CLASS_INPUT_PEN 0x0901
+#define PCI_CLASS_INPUT_MOUSE 0x0902
+#define PCI_CLASS_INPUT_SCANNER 0x0903
+#define PCI_CLASS_INPUT_GAMEPORT 0x0904
+#define PCI_CLASS_INPUT_OTHER 0x0980
+
+#define PCI_BASE_CLASS_DOCKING 0x0a
+#define PCI_CLASS_DOCKING_GENERIC 0x0a00
+#define PCI_CLASS_DOCKING_OTHER 0x0a80
+
+#define PCI_BASE_CLASS_PROCESSOR 0x0b
+#define PCI_CLASS_PROCESSOR_386 0x0b00
+#define PCI_CLASS_PROCESSOR_486 0x0b01
+#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02
+#define PCI_CLASS_PROCESSOR_ALPHA 0x0b10
+#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20
+#define PCI_CLASS_PROCESSOR_MIPS 0x0b30
+#define PCI_CLASS_PROCESSOR_CO 0x0b40
+
+#define PCI_BASE_CLASS_SERIAL 0x0c
+#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00
+#define PCI_CLASS_SERIAL_ACCESS 0x0c01
+#define PCI_CLASS_SERIAL_SSA 0x0c02
+#define PCI_CLASS_SERIAL_USB 0x0c03
+#define PCI_CLASS_SERIAL_FIBER 0x0c04
+#define PCI_CLASS_SERIAL_SMBUS 0x0c05
+
+#define PCI_BASE_CLASS_INTELLIGENT 0x0e
+#define PCI_CLASS_INTELLIGENT_I2O 0x0e00
+
+#define PCI_BASE_CLASS_SATELLITE 0x0f
+#define PCI_CLASS_SATELLITE_TV 0x0f00
+#define PCI_CLASS_SATELLITE_AUDIO 0x0f01
+#define PCI_CLASS_SATELLITE_VOICE 0x0f03
+#define PCI_CLASS_SATELLITE_DATA 0x0f04
+
+#define PCI_BASE_CLASS_CRYPT 0x10
+#define PCI_CLASS_CRYPT_NETWORK 0x1000
+#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001
+#define PCI_CLASS_CRYPT_OTHER 0x1080
+
+#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11
+#define PCI_CLASS_SP_DPIO 0x1100
+#define PCI_CLASS_SP_OTHER 0x1180
+
+#define PCI_CLASS_OTHERS 0xff
+
+/* Vendors */
+
+#define PCI_VENDOR_ID_DYNALINK 0x0675
+#define PCI_VENDOR_ID_BERKOM 0x0871
+#define PCI_VENDOR_ID_COMPAQ 0x0e11
+#define PCI_VENDOR_ID_NCR 0x1000
+#define PCI_VENDOR_ID_LSI_LOGIC 0x1000
+#define PCI_VENDOR_ID_ATI 0x1002
+#define PCI_VENDOR_ID_VLSI 0x1004
+#define PCI_VENDOR_ID_ADL 0x1005
+#define PCI_VENDOR_ID_NS 0x100b
+#define PCI_VENDOR_ID_TSENG 0x100c
+#define PCI_VENDOR_ID_WEITEK 0x100e
+#define PCI_VENDOR_ID_DEC 0x1011
+#define PCI_VENDOR_ID_CIRRUS 0x1013
+#define PCI_VENDOR_ID_IBM 0x1014
+#define PCI_VENDOR_ID_COMPEX2 0x101a
+/* pci.ids says "AT&T GIS (NCR)" */
+#define PCI_VENDOR_ID_WD 0x101c
+#define PCI_VENDOR_ID_AMI 0x101e
+#define PCI_VENDOR_ID_AMD 0x1022
+#define PCI_VENDOR_ID_TRIDENT 0x1023
+#define PCI_VENDOR_ID_AI 0x1025
+#define PCI_VENDOR_ID_DELL 0x1028
+#define PCI_VENDOR_ID_MATROX 0x102B
+#define PCI_VENDOR_ID_CT 0x102c
+#define PCI_VENDOR_ID_MIRO 0x1031
+#define PCI_VENDOR_ID_NEC 0x1033
+#define PCI_VENDOR_ID_FD 0x1036
+#define PCI_VENDOR_ID_SIS 0x1039
+#define PCI_VENDOR_ID_SI 0x1039
+#define PCI_VENDOR_ID_HP 0x103c
+#define PCI_VENDOR_ID_PCTECH 0x1042
+#define PCI_VENDOR_ID_ASUSTEK 0x1043
+#define PCI_VENDOR_ID_DPT 0x1044
+#define PCI_VENDOR_ID_OPTI 0x1045
+#define PCI_VENDOR_ID_ELSA 0x1048
+#define PCI_VENDOR_ID_ELSA 0x1048
+#define PCI_VENDOR_ID_SGS 0x104a
+#define PCI_VENDOR_ID_BUSLOGIC 0x104B
+#define PCI_VENDOR_ID_TI 0x104c
+#define PCI_VENDOR_ID_SONY 0x104d
+#define PCI_VENDOR_ID_OAK 0x104e
+/* Winbond have two vendor IDs! See 0x10ad as well */
+#define PCI_VENDOR_ID_WINBOND2 0x1050
+#define PCI_VENDOR_ID_ANIGMA 0x1051
+#define PCI_VENDOR_ID_EFAR 0x1055
+#define PCI_VENDOR_ID_MOTOROLA 0x1057
+#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507
+#define PCI_VENDOR_ID_PROMISE 0x105a
+#define PCI_VENDOR_ID_N9 0x105d
+#define PCI_VENDOR_ID_UMC 0x1060
+#define PCI_VENDOR_ID_X 0x1061
+#define PCI_VENDOR_ID_MYLEX 0x1069
+#define PCI_VENDOR_ID_PICOP 0x1066
+#define PCI_VENDOR_ID_APPLE 0x106b
+#define PCI_VENDOR_ID_YAMAHA 0x1073
+#define PCI_VENDOR_ID_NEXGEN 0x1074
+#define PCI_VENDOR_ID_QLOGIC 0x1077
+#define PCI_VENDOR_ID_CYRIX 0x1078
+#define PCI_VENDOR_ID_LEADTEK 0x107d
+#define PCI_VENDOR_ID_INTERPHASE 0x107e
+#define PCI_VENDOR_ID_CONTAQ 0x1080
+#define PCI_VENDOR_ID_FOREX 0x1083
+#define PCI_VENDOR_ID_OLICOM 0x108d
+#define PCI_VENDOR_ID_SUN 0x108e
+#define PCI_VENDOR_ID_CMD 0x1095
+#define PCI_VENDOR_ID_VISION 0x1098
+#define PCI_VENDOR_ID_BROOKTREE 0x109e
+#define PCI_VENDOR_ID_SIERRA 0x10a8
+#define PCI_VENDOR_ID_SGI 0x10a9
+#define PCI_VENDOR_ID_ACC 0x10aa
+#define PCI_VENDOR_ID_WINBOND 0x10ad
+#define PCI_VENDOR_ID_DATABOOK 0x10b3
+#define PCI_VENDOR_ID_PLX 0x10b5
+#define PCI_VENDOR_ID_MADGE 0x10b6
+#define PCI_VENDOR_ID_3COM 0x10b7
+#define PCI_VENDOR_ID_SMC 0x10b8
+#define PCI_VENDOR_ID_SUNDANCE 0x13F0
+#define PCI_VENDOR_ID_AL 0x10b9
+#define PCI_VENDOR_ID_MITSUBISHI 0x10ba
+#define PCI_VENDOR_ID_SURECOM 0x10bd
+#define PCI_VENDOR_ID_NEOMAGIC 0x10c8
+#define PCI_VENDOR_ID_ASP 0x10cd
+#define PCI_VENDOR_ID_MACRONIX 0x10d9
+#define PCI_VENDOR_ID_TCONRAD 0x10da
+#define PCI_VENDOR_ID_CERN 0x10dc
+#define PCI_VENDOR_ID_NVIDIA 0x10de
+#define PCI_VENDOR_ID_IMS 0x10e0
+#define PCI_VENDOR_ID_TEKRAM2 0x10e1
+#define PCI_VENDOR_ID_TUNDRA 0x10e3
+#define PCI_VENDOR_ID_AMCC 0x10e8
+#define PCI_VENDOR_ID_INTERG 0x10ea
+#define PCI_VENDOR_ID_REALTEK 0x10ec
+#define PCI_VENDOR_ID_XILINX 0x10ee
+#define PCI_VENDOR_ID_TRUEVISION 0x10fa
+#define PCI_VENDOR_ID_INIT 0x1101
+#define PCI_VENDOR_ID_CREATIVE 0x1102
+/* duplicate: ECTIVA */
+#define PCI_VENDOR_ID_ECTIVA 0x1102
+/* duplicate: CREATIVE */
+#define PCI_VENDOR_ID_TTI 0x1103
+#define PCI_VENDOR_ID_VIA 0x1106
+#define PCI_VENDOR_ID_VIATEC 0x1106
+#define PCI_VENDOR_ID_SIEMENS 0x110A
+#define PCI_VENDOR_ID_SMC2 0x1113
+#define PCI_VENDOR_ID_VORTEX 0x1119
+#define PCI_VENDOR_ID_EF 0x111a
+#define PCI_VENDOR_ID_IDT 0x111d
+#define PCI_VENDOR_ID_FORE 0x1127
+#define PCI_VENDOR_ID_IMAGINGTECH 0x112f
+#define PCI_VENDOR_ID_PHILIPS 0x1131
+#define PCI_VENDOR_ID_EICON 0x1133
+#define PCI_VENDOR_ID_CYCLONE 0x113c
+#define PCI_VENDOR_ID_ALLIANCE 0x1142
+#define PCI_VENDOR_ID_SYSKONNECT 0x1148
+#define PCI_VENDOR_ID_VMIC 0x114a
+#define PCI_VENDOR_ID_DIGI 0x114f
+#define PCI_VENDOR_ID_MUTECH 0x1159
+#define PCI_VENDOR_ID_XIRCOM 0x115d
+#define PCI_VENDOR_ID_RENDITION 0x1163
+#define PCI_VENDOR_ID_SERVERWORKS 0x1166
+#define PCI_VENDOR_ID_SBE 0x1176
+#define PCI_VENDOR_ID_TOSHIBA 0x1179
+#define PCI_VENDOR_ID_RICOH 0x1180
+#define PCI_VENDOR_ID_DLINK 0x1186
+#define PCI_VENDOR_ID_ARTOP 0x1191
+#define PCI_VENDOR_ID_ZEITNET 0x1193
+#define PCI_VENDOR_ID_OMEGA 0x119b
+#define PCI_VENDOR_ID_FUJITSU_ME 0x119e
+#define PCI_SUBVENDOR_ID_KEYSPAN 0x11a9
+#define PCI_VENDOR_ID_GALILEO 0x11ab
+#define PCI_VENDOR_ID_LINKSYS 0x11ad
+#define PCI_VENDOR_ID_LITEON 0x11ad
+#define PCI_VENDOR_ID_V3 0x11b0
+#define PCI_VENDOR_ID_NP 0x11bc
+#define PCI_VENDOR_ID_ATT 0x11c1
+#define PCI_VENDOR_ID_SPECIALIX 0x11cb
+#define PCI_VENDOR_ID_AURAVISION 0x11d1
+#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
+#define PCI_VENDOR_ID_IKON 0x11d5
+#define PCI_VENDOR_ID_ZORAN 0x11de
+#define PCI_VENDOR_ID_KINETIC 0x11f4
+#define PCI_VENDOR_ID_COMPEX 0x11f6
+#define PCI_VENDOR_ID_RP 0x11fe
+#define PCI_VENDOR_ID_CYCLADES 0x120e
+#define PCI_VENDOR_ID_ESSENTIAL 0x120f
+#define PCI_VENDOR_ID_O2 0x1217
+#define PCI_VENDOR_ID_3DFX 0x121a
+#define PCI_VENDOR_ID_SIGMADES 0x1236
+#define PCI_VENDOR_ID_CCUBE 0x123f
+#define PCI_VENDOR_ID_AVM 0x1244
+#define PCI_VENDOR_ID_DIPIX 0x1246
+#define PCI_VENDOR_ID_STALLION 0x124d
+#define PCI_VENDOR_ID_OPTIBASE 0x1255
+#define PCI_VENDOR_ID_ESS 0x125d
+#define PCI_VENDOR_ID_HARRIS 0x1260
+#define PCI_VENDOR_ID_SATSAGEM 0x1267
+#define PCI_VENDOR_ID_HUGHES 0x1273
+#define PCI_VENDOR_ID_ENSONIQ 0x1274
+#define PCI_VENDOR_ID_ROCKWELL 0x127A
+#define PCI_VENDOR_ID_DAVICOM 0x1282
+#define PCI_VENDOR_ID_ITE 0x1283
+/* formerly Platform Tech */
+#define PCI_VENDOR_ID_ESS_OLD 0x1285
+#define PCI_VENDOR_ID_ALTEON 0x12ae
+#define PCI_VENDOR_ID_USR 0x12B9
+#define PCI_VENDOR_ID_HOLTEK 0x12c3
+#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4
+#define PCI_VENDOR_ID_PICTUREL 0x12c5
+#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
+#define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0
+#define PCI_SUBVENDOR_ID_CHASE_PCIRAS 0x124D
+#define PCI_VENDOR_ID_AUREAL 0x12eb
+#define PCI_VENDOR_ID_CBOARDS 0x1307
+#define PCI_VENDOR_ID_SIIG 0x131f
+#define PCI_VENDOR_ID_ADMTEK 0x1317
+#define PCI_VENDOR_ID_DOMEX 0x134a
+#define PCI_VENDOR_ID_QUATECH 0x135C
+#define PCI_VENDOR_ID_SEALEVEL 0x135e
+#define PCI_VENDOR_ID_HYPERCOPE 0x1365
+#define PCI_VENDOR_ID_KAWASAKI 0x136b
+#define PCI_VENDOR_ID_LMC 0x1376
+#define PCI_VENDOR_ID_NETGEAR 0x1385
+#define PCI_VENDOR_ID_APPLICOM 0x1389
+#define PCI_VENDOR_ID_MOXA 0x1393
+#define PCI_VENDOR_ID_CCD 0x1397
+#define PCI_VENDOR_ID_MICROGATE 0x13c0
+#define PCI_VENDOR_ID_3WARE 0x13C1
+#define PCI_VENDOR_ID_ABOCOM 0x13D1
+#define PCI_VENDOR_ID_CMEDIA 0x13f6
+#define PCI_VENDOR_ID_LAVA 0x1407
+#define PCI_VENDOR_ID_TIMEDIA 0x1409
+#define PCI_VENDOR_ID_OXSEMI 0x1415
+#define PCI_VENDOR_ID_AIRONET 0x14b9
+#define PCI_VENDOR_ID_TITAN 0x14D2
+#define PCI_VENDOR_ID_PANACOM 0x14d4
+#define PCI_VENDOR_ID_BROADCOM 0x14e4
+#define PCI_VENDOR_ID_SYBA 0x1592
+#define PCI_VENDOR_ID_MORETON 0x15aa
+#define PCI_VENDOR_ID_ZOLTRIX 0x15b0
+#define PCI_VENDOR_ID_PDC 0x15e9
+#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
+#define PCI_VENDOR_ID_TEKRAM 0x1de1
+#define PCI_VENDOR_ID_3DLABS 0x3d3d
+#define PCI_VENDOR_ID_AVANCE 0x4005
+#define PCI_VENDOR_ID_AKS 0x416c
+#define PCI_VENDOR_ID_NETVIN 0x4a14
+#define PCI_VENDOR_ID_S3 0x5333
+#define PCI_VENDOR_ID_DCI 0x6666
+#define PCI_VENDOR_ID_GENROCO 0x5555
+#define PCI_VENDOR_ID_INTEL 0x8086
+#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
+#define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e
+#define PCI_VENDOR_ID_KTI 0x8e2e
+#define PCI_VENDOR_ID_ADAPTEC 0x9004
+#define PCI_VENDOR_ID_ADAPTEC2 0x9005
+#define PCI_VENDOR_ID_ATRONICS 0x907f
+#define PCI_VENDOR_ID_HOLTEK2 0x9412
+#define PCI_VENDOR_ID_NETMOS 0x9710
+#define PCI_SUBVENDOR_ID_EXSYS 0xd84d
+#define PCI_VENDOR_ID_TIGERJET 0xe159
+#define PCI_VENDOR_ID_ARK 0xedd8
diff --git a/src/include/pcmcia-opts.h b/src/include/pcmcia-opts.h
new file mode 100644
index 000000000..70dc0921c
--- /dev/null
+++ b/src/include/pcmcia-opts.h
@@ -0,0 +1,23 @@
+// pcmcia-opts.h
+// special options file for development time. Later this could end in Config(?)
+#ifndef __pcmciaopts
+#define __pcmciaopts
+
+ #define _yes_ 1
+ #define _no_ 0
+
+ #define SUPPORT_I82365 (_yes_)
+// #define SUPPORT_YENTA (_no_)
+// #define SUPPORT_SOME_DRIVER (_no_)
+
+ #define PCMCIA_SHUTDOWN (_yes_)
+ #define MAP_ATTRMEM_TO 0xd0000
+ #define MAP_ATTRMEM_LEN 0x02000
+
+ #define PDEBUG 3
+ // The higher the more output you get, 0..3
+ // Not fully implemented though, but for the future...
+
+ #undef _yes_
+ #undef _no_
+#endif
diff --git a/src/include/pcmcia.h b/src/include/pcmcia.h
new file mode 100644
index 000000000..6b8bc3273
--- /dev/null
+++ b/src/include/pcmcia.h
@@ -0,0 +1,157 @@
+// pcmcia.h - Header file for PCMCIA support
+
+#ifndef INCLUDE_PCMCIA_H
+#define INCLUDE_PCMCIA_H 1
+#include "etherboot.h"
+
+typedef unsigned char u_char;
+typedef unsigned short u_short;
+typedef unsigned int u_int;
+typedef unsigned long u_long;
+
+typedef u_short ioaddr_t;
+extern int sockets;
+
+#define MAXPCCSOCKS 8
+#define MAXPCCCONFIGS 8
+
+typedef enum ebpdriver_t { I82365, SOMEDRIVER } ebpdriver_t;
+typedef enum interface_func_t { INIT, SHUTDOWN, MAPATTRMEM, UNMAPATTRMEM, SELECTCONFIG } interface_func_t;
+typedef enum ebpstatus_t { EMPTY, HASCARD, INITIALIZED, SUSPENDED, OTHERDEVICE, UNKNOWN } ebpstatus_t;
+
+struct driver_interact_t {
+ ebpdriver_t id;
+ int (*f)(interface_func_t,int,int,int,int);
+ char *name;
+};
+struct pccsock_t {
+ ebpdriver_t device;
+ int drivernum;
+ ebpstatus_t status;
+ // Internal usage of the drivers:
+ int internalid;
+ int flags;
+ int ioaddr;
+ int type;
+ int configoffset;
+ int possibleconfignum;
+ int stringoffset;
+ u_int stringlength;
+ int rmask0;
+};
+
+extern struct pccsock_t pccsock[MAXPCCSOCKS];
+extern u_int pccsocks;
+
+struct pcc_config_t {
+ u_char index;
+ u_char irq;
+ int iowin;
+ int iolen;
+};
+
+
+int i82365_interfacer(interface_func_t,int,int,int,void *);
+void sleepticks(int);
+
+#define EINVAL 22
+
+
+//*********************************************************** cc.h:
+/* Definitions for card status flags for GetStatus */
+#define SS_WRPROT 0x0001
+#define SS_CARDLOCK 0x0002
+#define SS_EJECTION 0x0004
+#define SS_INSERTION 0x0008
+#define SS_BATDEAD 0x0010
+#define SS_BATWARN 0x0020
+#define SS_READY 0x0040
+#define SS_DETECT 0x0080
+#define SS_POWERON 0x0100
+#define SS_GPI 0x0200
+#define SS_STSCHG 0x0400
+#define SS_CARDBUS 0x0800
+#define SS_3VCARD 0x1000
+#define SS_XVCARD 0x2000
+#define SS_PENDING 0x4000
+
+/* cc.h: for InquireSocket */
+typedef struct socket_cap_t {
+ u_int features;
+ u_int irq_mask;
+ u_int map_size;
+ ioaddr_t io_offset;
+ u_char pci_irq;
+ //struct pci_dev *cb_dev;
+ //struct bus_operations *bus;
+ void *cb_dev;
+ void *bus;
+} socket_cap_t;
+/* InquireSocket capabilities */
+#define SS_CAP_PAGE_REGS 0x0001
+#define SS_CAP_VIRTUAL_BUS 0x0002
+#define SS_CAP_MEM_ALIGN 0x0004
+#define SS_CAP_STATIC_MAP 0x0008
+#define SS_CAP_PCCARD 0x4000
+#define SS_CAP_CARDBUS 0x8000
+
+/* for GetSocket, SetSocket */
+typedef struct socket_state_t {
+ u_int flags;
+ u_int csc_mask;
+ u_char Vcc, Vpp;
+ u_char io_irq;
+} socket_state_t;
+
+extern socket_state_t dead_socket;
+
+/* Socket configuration flags */
+#define SS_PWR_AUTO 0x0010
+#define SS_IOCARD 0x0020
+#define SS_RESET 0x0040
+#define SS_DMA_MODE 0x0080
+#define SS_SPKR_ENA 0x0100
+#define SS_OUTPUT_ENA 0x0200
+#define SS_DEBOUNCED 0x0400 /* Tell driver that the debounce delay has ended */
+#define SS_ZVCARD 0x0800
+
+/* Flags for I/O port and memory windows */
+#define MAP_ACTIVE 0x01
+#define MAP_16BIT 0x02
+#define MAP_AUTOSZ 0x04
+#define MAP_0WS 0x08
+#define MAP_WRPROT 0x10
+#define MAP_ATTRIB 0x20
+#define MAP_USE_WAIT 0x40
+#define MAP_PREFETCH 0x80
+
+/* Use this just for bridge windows */
+#define MAP_IOSPACE 0x20
+
+typedef struct pccard_io_map {
+ u_char map;
+ u_char flags;
+ u_short speed;
+ ioaddr_t start, stop;
+} pccard_io_map;
+
+
+typedef struct pccard_mem_map {
+ u_char map;
+ u_char flags;
+ u_short speed;
+ u_long sys_start, sys_stop;
+ u_int card_start;
+} pccard_mem_map;
+
+typedef struct cb_bridge_map {
+ u_char map;
+ u_char flags;
+ u_int start, stop;
+} cb_bridge_map;
+// need the global function pointer struct? *TODO*
+//************************************* end cc.h
+
+
+
+#endif
diff --git a/src/include/pxe.h b/src/include/pxe.h
new file mode 100644
index 000000000..48f555094
--- /dev/null
+++ b/src/include/pxe.h
@@ -0,0 +1,929 @@
+/*
+ * pxe.h for Etherboot.
+ *
+ * PXE is technically specified only for i386, but there's no reason
+ * why we shouldn't make the API available for other architectures,
+ * provided that someone wants to write the shim that allows an
+ * external program to call pxe_api_call().
+ *
+ * We stick with Intel's data structure definitions as far as possible
+ * on other architectures. Generally the only i386-specific stuff is
+ * related to addressing: real-mode segment:offset addresses, segment
+ * selectors, segment descriptors etc. We allow an architecture-
+ * specific header to define these types, then build the PXE
+ * structures. Note that we retain the names from the PXE
+ * specification document (e.g. SEGOFF16_t) even if the architecture
+ * in question doesn't represent a SEGOFF16_t as anything resembling a
+ * 16-bit segment:offset address. This is done in order to keep the
+ * structure definitions as close as possible to those in the spec, to
+ * minimise confusion.
+ *
+ * This file derives from several originals. One is pxe.h from
+ * FreeBSD. Another is general.h86 from netboot. The original
+ * copyright notices are reproduced below. This entire file is
+ * licensed under the GPL; the netboot code is GPL anyway and the
+ * FreeBSD code allows us to relicense under the GPL provided that we
+ * retain the FreeBSD copyright notice. This is my understanding,
+ * anyway. Other portions are my own and therefore Copyright (C) 2004
+ * Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef PXE_H
+#define PXE_H
+
+/* Include architecture-specific PXE data types
+ *
+ * May define SEGOFF16_t, SEGDESC_t and SEGSEL_t. These should be
+ * #defines to underlying * types. May also define
+ * IS_NULL_SEGOFF16(segoff16), SEGOFF16_TO_PTR(segoff16) and
+ * PTR_TO_SEGOFF16(ptr,segoff16)
+ */
+#ifndef PXE_TYPES_H
+#include <pxe_types.h>
+#endif
+
+/* Defaults in case pxe_types.h did not define a type. These are
+ * placeholder structures just to make the code compile.
+ */
+#ifndef SEGOFF16_t
+#define SEGOFF16_t void*
+#endif
+
+#ifndef IS_NULL_SEGOFF16
+#define IS_NULL_SEGOFF16(segoff16) ( (segoff16) == NULL )
+#endif
+
+#ifndef SEGOFF16_TO_PTR
+#define SEGOFF16_TO_PTR(segoff16) (segoff16)
+#endif
+
+#ifndef PTR_TO_SEGOFF16
+#define PTR_TO_SEGOFF16(ptr,segoff16) (segoff16) = (ptr);
+#endif
+
+#ifndef SEGDESC_t
+#define SEGDESC_t void
+#endif
+
+#ifndef SEGSEL_t
+#define SEGSEL_t void
+#endif
+
+/*****************************************************************************
+ * The following portion of this file is derived from FreeBSD's pxe.h.
+ * Do not remove the copyright notice below.
+ *****************************************************************************
+ */
+
+/*
+ * Copyright (c) 2000 Alfred Perlstein <alfred@freebsd.org>
+ * All rights reserved.
+ * Copyright (c) 2000 Paul Saab <ps@freebsd.org>
+ * All rights reserved.
+ * Copyright (c) 2000 John Baldwin <jhb@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/boot/i386/libi386/pxe.h,v 1.4.2.2 2000/09/10 02:52:18 ps Exp $
+ */
+
+/*
+ * The typedefs and structures declared in this file
+ * clearly violate style(9), the reason for this is to conform to the
+ * typedefs/structure-names used in the Intel literature to avoid confusion.
+ *
+ * It's for your own good. :)
+ */
+
+/* It seems that intel didn't think about ABI,
+ * either that or 16bit ABI != 32bit ABI (which seems reasonable)
+ * I have to thank Intel for the hair loss I incurred trying to figure
+ * out why PXE was mis-reading structures I was passing it (at least
+ * from my point of view)
+ *
+ * Solution: use gcc's '__attribute__ ((packed))' to correctly align
+ * structures passed into PXE
+ * Question: does this really work for PXE's expected ABI?
+ */
+#ifndef PACKED
+#define PACKED __attribute__ ((packed))
+#endif
+
+#define S_SIZE(s) s, sizeof(s) - 1
+
+#define IP_STR "%d.%d.%d.%d"
+#define IP_ARGS(ip) \
+ (int)(ip >> 24) & 0xff, (int)(ip >> 16) & 0xff, \
+ (int)(ip >> 8) & 0xff, (int)ip & 0xff
+
+#define MAC_STR "%02x:%02x:%02x:%02x:%02x:%02x"
+#define MAC_ARGS(mac) \
+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]
+
+typedef uint16_t PXENV_EXIT_t;
+typedef uint16_t PXENV_STATUS_t;
+typedef uint32_t IP4_t;
+typedef uint32_t ADDR32_t;
+/* It seems as though UDP_PORT_t is in network order, although I can't
+ * find anything in the spec to back this up. (Michael Brown)
+ */
+typedef uint16_t UDP_PORT_t;
+
+#define MAC_ADDR_LEN 16
+typedef uint8_t MAC_ADDR[MAC_ADDR_LEN];
+
+/* PXENV+ */
+typedef struct {
+ uint8_t Signature[6]; /* 'PXENV+' */
+ uint16_t Version; /* MSB = major, LSB = minor */
+ uint8_t Length; /* structure length */
+ uint8_t Checksum; /* checksum pad */
+ SEGOFF16_t RMEntry; /* SEG:OFF to PXE entry point */
+ /* don't use PMOffset and PMSelector (from the 2.1 PXE manual) */
+ uint32_t PMOffset; /* Protected mode entry */
+ SEGSEL_t PMSelector; /* Protected mode selector */
+ SEGSEL_t StackSeg; /* Stack segment address */
+ uint16_t StackSize; /* Stack segment size (bytes) */
+ SEGSEL_t BC_CodeSeg; /* BC Code segment address */
+ uint16_t BC_CodeSize; /* BC Code segment size (bytes) */
+ SEGSEL_t BC_DataSeg; /* BC Data segment address */
+ uint16_t BC_DataSize; /* BC Data segment size (bytes) */
+ SEGSEL_t UNDIDataSeg; /* UNDI Data segment address */
+ uint16_t UNDIDataSize; /* UNDI Data segment size (bytes) */
+ SEGSEL_t UNDICodeSeg; /* UNDI Code segment address */
+ uint16_t UNDICodeSize; /* UNDI Code segment size (bytes) */
+ SEGOFF16_t PXEPtr; /* SEG:OFF to !PXE struct,
+ only present when Version > 2.1 */
+} PACKED pxenv_t;
+
+/* !PXE */
+typedef struct {
+ uint8_t Signature[4];
+ uint8_t StructLength;
+ uint8_t StructCksum;
+ uint8_t StructRev;
+ uint8_t reserved_1;
+ SEGOFF16_t UNDIROMID;
+ SEGOFF16_t BaseROMID;
+ SEGOFF16_t EntryPointSP;
+ SEGOFF16_t EntryPointESP;
+ SEGOFF16_t StatusCallout;
+ uint8_t reserved_2;
+ uint8_t SegDescCn;
+ SEGSEL_t FirstSelector;
+ SEGDESC_t Stack;
+ SEGDESC_t UNDIData;
+ SEGDESC_t UNDICode;
+ SEGDESC_t UNDICodeWrite;
+ SEGDESC_t BC_Data;
+ SEGDESC_t BC_Code;
+ SEGDESC_t BC_CodeWrite;
+} PACKED pxe_t;
+
+#define PXENV_START_UNDI 0x0000
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint16_t ax;
+ uint16_t bx;
+ uint16_t dx;
+ uint16_t di;
+ uint16_t es;
+} PACKED t_PXENV_START_UNDI;
+
+#define PXENV_UNDI_STARTUP 0x0001
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_STARTUP;
+
+#define PXENV_UNDI_CLEANUP 0x0002
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_CLEANUP;
+
+#define PXENV_UNDI_INITIALIZE 0x0003
+typedef struct {
+ PXENV_STATUS_t Status;
+ ADDR32_t ProtocolIni; /* Phys addr of a copy of the driver module */
+ uint8_t reserved[8];
+} PACKED t_PXENV_UNDI_INITIALIZE;
+
+
+#define MAXNUM_MCADDR 8
+typedef struct {
+ uint16_t MCastAddrCount;
+ MAC_ADDR McastAddr[MAXNUM_MCADDR];
+} PACKED t_PXENV_UNDI_MCAST_ADDRESS;
+
+#define PXENV_UNDI_RESET_ADAPTER 0x0004
+typedef struct {
+ PXENV_STATUS_t Status;
+ t_PXENV_UNDI_MCAST_ADDRESS R_Mcast_Buf;
+} PACKED t_PXENV_UNDI_RESET_ADAPTER;
+
+#define PXENV_UNDI_SHUTDOWN 0x0005
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_SHUTDOWN;
+
+#define PXENV_UNDI_OPEN 0x0006
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint16_t OpenFlag;
+ uint16_t PktFilter;
+# define FLTR_DIRECTED 0x0001
+# define FLTR_BRDCST 0x0002
+# define FLTR_PRMSCS 0x0003
+# define FLTR_SRC_RTG 0x0004
+
+ t_PXENV_UNDI_MCAST_ADDRESS R_Mcast_Buf;
+} PACKED t_PXENV_UNDI_OPEN;
+
+#define PXENV_UNDI_CLOSE 0x0007
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_CLOSE;
+
+#define PXENV_UNDI_TRANSMIT 0x0008
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint8_t Protocol;
+# define P_UNKNOWN 0
+# define P_IP 1
+# define P_ARP 2
+# define P_RARP 3
+
+ uint8_t XmitFlag;
+# define XMT_DESTADDR 0x0000
+# define XMT_BROADCAST 0x0001
+
+ SEGOFF16_t DestAddr;
+ SEGOFF16_t TBD;
+ uint32_t Reserved[2];
+} PACKED t_PXENV_UNDI_TRANSMIT;
+
+#define MAX_DATA_BLKS 8
+typedef struct {
+ uint16_t ImmedLength;
+ SEGOFF16_t Xmit;
+ uint16_t DataBlkCount;
+ struct DataBlk {
+ uint8_t TDPtrType;
+ uint8_t TDRsvdByte;
+ uint16_t TDDataLen;
+ SEGOFF16_t TDDataPtr;
+ } DataBlock[MAX_DATA_BLKS];
+} PACKED t_PXENV_UNDI_TBD;
+
+#define PXENV_UNDI_SET_MCAST_ADDRESS 0x0009
+typedef struct {
+ PXENV_STATUS_t Status;
+ t_PXENV_UNDI_MCAST_ADDRESS R_Mcast_Buf;
+} PACKED t_PXENV_UNDI_SET_MCAST_ADDRESS;
+
+#define PXENV_UNDI_SET_STATION_ADDRESS 0x000A
+typedef struct {
+ PXENV_STATUS_t Status;
+ MAC_ADDR StationAddress; /* Temp MAC addres to use */
+} PACKED t_PXENV_UNDI_SET_STATION_ADDRESS;
+
+#define PXENV_UNDI_SET_PACKET_FILTER 0x000B
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint8_t filter; /* see UNDI_OPEN (0x0006) */
+} PACKED t_PXENV_UNDI_SET_PACKET_FILTER;
+
+#define PXENV_UNDI_GET_INFORMATION 0x000C
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint16_t BaseIo; /* Adapter base I/O address */
+ uint16_t IntNumber; /* Adapter IRQ number */
+ uint16_t MaxTranUnit; /* Adapter maximum transmit unit */
+ uint16_t HwType; /* Type of protocol at the hardware addr */
+# define ETHER_TYPE 1
+# define EXP_ETHER_TYPE 2
+# define IEEE_TYPE 6
+# define ARCNET_TYPE 7
+
+ uint16_t HwAddrLen; /* Length of hardware address */
+ MAC_ADDR CurrentNodeAddress; /* Current hardware address */
+ MAC_ADDR PermNodeAddress; /* Permanent hardware address */
+ SEGSEL_t ROMAddress; /* Real mode ROM segment address */
+ uint16_t RxBufCt; /* Receive queue length */
+ uint16_t TxBufCt; /* Transmit queue length */
+} PACKED t_PXENV_UNDI_GET_INFORMATION;
+
+#define PXENV_UNDI_GET_STATISTICS 0x000D
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint32_t XmitGoodFrames; /* Number of successful transmissions */
+ uint32_t RcvGoodFrames; /* Number of good frames received */
+ uint32_t RcvCRCErrors; /* Number of frames with CRC errors */
+ uint32_t RcvResourceErrors; /* Number of frames dropped */
+} PACKED t_PXENV_UNDI_GET_STATISTICS;
+
+#define PXENV_UNDI_CLEAR_STATISTICS 0x000E
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_CLEAR_STATISTICS;
+
+#define PXENV_UNDI_INITIATE_DIAGS 0x000F
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_INITIATE_DIAGS;
+
+#define PXENV_UNDI_FORCE_INTERRUPT 0x0010
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UNDI_FORCE_INTERRUPT;
+
+#define PXENV_UNDI_GET_MCAST_ADDRESS 0x0011
+typedef struct {
+ PXENV_STATUS_t Status;
+ IP4_t InetAddr; /* IP mulicast address */
+ MAC_ADDR MediaAddr; /* MAC multicast address */
+} PACKED t_PXENV_UNDI_GET_MCAST_ADDRESS;
+
+#define PXENV_UNDI_GET_NIC_TYPE 0x0012
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint8_t NicType; /* Type of NIC */
+# define PCI_NIC 2
+# define PnP_NIC 3
+# define CardBus_NIC 4
+
+ union {
+ struct {
+ uint16_t Vendor_ID;
+ uint16_t Dev_ID;
+ uint8_t Base_Class;
+ uint8_t Sub_Class;
+ uint8_t Prog_Intf;
+ uint8_t Rev;
+ uint16_t BusDevFunc;
+ uint16_t SubVendor_ID;
+ uint16_t SubDevice_ID;
+ } pci, cardbus;
+ struct {
+ uint32_t EISA_Dev_ID;
+ uint8_t Base_Class;
+ uint8_t Sub_Class;
+ uint8_t Prog_Intf;
+ uint16_t CardSelNum;
+ } pnp;
+ } info;
+} PACKED t_PXENV_UNDI_GET_NIC_TYPE;
+
+#define PXENV_UNDI_GET_IFACE_INFO 0x0013
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint8_t IfaceType[16]; /* Name of MAC type in ASCII. */
+ uint32_t LinkSpeed; /* Defined in NDIS 2.0 spec */
+ uint32_t ServiceFlags; /* Defined in NDIS 2.0 spec */
+ uint32_t Reserved[4]; /* must be 0 */
+} PACKED t_PXENV_UNDI_GET_IFACE_INFO;
+
+#define PXENV_UNDI_ISR 0x0014
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint16_t FuncFlag; /* PXENV_UNDI_ISR_OUT_xxx */
+ uint16_t BufferLength; /* Length of Frame */
+ uint16_t FrameLength; /* Total length of reciever frame */
+ uint16_t FrameHeaderLength; /* Length of the media header in Frame */
+ SEGOFF16_t Frame; /* receive buffer */
+ uint8_t ProtType; /* Protocol type */
+ uint8_t PktType; /* Packet Type */
+# define PXENV_UNDI_ISR_IN_START 1
+# define PXENV_UNDI_ISR_IN_PROCESS 2
+# define PXENV_UNDI_ISR_IN_GET_NEXT 3
+
+ /* one of these will be returned for PXENV_UNDI_ISR_IN_START */
+# define PXENV_UNDI_ISR_OUT_OURS 0
+# define PXENV_UNDI_ISR_OUT_NOT_OURS 1
+
+ /*
+ * one of these will bre returnd for PXEND_UNDI_ISR_IN_PROCESS
+ * and PXENV_UNDI_ISR_IN_GET_NEXT
+ */
+# define PXENV_UNDI_ISR_OUT_DONE 0
+# define PXENV_UNDI_ISR_OUT_TRANSMIT 2
+# define PXENV_UNDI_ISR_OUT_RECEIVE 3
+# define PXENV_UNDI_ISR_OUT_BUSY 4
+} PACKED t_PXENV_UNDI_ISR;
+
+#define PXENV_STOP_UNDI 0x0015
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_STOP_UNDI;
+
+#define PXENV_TFTP_OPEN 0x0020
+typedef struct {
+ PXENV_STATUS_t Status;
+ IP4_t ServerIPAddress;
+ IP4_t GatewayIPAddress;
+ uint8_t FileName[128];
+ UDP_PORT_t TFTPPort;
+ uint16_t PacketSize;
+} PACKED t_PXENV_TFTP_OPEN;
+
+#define PXENV_TFTP_CLOSE 0x0021
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_TFTP_CLOSE;
+
+#define PXENV_TFTP_READ 0x0022
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint16_t PacketNumber;
+ uint16_t BufferSize;
+ SEGOFF16_t Buffer;
+} PACKED t_PXENV_TFTP_READ;
+
+#define PXENV_TFTP_READ_FILE 0x0023
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint8_t FileName[128];
+ uint32_t BufferSize;
+ ADDR32_t Buffer;
+ IP4_t ServerIPAddress;
+ IP4_t GatewayIPAdress;
+ IP4_t McastIPAdress;
+ UDP_PORT_t TFTPClntPort;
+ UDP_PORT_t TFTPSrvPort;
+ uint16_t TFTPOpenTimeOut;
+ uint16_t TFTPReopenDelay;
+} PACKED t_PXENV_TFTP_READ_FILE;
+
+#define PXENV_TFTP_GET_FSIZE 0x0025
+typedef struct {
+ PXENV_STATUS_t Status;
+ IP4_t ServerIPAddress;
+ IP4_t GatewayIPAdress;
+ uint8_t FileName[128];
+ uint32_t FileSize;
+} PACKED t_PXENV_TFTP_GET_FSIZE;
+
+#define PXENV_UDP_OPEN 0x0030
+typedef struct {
+ PXENV_STATUS_t Status;
+ IP4_t src_ip; /* IP address of this station */
+} PACKED t_PXENV_UDP_OPEN;
+
+#define PXENV_UDP_CLOSE 0x0031
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_UDP_CLOSE;
+
+#define PXENV_UDP_READ 0x0032
+typedef struct {
+ PXENV_STATUS_t Status;
+ IP4_t src_ip; /* IP of sender */
+ IP4_t dest_ip; /* Only accept packets sent to this IP */
+ UDP_PORT_t s_port; /* UDP source port of sender */
+ UDP_PORT_t d_port; /* Only accept packets sent to this port */
+ uint16_t buffer_size; /* Size of the packet buffer */
+ SEGOFF16_t buffer; /* SEG:OFF to the packet buffer */
+} PACKED t_PXENV_UDP_READ;
+
+#define PXENV_UDP_WRITE 0x0033
+typedef struct {
+ PXENV_STATUS_t Status;
+ IP4_t ip; /* dest ip addr */
+ IP4_t gw; /* ip gateway */
+ UDP_PORT_t src_port; /* source udp port */
+ UDP_PORT_t dst_port; /* destination udp port */
+ uint16_t buffer_size; /* Size of the packet buffer */
+ SEGOFF16_t buffer; /* SEG:OFF to the packet buffer */
+} PACKED t_PXENV_UDP_WRITE;
+
+#define PXENV_UNLOAD_STACK 0x0070
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint8_t reserved[10];
+} PACKED t_PXENV_UNLOAD_STACK;
+
+
+#define PXENV_GET_CACHED_INFO 0x0071
+typedef struct {
+ PXENV_STATUS_t Status;
+ uint16_t PacketType; /* type (defined right here) */
+# define PXENV_PACKET_TYPE_DHCP_DISCOVER 1
+# define PXENV_PACKET_TYPE_DHCP_ACK 2
+# define PXENV_PACKET_TYPE_BINL_REPLY 3
+ uint16_t BufferSize; /* max to copy, leave at 0 for pointer */
+ SEGOFF16_t Buffer; /* copy to, leave at 0 for pointer */
+ uint16_t BufferLimit; /* max size of buffer in BC dataseg ? */
+} PACKED t_PXENV_GET_CACHED_INFO;
+
+
+/* structure filled in by PXENV_GET_CACHED_INFO
+ * (how we determine which IP we downloaded the initial bootstrap from)
+ * words can't describe...
+ */
+typedef struct {
+ uint8_t opcode;
+# define BOOTP_REQ 1
+# define BOOTP_REP 2
+ uint8_t Hardware; /* hardware type */
+ uint8_t Hardlen; /* hardware addr len */
+ uint8_t Gatehops; /* zero it */
+ uint32_t ident; /* random number chosen by client */
+ uint16_t seconds; /* seconds since did initial bootstrap */
+ uint16_t Flags; /* seconds since did initial bootstrap */
+# define BOOTP_BCAST 0x8000 /* ? */
+ IP4_t cip; /* Client IP */
+ IP4_t yip; /* Your IP */
+ IP4_t sip; /* IP to use for next boot stage */
+ IP4_t gip; /* Relay IP ? */
+ MAC_ADDR CAddr; /* Client hardware address */
+ uint8_t Sname[64]; /* Server's hostname (Optional) */
+ uint8_t bootfile[128]; /* boot filename */
+ union {
+# if 1
+# define BOOTP_DHCPVEND 1024 /* DHCP extended vendor field size */
+# else
+# define BOOTP_DHCPVEND 312 /* DHCP standard vendor field size */
+# endif
+ uint8_t d[BOOTP_DHCPVEND]; /* raw array of vendor/dhcp options */
+ struct {
+ uint8_t magic[4]; /* DHCP magic cookie */
+# ifndef VM_RFC1048
+# define VM_RFC1048 0x63825363L /* ? */
+# endif
+ uint32_t flags; /* bootp flags/opcodes */
+ uint8_t pad[56]; /* I don't think intel knows what a
+ union does... */
+ } v;
+ } vendor;
+} PACKED BOOTPLAYER;
+
+#define PXENV_RESTART_TFTP 0x0073
+#define t_PXENV_RESTART_TFTP t_PXENV_TFTP_READ_FILE
+
+#define PXENV_START_BASE 0x0075
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_START_BASE;
+
+#define PXENV_STOP_BASE 0x0076
+typedef struct {
+ PXENV_STATUS_t Status;
+} PACKED t_PXENV_STOP_BASE;
+
+/*****************************************************************************
+ * The following portion of this file is derived from netboot's
+ * general.h86. Do not remove the copyright notice below.
+ *****************************************************************************
+ */
+
+/*
+ * general.h86 - Common PXE definitions
+ *
+ * Copyright (C) 2003 Gero Kuhlmann <gero@gkminix.han.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * $Id$
+ */
+
+/*
+ **************************************************************************
+ *
+ * This file contains the Preboot API common definitions as
+ * per Intels PXE specification version 2.0.
+ *
+ * Updated to comply with PXE specification version 2.1 by Michael Brown.
+ *
+ **************************************************************************
+ *
+ * Result codes returned in AX by a PXENV API service:
+ */
+#define PXENV_EXIT_SUCCESS 0x0000
+#define PXENV_EXIT_FAILURE 0x0001
+
+
+
+/*
+ **************************************************************************
+ *
+ * CPU types (defined in WfM 1.1):
+ */
+#define PXENV_CPU_X86 0
+#define PXENV_CPU_ALPHA 1
+#define PXENV_CPU_PPC 2
+
+
+
+/*
+ **************************************************************************
+ *
+ * Bus types (defined in WfM 1.1):
+ */
+#define PXENV_BUS_ISA 0
+#define PXENV_BUS_EISA 1
+#define PXENV_BUS_MCA 2
+#define PXENV_BUS_PCI 3
+#define PXENV_BUS_VESA 4
+#define PXENV_BUS_PCMCIA 5
+
+
+
+/*
+ **************************************************************************
+ *
+ * Status codes returned in the status word of the PXENV API parameter
+ * structure. Some of these codes are also used to return status
+ * information from a boot image loader back to the bootrom.
+ */
+
+/* Generic API errors that are reported by the loader */
+#define PXENV_STATUS_SUCCESS 0x00
+#define PXENV_STATUS_FAILURE 0x01 /* general failure */
+#define PXENV_STATUS_BAD_FUNC 0x02 /* invalid function number */
+#define PXENV_STATUS_UNSUPPORTED 0x03 /* not yet supported */
+#define PXENV_STATUS_KEEP_UNDI 0x04 /* keep UNDI in memory */
+#define PXENV_STATUS_KEEP_ALL 0x05 /* keep everything in memory */
+#define PXENV_STATUS_OUT_OF_RESOURCES 0x06 /* also keep everything */
+
+/* ARP/UDP errors (0x10 to 0x1F) */
+#define PXENV_STATUS_ARP_CANCELED 0x10 /* ARP canceled by keystroke */
+#define PXENV_STATUS_ARP_TIMEOUT 0x11 /* ARP timeout */
+#define PXENV_STATUS_UDP_CLOSED 0x18 /* UDP closed */
+#define PXENV_STATUS_UDP_OPEN 0x19 /* UDP already open */
+#define PXENV_STATUS_TFTP_CLOSED 0x1A /* TFTP closed */
+#define PXENV_STATUS_TFTP_OPEN 0x1B /* TFTP already opened */
+
+/* BIOS/system errors (0x20 to 0x2F) */
+#define PXENV_STATUS_MCOPY_PROBLEM 0x20 /* can't copy into memory */
+
+/* TFP errors (0x30 to 0x3F) */
+#define PXENV_STATUS_TFTP_CANNOT_ARP 0x30 /* TFTP ARP problem */
+#define PXENV_STATUS_TFTP_OPEN_CANCELED 0x31 /* TFTP open canceled by key */
+#define PXENV_STATUS_TFTP_OPEN_TIMEOUT 0x32 /* timeout during TFTP open */
+#define PXENV_STATUS_TFTP_UNKNOWN_OPCODE 0x33 /* unknown TFTP opcode */
+#define PXENV_STATUS_TFTP_READ_CANCELED 0x34 /* TFTP read canceled by key */
+#define PXENV_STATUS_TFTP_READ_TIMEOUT 0x35 /* timeout during TFTP read */
+#define PXENV_STATUS_TFTP_ERROR_OPCODE 0x36 /* bad TFTP opcode */
+#define PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION \
+ 0x38 /* error during TFTP open */
+#define PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION \
+ 0x39 /* error during TFTP read */
+#define PXENV_STATUS_TFTP_TOO_MANY_PACKAGES \
+ 0x3A /* too many packages */
+#define PXENV_STATUS_TFTP_FILE_NOT_FOUND 0x3B /* file not found */
+#define PXENV_STATUS_TFTP_ACCESS_VIOLATION 0x3C /* access violation */
+#define PXENV_STATUS_TFTP_NO_MCAST_ADDRESS 0x3D /* no multicast address */
+#define PXENV_STATUS_TFTP_NO_FILESIZE 0x3E /* unable to get file size */
+#define PXENV_STATUS_TFTP_INVALID_PACKET_SIZE \
+ 0x3F /* invalid packet size */
+
+/* BOOTP errors (0x40 to 0x4F) */
+#define PXENV_STATUS_BOOTP_CANCELED 0x40 /* BOOTP canceled by key */
+#define PXENV_STATUS_BOOTP_TIMEOUT 0x41 /* timeout during BOOTP */
+#define PXENV_STATUS_BOOTP_NO_FILE 0x42 /* missing bootfile name */
+
+/* DHCP errors (0x50 to 0x5F) */
+#define PXENV_STATUS_DHCP_CANCELED 0x50 /* DHCP canceled by key */
+#define PXENV_STATUS_DHCP_TIMEOUT 0x51 /* timeout during DHCP */
+#define PXENV_STATUS_DHCP_NO_IP_ADDRESS 0x52 /* missing IP address */
+#define PXENV_STATUS_DHCP_NO_BOOTFILE_NAME 0x53 /* missing bootfile name */
+#define PXENV_STATUS_DHCP_BAD_IP_ADDRESS 0x54 /* invalid IP address */
+
+/* Driver errors (0x60 to 0x6F) */
+#define PXENV_STATUS_UNDI_INVALID_FUNCTION 0x60 /* invalid UNDI function */
+#define PXENV_STATUS_UNDI_MEDIATEST_FAILED 0x61 /* media test failed */
+#define PXENV_STATUS_UNDI_CANNOT_INIT_NIC_FOR_MCAST \
+ 0x62 /* cannot init for multicast */
+#define PXENV_STATUS_UNDI_CANNOT_INITIALIZE_NIC \
+ 0x63 /* cannot init NIC */
+#define PXENV_STATUS_UNDI_CANNOT_INITIALIZE_PHY \
+ 0x64 /* cannot init hardware */
+#define PXENV_STATUS_UNDI_CANNOT_READ_CONFIG_DATA \
+ 0x65 /* cannot read config data */
+#define PXENV_STATUS_UNDI_CANNOT_READ_INIT_DATA \
+ 0x66 /* cannot read init data */
+#define PXENV_STATUS_UNDI_BAD_MAC_ADDRESS 0x67 /* invalid hardware address */
+#define PXENV_STATUS_UNDI_BAD_EEPROM_CHECKSUM \
+ 0x68 /* invalid EEPROM checksum */
+#define PXENV_STATUS_UNDI_ERROR_SETTING_ISR 0x69
+#define PXENV_STATUS_UNDI_INVALID_STATE 0x6a /* invalid UNDI state */
+#define PXENV_STATUS_UNDI_TRANSMIT_ERROR 0x6b /* transmit error */
+#define PXENV_STATUS_UNDI_INVALID_PARAMETER \
+ 0x6c /* almost anything */
+
+/* Bootstrap (.1) errors (0x70 to 0x7F) */
+#define PXENV_STATUS_BSTRAP_PROMPT_MENU 0x74 /* invalid bootstrap menu */
+#define PXENV_STATUS_BSTRAP_MCAST_ADDR 0x76 /* missing multicast address */
+#define PXENV_STATUS_BSTRAP_MISSING_LIST 0x77 /* missing file list */
+#define PXENV_STATUS_BSTRAP_NO_RESPONSE 0x78 /* no response from server */
+#define PXENV_STATUS_BSTRAP_FILE_TOO_BIG 0x79 /* next file too big */
+
+/* Environment (.2) errors (0x80 to 0x8F) */
+
+/* MTFTP errors (0x90 to 0x9F) */
+#define PXENV_STATUS_MTFTP_OPEN_CANCEL 0x91 /* MTFTP open canceled by key */
+#define PXENV_STATUS_MTFTP_OPEN_TIMEOUT 0x92 /* timeout during MTFTP open */
+#define PXENV_STATUS_MTFTP_UNKNOWN_OP 0x93 /* unknown TFTP opcode */
+#define PXENV_STATUS_MTFTP_READ_CANCEL 0x94 /* MTFTP read canceled by key */
+#define PXENV_STATUS_MTFTP_READ_TIMEOUT 0x95 /* timeout during MTFTP read */
+#define PXENV_STATUS_MTFTP_ERROR_OP 0x96 /* bad TFTP opcode */
+#define PXENV_STATUS_MTFTP_CANNOT_OPEN 0x98 /* error during MTFTP open */
+#define PXENV_STATUS_MTFTP_CANNOT_READ 0x99 /* error during MTFTP read */
+#define PXENV_STATUS_MTFTP_TOO_MANY 0x9A /* too many packages */
+#define PXENV_STATUS_MTFTP_PACK_SIZE 0x9B /* invalid package size */
+
+/* Misc. errors (0xA0 to 0xAF) */
+#define PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE \
+ 0xA0 /* BINL canceled by key */
+#define PXENV_STATUS_BINL_NO_PXE_SERVER 0xA1 /* no BINL server found */
+#define PXENV_STATUS_NOT_AVAILABLE_IN_PMODE \
+ 0xA2 /* not avail. in prot mode */
+#define PXENV_STATUS_NOT_AVAILABLE_IN_RMODE \
+ 0xA3 /* not avail. in real mode */
+
+/* BUSD errors (0xB0 to 0xBF) */
+#define PXENV_STATUS_BUSD_DEVICE_NOT_SUPPORTED \
+ 0xB0 /* BUSD services not enabled */
+#define PXENV_STATUS_BUSD_DEV_ENABLE 0xB1 /* BUSD device not enabled */
+
+/* Loader errors (0xC0 to 0xCF) */
+#define PXENV_STATUS_LOADER_NO_FREE_BASE_MEMORY \
+ 0xC0 /* no free base memory */
+#define PXENV_STATUS_LOADER_NO_BC_ROMID 0xC1 /* no base code rom ID */
+#define PXENV_STATUS_LOADER_BAD_BC_ROMID 0xC2 /* bad base code rom ID */
+#define PXENV_STATUS_LOADER_BAD_BC_RUNTIME_IMAGE \
+ 0xC3 /* bad base code image */
+#define PXENV_STATUS_LOADER_NO_UNDI_ROMID 0xC4 /* no UNDI rom ID */
+#define PXENV_STATUS_LOADER_BAD_UNDI_ROMID 0xC5 /* bad UNDI rom ID */
+#define PXENV_STATUS_LOADER_UNDI_DRIVER_IMAGE \
+ 0xC6 /* bad UNDI runtime image */
+#define PXENV_STATUS_LOADER_NO_PXE_STRUCT 0xC8 /* missing !PXE struct */
+#define PXENV_STATUS_LOADER_NO_PXENV_STRUCT \
+ 0xC9 /* missing PXENV+ struct */
+#define PXENV_STATUS_LOADER_UNDI_START 0xCA /* UNDI not started */
+#define PXENV_STATUS_LOADER_BC_START 0xCB /* base code not started */
+
+/* Reserved errors (0xD0 to 0xFF) */
+#define PXENV_STATUS_IMAGE_INVALID 0xD0 /* invalid boot image */
+#define PXENV_STATUS_STOP_BASE 0xD1 /* error stopping base code */
+#define PXENV_STATUS_UNLOAD_BASE 0xD2 /* error unloading base code */
+#define PXENV_STATUS_STOP_UNDI 0xD3 /* error stopping UNDI */
+#define PXENV_STATUS_CLEANUP_UNDI 0xD4 /* error cleaning up UNDI */
+
+
+/*****************************************************************************
+ * The remainder of this file is original to Etherboot.
+ *****************************************************************************
+ */
+
+/* Dummy PXE opcode for the loader routine. We do this to make the
+ * API simpler
+ */
+#define PXENV_UNDI_LOADER 0x104d /* 'load' */
+
+typedef struct undi_loader {
+ union {
+ struct {
+ PXENV_STATUS_t Status;
+ uint16_t ax;
+ uint16_t bx;
+ uint16_t dx;
+ uint16_t di;
+ uint16_t es;
+ };
+ t_PXENV_START_UNDI start_undi;
+ };
+ uint16_t undi_ds;
+ uint16_t undi_cs;
+ SEGOFF16_t pxe_ptr;
+ SEGOFF16_t pxenv_ptr;
+} PACKED undi_loader_t;
+
+/* Union used for PXE API calls; we don't know the type of the
+ * structure until we interpret the opcode. Also, Status is available
+ * in the same location for any opcode, and it's convenient to have
+ * non-specific access to it.
+ */
+typedef union {
+ PXENV_STATUS_t Status; /* Make it easy to read status
+ for any operation */
+ t_PXENV_START_UNDI start_undi;
+ t_PXENV_UNDI_STARTUP undi_startup;
+ t_PXENV_UNDI_CLEANUP undi_cleanup;
+ t_PXENV_UNDI_INITIALIZE undi_initialize;
+ t_PXENV_UNDI_RESET_ADAPTER undi_reset_adapter;
+ t_PXENV_UNDI_SHUTDOWN undi_shutdown;
+ t_PXENV_UNDI_OPEN undi_open;
+ t_PXENV_UNDI_CLOSE undi_close;
+ t_PXENV_UNDI_TRANSMIT undi_transmit;
+ t_PXENV_UNDI_SET_MCAST_ADDRESS undi_set_mcast_address;
+ t_PXENV_UNDI_SET_STATION_ADDRESS undi_set_station_address;
+ t_PXENV_UNDI_SET_PACKET_FILTER undi_set_packet_filter;
+ t_PXENV_UNDI_GET_INFORMATION undi_get_information;
+ t_PXENV_UNDI_GET_STATISTICS undi_get_statistics;
+ t_PXENV_UNDI_CLEAR_STATISTICS undi_clear_statistics;
+ t_PXENV_UNDI_INITIATE_DIAGS undi_initiate_diags;
+ t_PXENV_UNDI_FORCE_INTERRUPT undi_force_interrupt;
+ t_PXENV_UNDI_GET_MCAST_ADDRESS undi_get_mcast_address;
+ t_PXENV_UNDI_GET_NIC_TYPE undi_get_nic_type;
+ t_PXENV_UNDI_GET_IFACE_INFO undi_get_iface_info;
+ t_PXENV_UNDI_ISR undi_isr;
+ t_PXENV_STOP_UNDI stop_undi;
+ t_PXENV_TFTP_OPEN tftp_open;
+ t_PXENV_TFTP_CLOSE tftp_close;
+ t_PXENV_TFTP_READ tftp_read;
+ t_PXENV_TFTP_READ_FILE tftp_read_file;
+ t_PXENV_TFTP_GET_FSIZE tftp_get_fsize;
+ t_PXENV_UDP_OPEN udp_open;
+ t_PXENV_UDP_CLOSE udp_close;
+ t_PXENV_UDP_READ udp_read;
+ t_PXENV_UDP_WRITE udp_write;
+ t_PXENV_UNLOAD_STACK unload_stack;
+ t_PXENV_GET_CACHED_INFO get_cached_info;
+ t_PXENV_RESTART_TFTP restart_tftp;
+ t_PXENV_START_BASE start_base;
+ t_PXENV_STOP_BASE stop_base;
+ undi_loader_t loader;
+} t_PXENV_ANY;
+
+/* PXE stack status indicator. See pxe_export.c for further
+ * explanation.
+ */
+typedef enum {
+ CAN_UNLOAD = 0,
+ MIDWAY,
+ READY
+} pxe_stack_state_t;
+
+/* Data structures installed as part of a PXE stack. Architectures
+ * will have extra information to append to the end of this.
+ */
+#define PXE_TFTP_MAGIC_COOKIE ( ( 'P'<<24 ) | ( 'x'<<16 ) | ( 'T'<<8 ) | 'f' )
+typedef struct {
+ pxe_t pxe __attribute__ ((aligned(16)));
+ pxenv_t pxenv __attribute__ ((aligned(16)));
+ pxe_stack_state_t state;
+ union {
+ BOOTPLAYER cached_info;
+ char packet[ETH_FRAME_LEN];
+ struct {
+ uint32_t magic_cookie;
+ unsigned int len;
+ int eof;
+ char data[TFTP_MAX_PACKET];
+ } tftpdata;
+ struct {
+ char *buffer;
+ uint32_t offset;
+ uint32_t bufferlen;
+ } readfile;
+ };
+ struct {} arch_data __attribute__ ((aligned(16)));
+} pxe_stack_t;
+
+#endif /* PXE_H */
diff --git a/src/include/pxe_export.h b/src/include/pxe_export.h
new file mode 100644
index 000000000..3d39e73cf
--- /dev/null
+++ b/src/include/pxe_export.h
@@ -0,0 +1,61 @@
+/* Header for pxe_export.c
+ */
+
+#ifndef PXE_EXPORT_H
+#define PXE_EXPORT_H
+
+#include "pxe.h"
+
+/* Function prototypes */
+extern int ensure_pxe_state ( pxe_stack_state_t wanted );
+
+extern PXENV_EXIT_t pxenv_start_undi ( t_PXENV_START_UNDI * );
+extern PXENV_EXIT_t pxenv_undi_startup ( t_PXENV_UNDI_STARTUP * );
+extern PXENV_EXIT_t pxenv_undi_cleanup ( t_PXENV_UNDI_CLEANUP * );
+extern PXENV_EXIT_t pxenv_undi_initialize ( t_PXENV_UNDI_INITIALIZE * );
+extern PXENV_EXIT_t pxenv_undi_reset_adapter ( t_PXENV_UNDI_RESET_ADAPTER * );
+extern PXENV_EXIT_t pxenv_undi_shutdown ( t_PXENV_UNDI_SHUTDOWN * );
+extern PXENV_EXIT_t pxenv_undi_open ( t_PXENV_UNDI_OPEN * );
+extern PXENV_EXIT_t pxenv_undi_close ( t_PXENV_UNDI_CLOSE * );
+extern PXENV_EXIT_t pxenv_undi_transmit ( t_PXENV_UNDI_TRANSMIT * );
+extern PXENV_EXIT_t pxenv_undi_set_mcast_address (
+ t_PXENV_UNDI_SET_MCAST_ADDRESS * );
+extern PXENV_EXIT_t pxenv_undi_set_station_address (
+ t_PXENV_UNDI_SET_STATION_ADDRESS * );
+extern PXENV_EXIT_t pxenv_undi_set_packet_filter (
+ t_PXENV_UNDI_SET_PACKET_FILTER * );
+extern PXENV_EXIT_t pxenv_undi_get_information (
+ t_PXENV_UNDI_GET_INFORMATION * );
+extern PXENV_EXIT_t pxenv_undi_get_statistics ( t_PXENV_UNDI_GET_STATISTICS* );
+extern PXENV_EXIT_t pxenv_undi_clear_statistics (
+ t_PXENV_UNDI_CLEAR_STATISTICS * );
+extern PXENV_EXIT_t pxenv_undi_initiate_diags ( t_PXENV_UNDI_INITIATE_DIAGS* );
+extern PXENV_EXIT_t pxenv_undi_force_interrupt (
+ t_PXENV_UNDI_FORCE_INTERRUPT * );
+extern PXENV_EXIT_t pxenv_undi_get_mcast_address (
+ t_PXENV_UNDI_GET_MCAST_ADDRESS * );
+extern PXENV_EXIT_t pxenv_undi_get_nic_type ( t_PXENV_UNDI_GET_NIC_TYPE * );
+extern PXENV_EXIT_t pxenv_undi_get_iface_info ( t_PXENV_UNDI_GET_IFACE_INFO *);
+extern PXENV_EXIT_t pxenv_undi_isr ( t_PXENV_UNDI_ISR * );
+extern PXENV_EXIT_t pxenv_stop_undi ( t_PXENV_STOP_UNDI * );
+extern PXENV_EXIT_t pxenv_tftp_open ( t_PXENV_TFTP_OPEN * );
+extern PXENV_EXIT_t pxenv_tftp_close ( t_PXENV_TFTP_CLOSE * );
+extern PXENV_EXIT_t pxenv_tftp_read ( t_PXENV_TFTP_READ * );
+extern PXENV_EXIT_t pxenv_tftp_read_file ( t_PXENV_TFTP_READ_FILE * );
+extern PXENV_EXIT_t pxenv_tftp_get_fsize ( t_PXENV_TFTP_GET_FSIZE * );
+extern PXENV_EXIT_t pxenv_udp_open ( t_PXENV_UDP_OPEN * );
+extern PXENV_EXIT_t pxenv_udp_close ( t_PXENV_UDP_CLOSE * );
+extern PXENV_EXIT_t pxenv_udp_read ( t_PXENV_UDP_READ * );
+extern PXENV_EXIT_t pxenv_udp_write ( t_PXENV_UDP_WRITE * );
+extern PXENV_EXIT_t pxenv_unload_stack ( t_PXENV_UNLOAD_STACK * );
+extern PXENV_EXIT_t pxenv_get_cached_info ( t_PXENV_GET_CACHED_INFO * );
+extern PXENV_EXIT_t pxenv_restart_tftp ( t_PXENV_RESTART_TFTP * );
+extern PXENV_EXIT_t pxenv_start_base ( t_PXENV_START_BASE * );
+extern PXENV_EXIT_t pxenv_stop_base ( t_PXENV_STOP_BASE * );
+
+extern PXENV_EXIT_t pxe_api_call ( int opcode, t_PXENV_ANY *params );
+
+/* Static variables */
+extern pxe_stack_t *pxe_stack;
+
+#endif /* PXE_EXPORT_H */
diff --git a/src/include/string.h b/src/include/string.h
new file mode 100644
index 000000000..56997fad7
--- /dev/null
+++ b/src/include/string.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ * Copyright (C) 2004 Tobias Lorenz
+ *
+ * string handling functions
+ * based on linux/include/linux/ctype.h
+ * and linux/include/linux/string.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ETHERBOOT_STRING_H
+#define ETHERBOOT_STRING_H
+
+#include "bits/string.h"
+
+
+/* *** FROM ctype.h *** */
+
+#define isdigit(c) ((c & 0x04) != 0)
+#define islower(c) ((c & 0x02) != 0)
+//#define isspace(c) ((c & 0x20) != 0)
+#define isupper(c) ((c & 0x01) != 0)
+
+static inline unsigned char tolower(unsigned char c)
+{
+ if (isupper(c))
+ c -= 'A'-'a';
+ return c;
+}
+
+static inline unsigned char toupper(unsigned char c)
+{
+ if (islower(c))
+ c -= 'a'-'A';
+ return c;
+}
+
+
+/* *** FROM string.h *** */
+
+int strnicmp(const char *s1, const char *s2, size_t len);
+char * strcpy(char * dest,const char *src);
+char * strncpy(char * dest,const char *src,size_t count);
+char * strcat(char * dest, const char * src);
+char * strncat(char *dest, const char *src, size_t count);
+int strcmp(const char * cs,const char * ct);
+int strncmp(const char * cs,const char * ct,size_t count);
+char * strchr(const char * s, int c);
+char * strrchr(const char * s, int c);
+size_t strlen(const char * s);
+size_t strnlen(const char * s, size_t count);
+size_t strspn(const char *s, const char *accept);
+char * strpbrk(const char * cs,const char * ct);
+char * strtok(char * s,const char * ct);
+char * strsep(char **s, const char *ct);
+void * memset(void * s,int c,size_t count);
+char * bcopy(const char * src, char * dest, int count);
+void * memcpy(void * dest,const void *src,size_t count);
+void * memmove(void * dest,const void *src,size_t count);
+int memcmp(const void * cs,const void * ct,size_t count);
+void * memscan(void * addr, int c, size_t size);
+char * strstr(const char * s1,const char * s2);
+void * memchr(const void *s, int c, size_t n);
+
+#endif /* ETHERBOOT_STRING */
diff --git a/src/include/sys_info.h b/src/include/sys_info.h
new file mode 100644
index 000000000..7127c6438
--- /dev/null
+++ b/src/include/sys_info.h
@@ -0,0 +1,33 @@
+#ifndef SYS_INFO_H
+#define SYS_INFO_H
+
+/* Information collected from firmware/bootloader */
+
+struct sys_info {
+ /* Values passed by bootloader */
+ unsigned long boot_type;
+ unsigned long boot_data;
+ unsigned long boot_arg;
+
+ char *firmware; /* "PCBIOS", "LinuxBIOS", etc. */
+ char *command_line; /* command line given to us */
+#if 0
+//By LYH
+//Will use meminfo in Etherboot
+ /* memory map */
+ int n_memranges;
+ struct memrange {
+ unsigned long long base;
+ unsigned long long size;
+ } *memrange;
+#endif
+};
+
+void collect_sys_info(struct sys_info *info);
+void collect_elfboot_info(struct sys_info *info);
+void collect_linuxbios_info(struct sys_info *info);
+
+/* Our name and version. I want to see single instance of these in the image */
+extern const char *program_name, *program_version;
+
+#endif /* SYS_INFO_H */
diff --git a/src/include/tcp.h b/src/include/tcp.h
new file mode 100644
index 000000000..f570d8ef5
--- /dev/null
+++ b/src/include/tcp.h
@@ -0,0 +1,35 @@
+#ifndef _TCP_H
+#define _TCP_H
+
+#define TCP_INITIAL_TIMEOUT (3*TICKS_PER_SEC)
+#define TCP_MAX_TIMEOUT (60*TICKS_PER_SEC)
+#define TCP_MIN_TIMEOUT (TICKS_PER_SEC)
+#define TCP_MAX_RETRY 10
+#define TCP_MAX_HEADER ((int)sizeof(struct iphdr)+64)
+#define TCP_MIN_WINDOW (1500-TCP_MAX_HEADER)
+#define TCP_MAX_WINDOW (65535-TCP_MAX_HEADER)
+
+
+#define MAX_URL 80
+
+
+#define FIN 1
+#define SYN 2
+#define RST 4
+#define PSH 8
+#define ACK 16
+#define URG 32
+
+
+struct tcphdr {
+ uint16_t src;
+ uint16_t dst;
+ int32_t seq;
+ int32_t ack;
+ uint16_t ctrl;
+ uint16_t window;
+ uint16_t chksum;
+ uint16_t urgent;
+};
+
+#endif /* _TCP_H */
diff --git a/src/include/tftp.h b/src/include/tftp.h
new file mode 100644
index 000000000..14763d483
--- /dev/null
+++ b/src/include/tftp.h
@@ -0,0 +1,77 @@
+#ifndef _TFTP_H
+#define _TFTP_H
+
+#define TFTP_PORT 69
+#define TFTP_DEFAULTSIZE_PACKET 512
+#define TFTP_MAX_PACKET 1432 /* 512 */
+
+#define TFTP_RRQ 1
+#define TFTP_WRQ 2
+#define TFTP_DATA 3
+#define TFTP_ACK 4
+#define TFTP_ERROR 5
+#define TFTP_OACK 6
+
+#define TFTP_CODE_EOF 1
+#define TFTP_CODE_MORE 2
+#define TFTP_CODE_ERROR 3
+#define TFTP_CODE_BOOT 4
+#define TFTP_CODE_CFG 5
+
+struct tftp_t {
+ struct iphdr ip;
+ struct udphdr udp;
+ uint16_t opcode;
+ union {
+ uint8_t rrq[TFTP_DEFAULTSIZE_PACKET];
+ struct {
+ uint16_t block;
+ uint8_t download[TFTP_MAX_PACKET];
+ } data;
+ struct {
+ uint16_t block;
+ } ack;
+ struct {
+ uint16_t errcode;
+ uint8_t errmsg[TFTP_DEFAULTSIZE_PACKET];
+ } err;
+ struct {
+ uint8_t data[TFTP_DEFAULTSIZE_PACKET+2];
+ } oack;
+ } u;
+} PACKED;
+
+/* define a smaller tftp packet solely for making requests to conserve stack
+ 512 bytes should be enough */
+struct tftpreq_t {
+ struct iphdr ip;
+ struct udphdr udp;
+ uint16_t opcode;
+ union {
+ uint8_t rrq[512];
+ struct {
+ uint16_t block;
+ } ack;
+ struct {
+ uint16_t errcode;
+ uint8_t errmsg[512-2];
+ } err;
+ } u;
+} PACKED;
+
+struct tftpreq_info_t {
+ const char *name;
+ unsigned short port;
+ unsigned short blksize;
+} PACKED;
+
+struct tftpblk_info_t {
+ char *data;
+ unsigned int block;
+ unsigned int len;
+ int eof;
+} PACKED;
+
+#define TFTP_MIN_PACKET (sizeof(struct iphdr) + sizeof(struct udphdr) + 4)
+
+#endif /* _TFTP_H */
diff --git a/src/include/timer.h b/src/include/timer.h
new file mode 100644
index 000000000..6b68f5f38
--- /dev/null
+++ b/src/include/timer.h
@@ -0,0 +1,62 @@
+/* Defines for routines to implement a low-overhead timer for drivers */
+
+ /*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2, or (at
+ * your option) any later version.
+ */
+
+#ifndef TIMER_H
+#define TIMER_H
+
+/* Ports for the 8254 timer chip */
+#define TIMER2_PORT 0x42
+#define TIMER_MODE_PORT 0x43
+
+/* Meaning of the mode bits */
+#define TIMER0_SEL 0x00
+#define TIMER1_SEL 0x40
+#define TIMER2_SEL 0x80
+#define READBACK_SEL 0xC0
+
+#define LATCH_COUNT 0x00
+#define LOBYTE_ACCESS 0x10
+#define HIBYTE_ACCESS 0x20
+#define WORD_ACCESS 0x30
+
+#define MODE0 0x00
+#define MODE1 0x02
+#define MODE2 0x04
+#define MODE3 0x06
+#define MODE4 0x08
+#define MODE5 0x0A
+
+#define BINARY_COUNT 0x00
+#define BCD_COUNT 0x01
+
+/* Timers tick over at this rate */
+#define CLOCK_TICK_RATE 1193180U
+#define TICKS_PER_MS (CLOCK_TICK_RATE/1000)
+
+/* Parallel Peripheral Controller Port B */
+#define PPC_PORTB 0x61
+
+/* Meaning of the port bits */
+#define PPCB_T2OUT 0x20 /* Bit 5 */
+#define PPCB_SPKR 0x02 /* Bit 1 */
+#define PPCB_T2GATE 0x01 /* Bit 0 */
+
+/* Ticks must be between 0 and 65535 (0 == 65536)
+ because it is a 16 bit counter */
+extern void load_timer2(unsigned int ticks);
+extern inline int timer2_running(void);
+extern void waiton_timer2(unsigned int ticks);
+
+extern void setup_timers(void);
+extern void ndelay(unsigned int nsecs);
+extern void udelay(unsigned int usecs);
+extern void mdelay(unsigned int msecs);
+
+
+#endif /* TIMER_H */
diff --git a/src/include/udp.h b/src/include/udp.h
new file mode 100644
index 000000000..9a254b8ee
--- /dev/null
+++ b/src/include/udp.h
@@ -0,0 +1,27 @@
+#ifndef _UDP_H
+#define _UDP_H
+
+#include "etherboot.h"
+#include "ip.h"
+
+struct udp_pseudo_hdr {
+ in_addr src;
+ in_addr dest;
+ uint8_t unused;
+ uint8_t protocol;
+ uint16_t len;
+} PACKED;
+struct udphdr {
+ uint16_t src;
+ uint16_t dest;
+ uint16_t len;
+ uint16_t chksum;
+ struct {} payload;
+} PACKED;
+struct udppacket {
+ struct iphdr ip;
+ struct udphdr udp;
+ struct {} payload;
+} PACKED;
+
+#endif /* _UDP_H */