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* [pxe] Discard queued PXE UDP packets when under memory pressureMichael Brown2023-01-251-0/+26
| | | | | | | | | | | The PXE UDP receive queue may grow without limit if the PXE NBP does not call PXENV_UDP_READ sufficiently frequently. Fix by implementing a cache discarder for received PXE UDP packets (similar to the TCP cache discarder). Reported-by: Tal Shorer <shorer@amazon.com> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Inhibit linker warnings about an implied executable stackMichael Brown2023-01-233-0/+3
| | | | | | | | | | | Some versions of the 32-bit ARM linker seem to treat the absence of a .note.GNU-stack section as implying an executable stack, and will print a warning that this is deprecated behaviour. Silence the warning by adding a .note.GNU-stack section to each assembly file and retaining the sections in the Linux linker script. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Use -mfloat-abi=soft only for EFI buildsMichael Brown2023-01-232-1/+5
| | | | | | | | | The EFI ABI requires the use of -mfloat-abi=soft, but other platforms may require -mfloat-abi=hard. Allow for this by using -mfloat-abi=soft only for EFI builds. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Use -fno-short-enums for all 32-bit ARM buildsMichael Brown2023-01-232-4/+5
| | | | | | | | | | | The EFI ABI requires the use of -fno-short-enums, and the EDK2 headers will perform a compile-time check that enums are 32 bits. The EDK2 headers may be included even in builds for non-EFI platforms, and so the -fno-short-enums flag must be used in all 32-bit ARM builds. Fortunately, nothing else currently cares about enum sizes. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [arm] Support building as a Linux userspace binary for AArch64Michael Brown2023-01-222-0/+16
| | | | | | | | | | | | | | | | | | | | Add support for building as a Linux userspace binary for AArch64. This allows the self-test suite to be more easily run for the 64-bit ARM code. For example: # On a native AArch64 system: # make bin-arm64-efi/tests.linux && ./bin-arm64-efi/tests.linux # On a non-AArch64 system (e.g. x86_64) via cross-compilation, # assuming that kernel and glibc headers are present within # /usr/aarch64-linux-gnu/sys-root/: # make bin-arm64-linux/tests.linux CROSS=aarch64-linux-gnu- && \ qemu-aarch64 -L /usr/aarch64-linux-gnu/sys-root/ \ ./bin-arm64-linux/tests.linux Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [dhcp] Simplify platform-specific client architecture definitionsMichael Brown2023-01-2213-285/+100
| | | | | | | | | | | | | | | | Move the platform-specific DHCP client architecture definitions to header files of the form <ipxe/$(PLATFORM)/dhcparch.h>. This simplifies the directory structure and allows the otherwise unused arch/$(ARCH)/include/$(PLATFORM) to be removed from the include directory search path, which avoids the confusing situation in which a header file may potentially be accessed through more than one path. For Linux userspace binaries on any architecture, use the EFI values for that architecture by delegating to the EFI header file. This avoids the need to explicitly select values for Linux userspace binaries for each architecture. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Move -Ulinux to common MakefileMichael Brown2023-01-221-3/+0
| | | | | | | The requirement to undo the implicit "-Dlinux" is not specific to the x86 architecture. Move this out of the x86-specific Makefile. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [linux] Centralise the linker script for Linux binariesMichael Brown2023-01-224-216/+4
| | | | | | | Reduce duplication between i386 and x86_64 by providing a single shared linker script that both architectures can include. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [cachedhcp] Include VLAN tag in filter for applying cached DHCPACKMichael Brown2022-12-221-1/+1
| | | | | | | | | | | | | | | When chainloading iPXE from a VLAN device, the MAC address within the cached DHCPACK will match the MAC address of the trunk device created by iPXE, and the cached DHCPACK will then end up being erroneously applied to the trunk device. This tends to break outbound IPv4 routing, since both the trunk and VLAN devices will have the same assigned IPv4 address. Fix by recording the VLAN tag along with the cached DHCPACK, and treating the VLAN tag as part of the filter used to match the cached DHCPACK against candidate network devices. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [bzimage] Fix parsing of "vga=..." when not at end of command linevgafixMichael Brown2022-10-271-4/+10
| | | | | | | | | | | | bzimage_parse_cmdline() uses strcmp() to identify the named "vga=..." kernel command line option values, which will give a false negative if the option is not last on the command line. Fix by temporarily changing the relevant command line separator (if any) to a NUL terminator. Debugged-by: Simon Rettberg <simon.rettberg@rz.uni-freiburg.de> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [pci] Select PCI I/O API at runtime for cloud imagesMichael Brown2022-09-187-0/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pretty much all physical machines and off-the-shelf virtual machines will provide a functional PCI BIOS. We therefore default to using only the PCI BIOS, with no fallback to an alternative mechanism if the PCI BIOS fails. AWS EC2 provides the opportunity to experience some exceptions to this rule. For example, the t3a.nano instances in eu-west-1 have no functional PCI BIOS at all. As of commit 83516ba ("[cloud] Use PCIAPI_DIRECT for cloud images") we therefore use direct Type 1 configuration space accesses in the images built and published for use in the cloud. Recent experience has discovered yet more variation in AWS EC2 instances. For example, some of the metal instance types have multiple PCI host bridges and the direct Type 1 accesses therefore see only a subset of the PCI devices. Attempt to accommodate future such variations by making the PCI I/O API selectable at runtime and choosing ECAM (if available), falling back to the PCI BIOS (if available), then finally falling back to direct Type 1 accesses. This is implemented as a dedicated PCIAPI_CLOUD API, rather than by having the PCI core select a suitable API at runtime (as was done for timers in commit 302f1ee ("[time] Allow timer to be selected at runtime"). The common case will remain that only the PCI BIOS API is required, and we would prefer to retain the optimisations that come from inlining the configuration space accesses in this common case. Cloud images are (at present) disk images rather than ROM images, and so the increased code size required for this design approach in the PCIAPI_CLOUD case is acceptable. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [bios] Allow pcibios_discover() to return an empty rangeMichael Brown2022-09-181-3/+5
| | | | | | | Allow pcibios_discover() to return an empty range if the INT 1A,B101 PCI BIOS installation check call fails. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [pci] Generalise pci_num_bus() to pci_discover()Michael Brown2022-09-153-11/+19
| | | | | | | | | | Allow pci_find_next() to discover devices beyond the first PCI segment, by generalising pci_num_bus() (which implicitly assumes that there is only a single PCI segment) with pci_discover() (which has the ability to return an arbitrary contiguous chunk of PCI bus:dev.fn address space). Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [acpi] Allow for the possibility of overriding ACPI tables at link timeMichael Brown2022-03-242-2/+2
| | | | | | | Allow for linked-in code to override the mechanism used to locate an ACPI table, thereby opening up the possibility of ACPI self-tests. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [fbcon] Support Unicode character outputMichael Brown2022-03-151-2/+23
| | | | | | | Accumulate UTF-8 characters in fbcon_putchar(), and require the frame buffer console's .glyph() method to accept Unicode character values. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [console] Support AltGr to access ASCII characters via remappingMichael Brown2022-02-152-0/+16
| | | | | | | | | | | | | Several keyboard layouts define ASCII characters as accessible only via the AltGr modifier. Add support for this modifier to ensure that all ASCII characters are accessible. Experiments suggest that the BIOS console is likely to fail to generate ASCII characters when the AltGr key is pressed. Work around this limitation by accepting LShift+RShift (which will definitely produce an ASCII character) as a synonym for AltGr. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [console] Centralise handling of key modifiersMichael Brown2022-02-152-5/+21
| | | | | | | Handle Ctrl and CapsLock key modifiers within key_remap(), to provide consistent behaviour across different console types. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [console] Handle remapping of scancode 86Michael Brown2022-02-101-0/+9
| | | | | | | | | | | | | | | | | The key with scancode 86 appears in the position between left shift and Z on a US keyboard, where it typically fails to exist entirely. Most US keyboard maps define this nonexistent key as generating "\|", with the notable exception of "loadkeys" which instead reports it as generating "<>". Both of these mapping choices duplicate keys that exist elsewhere in the map, which causes problems for our ASCII-based remapping mechanism. Work around these quirks by treating the key as generating "\|" with the high bit set, and making it subject to remapping. Where the BIOS generates "\|" as expected, this allows us to remap to the correct ASCII value. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [console] Avoid attempting to remap numeric keypad on BIOS consoleMichael Brown2022-02-101-3/+18
| | | | | | | | | | | | | | | | | To minimise code size, our keyboard mapping works on the basis of allowing the BIOS to convert the keyboard scancode into an ASCII character and then remapping the ASCII character. This causes problems with keyboard layouts such as "fr" that swap the shifted and unshifted digit keys, since the ASCII-based remapping will spuriously remap the numeric keypad (which produces the same ASCII values as the digit keys). Fix by checking that the keyboard scancode is within the range of keys that vary between keyboard mappings before attempting to remap the ASCII character. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [console] Generalise bios_keymap() as key_remap()Michael Brown2022-02-101-17/+1
| | | | | | | Allow the keyboard remapping functionality to be exposed to consoles other than the BIOS console. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [prefix] Fix use of writable code segment on 486 and earlier CPUsfix486Michael Brown2022-02-021-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In real mode, code segments are always writable. In protected mode, code segments can never be writable. The precise implementation of this attribute differs between CPU generations, with subtly different behaviour arising on the transitions from protected mode to real mode. At the point of transition (when the PE bit is cleared in CR0) the hidden portion of the %cs descriptor will retain whatever attributes were in place for the protected-mode code segment, including the fact that the segment is not writable. The immediately following code will perform a far control flow transfer (such as ljmp or lret) in order to load a real-mode value into %cs. On the Pentium and later CPUs, the retained protected-mode attributes will be ignored for any accesses via %cs while the CPU is in real mode. A write via %cs will therefore be allowed even though the hidden portion of the %cs descriptor still describes a non-writable segment. On the 486 and earlier CPUs, the retained protected-mode attributes will not be ignored for accesses via %cs. A write via %cs will therefore cause a CPU fault. To obtain normal real-mode behaviour (i.e. a writable %cs descriptor), special logic is added to the ljmp instruction that populates the hidden portion of the %cs descriptor with real-mode attributes when a far jump is executed in real mode. The result is that writes via %cs will cause a CPU fault until the first ljmp instruction is executed, after which writes via %cs will be allowed as expected in real mode. The transition code in libprefix.S currently uses lret to load a real-mode value into %cs after clearing the PE bit. Experimentation shows that only the ljmp instruction will work to load real-mode attributes into the hidden portion of the %cs descriptor: other far control flow transfers (such as lret, lcall, or int) do not do so. When running on a 486 or earlier CPU, this results in code within libprefix.S running with a non-writable code segment after a mode transition, which in turn results in a CPU fault when real-mode code in liba20.S attempts to write to %cs:enable_a20_method. Fix by constructing and executing an ljmp instruction, to trigger the relevant descriptor population logic on 486 and earlier CPUs. This ljmp instruction is constructed on the stack, since the .prefix section may be executing directly from ROM (or from memory that the BIOS has write-protected in order to emulate an ISA ROM region) and so cannot be modified. Reported-by: Nikolai Zhubr <n-a-zhubr@yandex.ru> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [efi] Include Secure Boot Advanced Targeting (SBAT) metadatasbatMichael Brown2022-01-135-0/+10
| | | | | | | | | | | | | | | | | SBAT defines an encoding for security generation numbers stored as a CSV file within a special ".sbat" section in the signed binary. If a Secure Boot exploit is discovered then the generation number will be incremented alongside the corresponding fix. Platforms may then record the minimum generation number required for any given product. This allows for an efficient revocation mechanism that consumes minimal flash storage space (in contrast to the DBX mechanism, which allows for only a single-digit number of revocation events to ever take place across all possible signed binaries). Add SBAT metadata to iPXE EFI binaries to support this mechanism. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [doc] Update user-visible ipxe.org URIs to use HTTPSMichael Brown2022-01-132-3/+3
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [acpi] Generalise DSDT/SSDT data extraction logicMichael Brown2021-09-081-4/+66
| | | | | | | Allow for the DSDT/SSDT signature-scanning and value extraction code to be reused for extracting a pass-through MAC address. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [efi] Record cached ProxyDHCPOFFER and PXEBSACK, if presentMichael Brown2021-07-271-1/+2
| | | | | | | | | | | | | | | | | | | Commit cd3de55 ("[efi] Record cached DHCPACK from loaded image's device handle, if present") added the ability for a chainloaded UEFI iPXE to reuse an IPv4 address and DHCP options previously obtained by a built-in PXE stack, without needing to perform a second DHCP request. Extend this to also record the cached ProxyDHCPOFFER and PXEBSACK obtained from the EFI_PXE_BASE_CODE_PROTOCOL instance installed on the loaded image's device handle, if present. This allows a chainloaded UEFI iPXE to reuse a boot filename or other options that were provided via a ProxyDHCP or PXE boot server mechanism, rather than by standard DHCP. Tested-by: Andreas Hammarskjöld <junior@2PintSoftware.com> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [crypto] Add memory output constraints for big-integer inline assemblyMichael Brown2021-06-032-22/+43
| | | | | | | | | | | | | | | The ARM versions of the big-integer inline assembly functions include constraints to indicate that the output value is modified by the assembly code. These constraints are not present in the equivalent code for the x86 versions. As of GCC 11, this results in the compiler reporting that the output values may be uninitialized. Fix by including the relevant memory output constraints. Reported-by: Christian Hesse <mail@eworm.de> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [cpio] Split out bzImage initrd CPIO header constructionMichael Brown2021-05-213-56/+4
| | | | | | | | | | | | iPXE will construct CPIO headers for images that have a non-empty command line, thereby allowing raw images (without CPIO headers) to be injected into a dynamically constructed initrd. This feature is currently implemented within the BIOS-only bzImage format support. Split out the CPIO header construction logic to allow for reuse in other contexts such as in a UEFI build. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [undi] Read TSC only when profilingMichael Brown2021-05-121-2/+9
| | | | | | | | | Avoid using the "rdtsc" instruction unless profiling is enabled. This allows the non-debug build of the UNDI driver to be used on a CPU such as a 486 that does not support the TSC. Reported-by: Nikolai Zhubr <n-a-zhubr@yandex.ru> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [rng] Check for TSC support before using RTC entropy sourceMichael Brown2021-05-122-0/+14
| | | | Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [prefix] Specify i486 architecture for LZMA decompressorMichael Brown2021-05-121-1/+1
| | | | | | | | | | The decompressor uses the i486 "bswap" instruction, but does not require any instructions that exist only on i586 or above. Update the ".arch" directive to reflect the requirements of the code as implemented. Reported-by: Martin Habets <habetsm.xilinx@gmail.com> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [int13] Do not report INT 13 extension support for emulated floppiesMichael Brown2021-04-131-2/+2
| | | | | | | | | | | | | | | | | | | | | The INT 13 extensions provide a mechanism for accessing disks using linear (LBA) rather than C/H/S addressing. SAN protocols such as iSCSI invariably support only linear addresses and so iPXE currently provides LBA access to all SAN disks (with autodetection and emulation of an appropriate geometry for C/H/S accesses). Most BIOSes will not report support for INT 13 extensions for floppy disk drives, and some operating systems may be confused by a floppy drive that claims such support. Minimise surprise by reporting the existence of support for INT 13 extensions only for non-floppy drive numbers. Continue to provide support for all drive numbers, to avoid breaking operating systems that may unconditionally use the INT 13 extensions without first checking for support. Reported-by: Valdo Toost <vtoost@hot.ee> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [pci] Avoid scanning nonexistent buses when using PCIAPI_DIRECTMichael Brown2021-04-101-2/+2
| | | | | | | | | | | | | | There is no method for obtaining the number of PCI buses when using PCIAPI_DIRECT, and we therefore currently scan all possible bus numbers. This can cause a several-second startup delay in some virtualised environments, since PCI configuration space access will necessarily require the involvement of the hypervisor. Ameliorate this situation by defaulting to scanning only a single bus, and expanding the number of PCI buses to accommodate any subordinate buses that are detected during enumeration. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Allow __asmcall to be used as a type attributeMichael Brown2021-03-026-8/+9
| | | | | | | | | | | The "used" attribute can be applied only to functions or variables, which prevents the use of __asmcall as a type attribute. Fix by removing "used" from the definition of __asmcall for i386 and x86_64 architectures, and adding explicit __used annotations where necessary. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [acpi] Allow for platforms that provide ACPI tables individuallyMichael Brown2021-03-012-0/+14
| | | | | | | | | | | | | | | | The ACPI API currently expects platforms to provide access to a single contiguous ACPI table. Some platforms (e.g. Linux userspace) do not provide a convenient way to obtain the entire ACPI table, but do provide access to individual tables. All iPXE consumers of the ACPI API require access only to individual tables. Redefine the internal API to make acpi_find() an API method, with all existing implementations delegating to the current RSDT-based implementation. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [linux] Use host glibc system call wrappersMichael Brown2021-02-2812-482/+22
| | | | | | | | | | | | | | | | | | | | | | When building as a Linux userspace application, iPXE currently implements its own system calls to the host kernel rather than relying on the host's C library. The output binary is statically linked and has no external dependencies. This matches the general philosophy of other platforms on which iPXE runs, since there are no external libraries available on either BIOS or UEFI bare metal. However, it would be useful for the Linux userspace application to be able to link against host libraries such as libslirp. Modify the build process to perform a two-stage link: first picking out the requested objects in the usual way from blib.a but with relocations left present, then linking again with a helper object to create a standard hosted application. The helper object provides the standard main() entry point and wrappers for the Linux system calls required by the iPXE Linux drivers and interface code. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [linux] Add a prefix to all symbols to avoid future name collisionsMichael Brown2021-02-271-0/+2
| | | | | | | Allow for the possibility of linking to platform libraries for the Linux userspace build by adding an iPXE-specific symbol prefix. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [bitops] Provide an explicit operand size for bit test instructionsMichael Brown2021-02-271-4/+4
| | | | | | | | | | | | | | | | | | Recent versions of the GNU assembler (observed with GNU as 2.35 on Fedora 33) will produce a warning message Warning: no instruction mnemonic suffix given and no register operands; using default for `bts' The operand size affects only the potential range for the bit number. Since we pass the bit number as an unsigned int, it is already constrained to 32 bits for both i386 and x86_64. Silence the assembler warning by specifying an explicit 32-bit operand size (and thereby matching the choice that the assembler would otherwise make automatically). Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [librm] Test for FXSAVE/FXRSTOR instruction supportMichael Brown2021-02-183-6/+36
| | | | | | | | | | | | | | | | | Assume that preservation of the %xmm registers is unnecessary during installation of iPXE into memory, since this is an operation that by its nature substantially disrupts large portions of the system anyway (such as the E820 memory map). This assumption allows us to utilise the existing CPUID code to check that FXSAVE/FXRSTOR are supported. Test for support during the call to init_librm and store the flag for use during subsequent calls to virt_call. Reduce the scope of TIVOLI_VMM_WORKAROUND to affecting only the call to check_fxsr(), to reduce #ifdef pollution in the remaining code. Debugged-by: Johannes Heimansberg <git@jhe.dedyn.io> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [librm] Add missing __asmcall on init_idt()Michael Brown2021-02-181-1/+1
| | | | | | | | The __asmcall declaration has no effect on a void function with no parameters, but should be included for completeness since the function is called directly from assembly code. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [prefix] Add a generic raw image prefixMichael Brown2021-02-181-0/+53
| | | | | | | | | | | | | | | | | | | | Provide a generic raw image prefix, which assumes that the iPXE image has been loaded in its entirety on a paragraph boundary. The resulting .raw image can be loaded via RPL using an rpld.conf file such as: HOST { ethernet = 00:00:00:00:00:00/6; FILE { path="ipxe.raw"; load=0x2000; }; execute=0x2000; }; Debugged-by: Johannes Heimansberg <git@jhe.dedyn.io> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [initrd] Allow for zero-length initrd filesMichael Brown2021-02-181-6/+6
| | | | | | | | | | | A zero-length initrd file will currently cause an endless loop during reshuffling as the empty image is repeatedly swapped with itself. Fix by terminating the inner loop before considering an image as a candidate to be swapped with itself. Reported-by: Pico Mitchell <pico@randomapplications.com> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [pxe] Split out platform-independent portions of cachedhcp.cMichael Brown2021-02-172-179/+76
| | | | | | | | | Split out the portions of cachedhcp.c that can be shared between BIOS and UEFI (both of which can provide a buffer containing a previously obtained DHCP packet, and neither of which provide a means to determine the length of this DHCP packet). Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Work around stray sections introduced by some binutils versionsMichael Brown2021-02-152-7/+33
| | | | | | | | | | | | | | | Some versions of GNU ld (observed with binutils 2.36 on Arch Linux) introduce a .note.gnu.property section marked as loadable at a high address and with non-empty contents. This adds approximately 128MB of garbage to the BIOS .usb disk images. Fix by using a custom linker script for the prefix-only binaries such as the USB disk partition table and MBR, in order to allow unwanted sections to be explicitly discarded. Reported-by: Christian Hesse <mail@eworm.de> Tested-by: Christian Hesse <mail@eworm.de> Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Use .balign directive instead of .alignMichael Brown2021-02-1210-16/+16
| | | | | | | | | | | | | The semantics of the assembler's .align directive vary by CPU architecture. For the ARM builds, it specifies a power of two rather than a number of bytes. This currently leads to the .einfo entries (which do not appear in the final binary) having an alignment of 256 bytes for the ARM builds. Fix by switching to the GNU-specific directive .balign, which is consistent across architectures Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Work around -fPIE patched versions of gcc on all architecturesMichael Brown2021-02-042-20/+0
| | | | | | | | | | | | | | | | | | | | | | | Several distributions include versions of gcc that are patched to create position-independent executables by default. These have caused multiple problems over the years: see e.g. commits fe61f6d ("[build] Fix compilation when gcc is patched to default to -fPIE -Wl,-pie"), 5de1346 ("[build] Apply the "-fno-PIE -nopie" workaround only to i386 builds"), 7c395b0 ("[build] Use -no-pie on newer versions of gcc"), and decee20 ("[build] Disable position-independent code for ARM64 EFI builds"). The build system currently attempts to work around these mildly broken patched versions of gcc for the i386 and arm64 architectures. This misses the relatively obscure bin-x86_64-pcbios build platform, which turns out to also require the same workaround. Attempt to preempt the next such required workaround by moving the existing i386 version to apply to all platforms and all architectures, unless -fpie has been requested explicitly by another Makefile (as is done by arch/x86_64/Makefile.efi). Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Allow BIOS linker script to be used with FreeBSD linkerMichael Brown2021-01-301-13/+13
| | | | | | | Add a few more ABSOLUTE() expressions to convince the FreeBSD linker that already-absolute symbols are, in fact, absolute. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Avoid modifying load addresses when stripping .zinfo sectionMichael Brown2021-01-301-7/+42
| | | | | | | | | | | | | | | Some versions of objcopy will spuriously complain when asked to extract the .zinfo section since doing so will nominally alter the load addresses of the (non-loadable) .bss.* sections. Avoid these warnings by placing the .zinfo section at the very end of the load memory address space. Allocate non-overlapping load memory addresses for the (non-loadable) .bss.* sections, in the hope of avoiding spurious warnings about overlapping load addresses. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [image] Provide image_memory()Michael Brown2021-01-251-39/+5
| | | | | | | Consolidate the remaining logic common to initrd_init() and imgmem() into a shared image_memory() function. Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [image] Provide image_set_data()Michael Brown2021-01-221-12/+9
| | | | | | | Extract part of the logic in initrd_init() to a standalone function image_set_data(). Signed-off-by: Michael Brown <mcb30@ipxe.org>
* [build] Create util/genfsimg for building filesystem-based imagesMichael Brown2021-01-131-39/+4
| | | | | | | | | | | | | | | | | | | | | Generalise util/geniso, util/gensdsk, and util/genefidsk to create a single script util/genfsimg that can be used to build either FAT filesystem images or ISO images. Extend the functionality to allow for building multi-architecture UEFI bootable ISO images and combined BIOS+UEFI images. For example: ./util/genfsimg -o combined.iso \ bin-x86_64-efi/ipxe.efi \ bin-arm64-efi/ipxe.efi \ bin/ipxe.lkrn would generate a hybrid image that could be used as a CDROM (or hard disk or USB key) on legacy BIOS, x86_64 UEFI, or ARM64 UEFI. Signed-off-by: Michael Brown <mcb30@ipxe.org>
generated by cgit (git 2.34.1) at 2025-02-24 01:40:47 +0000