diff options
author | Tom Rini <trini@konsulko.com> | 2022-12-02 16:42:33 -0500 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-12-22 10:31:48 -0500 |
commit | 960379d4501fcb64ca20810c4fc4fe74806ede7b (patch) | |
tree | c357c17b25df4a63a59547cfc551635f6b568f3e | |
parent | acdf89ec060931ae4c87780ab0e65a6783ccd94b (diff) | |
download | u-boot-960379d4501fcb64ca20810c4fc4fe74806ede7b.tar.gz |
Convert CONFIG_L2_CACHE to Kconfig
This converts the following to Kconfig:
CONFIG_L2_CACHE
Signed-off-by: Tom Rini <trini@konsulko.com>
45 files changed, 43 insertions, 20 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 721dafc5ab1..36519613a2c 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1297,6 +1297,9 @@ config SYS_NUM_TLBCAMS Number of TLB CAM entries for Book-E chips. 64 for E500MC, 16 for other E500 SoCs. +config L2_CACHE + bool "Enable L2 cache support" + if HETROGENOUS_CLUSTERS config SYS_MAPLE diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 241cb80fde9..05034ce2e46 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -13,6 +13,7 @@ CONFIG_SRIO1=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_USE_UBOOTPATH=y CONFIG_UBOOTPATH="8548cds/u-boot.bin" diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 5af056bd4f4..965c37e45ec 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -13,6 +13,7 @@ CONFIG_SRIO1=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_USE_UBOOTPATH=y CONFIG_UBOOTPATH="8548cds/u-boot.bin" diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 34d1938129f..004175c8048 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -13,6 +13,7 @@ CONFIG_SRIO1=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_TARGET_MPC8548CDS_LEGACY=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 3fb993e201c..c12948ae7c8 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index dc6dd717df9..6a320713ebd 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index bc29526f636..e3b786d4efd 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 5c42d5ee367..e6ce59e2971 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index b6e68d27885..99b94a061df 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index fe24faa1757..071123362f5 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 110a9b4ad3d..9f2afcdadc9 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index fcd60f7a4ef..7c64fdcf6f0 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 76919c3881f..87953b8f190 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index b2972586946..bf7078015e2 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index df80488cff1..4dbf8695e4e 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index d27ea17a0b6..f5bcffbd490 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 88de4f9b92e..82f29bed54e 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 2e86aec5958..985243cebd8 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index d5bbd6dca54..3dfb509c8ad 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 66efe739e99..f3d399f84f7 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 0f082f6e6e2..de04556b224 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 88e10af29a3..2d201bf55e9 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 729e93eae23..a6b7a4abf50 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 2860c286d71..58f24755714 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 0958a0a94b5..cf47bd49c7a 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 81bb26cb8fd..3a86a9ef525 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 481009f3076..9fe2b1d88f5 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 49207eb65a0..17bde92263b 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 7e22b4e34c5..2f768c06705 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 62b25f03983..6cb3be08dc2 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index f5864dea4db..0eb2b3ab74b 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index ca040072884..b0ccaa1cfde 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 2420217b890..c53c4c6c7cc 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 22b0023ec6c..0ac74287fde 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 8c95203a4a0..9da9ef0c691 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index b87c965d50b..bb5df66c749 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 1d33cf6750b..4758e0e3715 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 8d44e5b425c..1584a8a7c3a 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 9155768c15c..6acb0bcb12e 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 4f3be9eb242..2afef4a5eb0 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_USE_UBOOTPATH=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 4cc50d35589..46be662037e 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_SOCRATES=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MONITOR_LEN=393216 CONFIG_FIT=y diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 1f1eacdb691..3d0c2192ee1 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -18,11 +18,6 @@ #endif /* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - -/* * Only possible on E500 Version 2 or newer cores. */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 02d49c3d340..c398ece7845 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -95,11 +95,6 @@ #endif #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - /* DDR Setup */ #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index ee25990b034..c05904a813d 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -109,11 +109,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE - #define CFG_SYS_CCSRBAR 0xffe00000 #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 11d84022331..0547ed02563 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -34,11 +34,6 @@ * in the README.mpc85xxads. */ -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - #define CFG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ #undef CFG_SYS_DRAM_TEST /* memory test, takes time */ |