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authorTom Rini <trini@konsulko.com>2024-05-20 10:16:33 -0600
committerTom Rini <trini@konsulko.com>2024-05-20 10:16:33 -0600
commitd4781422d1268aa6deca3e49d2fb227e79c160b4 (patch)
tree420073c8a29a401a3908803000df6f54673e1731 /arch/arm/dts/rk3568-radxa-e25.dts
parent85854bc3324edd0c81047780ee60033d056fd490 (diff)
parenta7f0154c412859323396111dd0c09dbafbc153cb (diff)
downloadu-boot-d4781422d1268aa6deca3e49d2fb227e79c160b4.tar.gz
Merge tag 'v2024.07-rc3' into next
Prepare v2024.07-rc3
Diffstat (limited to 'arch/arm/dts/rk3568-radxa-e25.dts')
-rw-r--r--arch/arm/dts/rk3568-radxa-e25.dts236
1 files changed, 0 insertions, 236 deletions
diff --git a/arch/arm/dts/rk3568-radxa-e25.dts b/arch/arm/dts/rk3568-radxa-e25.dts
deleted file mode 100644
index 72ad74c38a2..00000000000
--- a/arch/arm/dts/rk3568-radxa-e25.dts
+++ /dev/null
@@ -1,236 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-
-/dts-v1/;
-#include "rk3568-radxa-cm3i.dtsi"
-
-/ {
- model = "Radxa E25 Carrier Board";
- compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
-
- aliases {
- mmc1 = &sdmmc0;
- };
-
- pwm-leds {
- compatible = "pwm-leds-multicolor";
-
- multi-led {
- color = <LED_COLOR_ID_RGB>;
- max-brightness = <255>;
-
- led-red {
- color = <LED_COLOR_ID_RED>;
- pwms = <&pwm1 0 1000000 0>;
- };
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- pwms = <&pwm2 0 1000000 0>;
- };
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- pwms = <&pwm12 0 1000000 0>;
- };
- };
- };
-
- vbus_typec: vbus-typec-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vbus_typec_en>;
- regulator-name = "vbus_typec";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- /* actually fed by vcc5v0_sys, dependent
- * on pi6c clock generator
- */
- vcc3v3_minipcie: vcc3v3-minipcie-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&minipcie_enable_h>;
- regulator-name = "vcc3v3_minipcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc3v3_pi6c_05>;
- };
-
- vcc3v3_ngff: vcc3v3-ngff-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&ngffpcie_enable_h>;
- regulator-name = "vcc3v3_ngff";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x1_enable_h>;
- regulator-name = "vcc3v3_pcie30x1";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_enable_h>;
- regulator-name = "vcc3v3_pcie";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy1 {
- phy-supply = <&vcc3v3_pcie30x1>;
-};
-
-&pcie2x1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie20_reset_h>;
- reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pi6c_05>;
- status = "okay";
-};
-
-&pcie30phy {
- data-lanes = <1 2>;
- status = "okay";
-};
-
-&pcie3x1 {
- num-lanes = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x1m0_pins>;
- reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_minipcie>;
- status = "okay";
-};
-
-&pcie3x2 {
- num-lanes = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie30x2_reset_h>;
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pi6c_05>;
- status = "okay";
-};
-
-&pinctrl {
- pcie {
- pcie20_reset_h: pcie20-reset-h {
- rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie30x1_enable_h: pcie30x1-enable-h {
- rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie30x2_reset_h: pcie30x2-reset-h {
- rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie_enable_h: pcie-enable-h {
- rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb {
- minipcie_enable_h: minipcie-enable-h {
- rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- ngffpcie_enable_h: ngffpcie-enable-h {
- rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- vbus_typec_en: vbus_typec_en {
- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&pwm2 {
- status = "okay";
-};
-
-&pwm12 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm12m1_pins>;
- status = "okay";
-};
-
-&sata1 {
- status = "okay";
-};
-
-&sdmmc0 {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- /* Also used in pcie30x1_clkreqnm0 */
- disable-wp;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- status = "okay";
-};
-
-&usb_host1_ehci {
- status = "okay";
-};
-
-&usb_host1_ohci {
- status = "okay";
-};
-
-&usb2phy0_otg {
- phy-supply = <&vbus_typec>;
- status = "okay";
-};
-
-&usb2phy1_host {
- phy-supply = <&vcc3v3_minipcie>;
- status = "okay";
-};
-
-&usb2phy1_otg {
- phy-supply = <&vcc3v3_ngff>;
- status = "okay";
-};