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author | Peter Hoyes <Peter.Hoyes@arm.com> | 2024-05-01 09:16:32 +0100 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2024-05-13 16:51:14 -0600 |
commit | b18a3c183d20812933d192d4b0d622b11ef2bf29 (patch) | |
tree | fb6398fcd79cdbbaad44ba36093d20fcf24c38e7 /arch/arm/mach-exynos | |
parent | e0112bc508b142786b919eb48c2dc8eca9f0361b (diff) | |
download | u-boot-b18a3c183d20812933d192d4b0d622b11ef2bf29.tar.gz |
arm: Move sev() and wfe() definitions to common Arm header file
The sev() and wfe() asm macros are currently defined only for
mach-exynos. As these are common Arm instructions, move them to the
common asm/system.h header file, for both Armv7 and Armv8, so they
can be used by other machines.
wfe may theoretically trigger a context switch if an interrupt occurs
so add a memory barrier to this call.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara<andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/include/mach/system.h | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 5d0bebac573..0aed4c3e2bf 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -36,25 +36,6 @@ struct exynos5_sysreg { #define USB20_PHY_CFG_HOST_LINK_EN (1 << 0) -/* - * This instruction causes an event to be signaled to all cores - * within a multiprocessor system. If SEV is implemented, - * WFE must also be implemented. - */ -#define sev() __asm__ __volatile__ ("sev\n\t" : : ); -/* - * If the Event Register is not set, WFE suspends execution until - * one of the following events occurs: - * - an IRQ interrupt, unless masked by the CPSR I-bit - * - an FIQ interrupt, unless masked by the CPSR F-bit - * - an Imprecise Data abort, unless masked by the CPSR A-bit - * - a Debug Entry request, if Debug is enabled - * - an Event signaled by another processor using the SEV instruction. - * If the Event Register is set, WFE clears it and returns immediately. - * If WFE is implemented, SEV must also be implemented. - */ -#define wfe() __asm__ __volatile__ ("wfe\n\t" : : ); - /* Move 0xd3 value to CPSR register to enable SVC mode */ #define svc32_mode_en() __asm__ __volatile__ \ ("@ I&F disable, Mode: 0x13 - SVC\n\t" \ |