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| author | Ovidiu Panait <ovidiu.panait@windriver.com> | 2021-11-30 18:33:50 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2022-01-05 10:22:02 +0100 |
| commit | b3fe1e8ff394d62b4c80117b8aa3cd82f7c364b1 (patch) | |
| tree | 0084ddcd60ed4feb2a68d31e9ed0784d1cf72a7d /arch | |
| parent | edf0f9b15eeaa6ca3d7bf69fa3163dcfa812d168 (diff) | |
| download | u-boot-b3fe1e8ff394d62b4c80117b8aa3cd82f7c364b1.tar.gz | |
microblaze: spl: add board_boot_order() implementation
Microblaze has three boot modes defined in microblaze/include/asm/spl.h,
but only booting from NOR flash is currently useable. Add a custom
board_boot_order() implementation so that RAM and SPI boot modes can also
be selected if the corresponding load-image support is present.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-3-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/microblaze/cpu/spl.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index 86522f84479..06d4af99b26 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -15,9 +15,11 @@ bool boot_linux; -u32 spl_boot_device(void) +void board_boot_order(u32 *spl_boot_list) { - return BOOT_DEVICE_NOR; + spl_boot_list[0] = BOOT_DEVICE_NOR; + spl_boot_list[1] = BOOT_DEVICE_RAM; + spl_boot_list[2] = BOOT_DEVICE_SPI; } /* Board initialization after bss clearance */ |