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| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2025-01-01 20:19:05 +0100 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2025-01-12 23:49:58 +0100 |
| commit | 2fca3cf79970e6a8bb55bcd73f62a36fda2ffb2e (patch) | |
| tree | 1eabd48bafef6d374009411982d4d5ce569b9e43 /arch | |
| parent | ddb0f26dc45ff2f2528c5e11629c490308ccc708 (diff) | |
| download | u-boot-2fca3cf79970e6a8bb55bcd73f62a36fda2ffb2e.tar.gz | |
arm64: Add MIDR entries for Cortex-A57 and Cortex-A76
Add MIDR entries for Cortex-A57 and Cortex-A76 cores.
Those are used on R-Car Gen3 and Gen4 SoCs respectively.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/armv8/cpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/armv8/cpu.h b/arch/arm/include/asm/armv8/cpu.h index aa1470bb72d..4dbb589aab8 100644 --- a/arch/arm/include/asm/armv8/cpu.h +++ b/arch/arm/include/asm/armv8/cpu.h @@ -5,7 +5,9 @@ #define MIDR_PARTNUM_CORTEX_A35 0xD04 #define MIDR_PARTNUM_CORTEX_A53 0xD03 +#define MIDR_PARTNUM_CORTEX_A57 0xD07 #define MIDR_PARTNUM_CORTEX_A72 0xD08 +#define MIDR_PARTNUM_CORTEX_A76 0xD0B #define MIDR_PARTNUM_SHIFT 0x4 #define MIDR_PARTNUM_MASK (0xFFF << MIDR_PARTNUM_SHIFT) @@ -29,4 +31,6 @@ static inline unsigned int read_midr(void) is_cortex_a(35) is_cortex_a(53) +is_cortex_a(57) is_cortex_a(72) +is_cortex_a(76) |