diff options
| author | Joel Stanley <joel@jms.id.au> | 2021-10-27 14:17:26 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-11-17 17:05:00 -0500 |
| commit | 4080714f5ee9253715ce72ebb4da4a02f4a9b3a0 (patch) | |
| tree | e6a0ed4085985cad925e166389d19ddadb4589fd /arch | |
| parent | 3d99be97f1193c6b08f1498f02f390d4884af3d1 (diff) | |
| download | u-boot-4080714f5ee9253715ce72ebb4da4a02f4a9b3a0.tar.gz | |
clk: ast2600: Add YCLK control for HACE
Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-aspeed/scu_ast2600.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index a205fb1f762..d7b500f6566 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -10,8 +10,9 @@ #define SCU_CLKGATE1_EMMC BIT(27) #define SCU_CLKGATE1_MAC2 BIT(21) #define SCU_CLKGATE1_MAC1 BIT(20) -#define SCU_CLKGATE1_USB_HUB BIT(14) -#define SCU_CLKGATE1_USB_HOST2 BIT(7) +#define SCU_CLKGATE1_USB_HUB BIT(14) +#define SCU_CLKGATE1_HACE BIT(13) +#define SCU_CLKGATE1_USB_HOST2 BIT(7) #define SCU_CLKGATE2_FSI BIT(30) #define SCU_CLKGATE2_MAC4 BIT(21) |