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| author | Tom Rini <trini@konsulko.com> | 2023-05-25 14:27:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-05-25 14:27:39 -0400 |
| commit | 6dcee70692601bd3296c86ac07d0317bf06d2b7b (patch) | |
| tree | a536484ff6a341b65d195b6351d239b506cba867 /board/freescale/imx93_evk/spl.c | |
| parent | 62df7a39442902a71259568c13a4d496d5a514f4 (diff) | |
| parent | ff476897ed698eae1fa439d52b30694a2b40464a (diff) | |
| download | u-boot-6dcee70692601bd3296c86ac07d0317bf06d2b7b.tar.gz | |
Merge tag 'u-boot-imx-20230525' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxWIP/25May2023
u-boot-imx-20230525
-------------------
- i.MX93 series
- Fixes
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
Diffstat (limited to 'board/freescale/imx93_evk/spl.c')
| -rw-r--r-- | board/freescale/imx93_evk/spl.c | 26 |
1 files changed, 20 insertions, 6 deletions
diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c index 1aa2977b409..352ad79cb67 100644 --- a/board/freescale/imx93_evk/spl.c +++ b/board/freescale/imx93_evk/spl.c @@ -67,10 +67,23 @@ int power_init_board(void) /* BUCKxOUT_DVS0/1 control BUCK123 output */ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); - /* 0.9v - */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18); + /* enable DVS control through PMIC_STBY_REQ */ + pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); + + if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) { + /* 0.75v for Low drive mode + */ + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x0c); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x0c); + } else { + /* 0.9v for Over drive mode + */ + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18); + } + + /* set standby voltage to 0.65v */ + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); /* I2C_LT_EN*/ pmic_reg_write(dev, 0xa, 0x3); @@ -103,10 +116,11 @@ void board_init_f(ulong dummy) printf("SOC: 0x%x\n", gd->arch.soc_rev); printf("LC: 0x%x\n", gd->arch.lifecycle); } + power_init_board(); - /* 1.7GHz */ - set_arm_clk(1700000000); + if (!IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) + set_arm_clk(get_cpu_speed_grade_hz()); /* Init power of mix */ soc_power_init(); |