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authorTom Rini <trini@konsulko.com>2024-10-11 12:23:25 -0600
committerTom Rini <trini@konsulko.com>2024-10-11 12:23:25 -0600
commit47e544f576699ca4630e20448db6a05178960697 (patch)
treef31951120512ac41f145dc0fcf6b0bbdfe5b9c01 /drivers/clk/stm32
parent5d899fc58c44fe5623e31524da2205d8597a53d1 (diff)
parent0220a68c25cbfdfa495927f83abf0b1d4ebd823b (diff)
downloadu-boot-WIP/11Oct2024.tar.gz
Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"WIP/11Oct2024
Simon Glass <sjg@chromium.org> says: When the SPL build-phase was first created it was designed to solve a particular problem (the need to init SDRAM so that U-Boot proper could be loaded). It has since expanded to become an important part of U-Boot, with three phases now present: TPL, VPL and SPL Due to this history, the term 'SPL' is used to mean both a particular phase (the one before U-Boot proper) and all the non-proper phases. This has become confusing. For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL' phases, not just SPL. So code which can only be compiled for actual SPL, for example, must use something like this: #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) In Makefiles we have similar issues. SPL_ has been used as a variable which expands to either SPL_ or nothing, to chose between options like CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was updated to support 'VPL_' as well. This series starts a change in terminology and usage to resolve the above issues: - The word 'xPL' is used instead of 'SPL' to mean a non-proper build - A new CONFIG_XPL_BUILD define indicates that the current build is an 'xPL' build - The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now defined for TPL and VPL phases - The existing SPL_ Makefile variable is renamed to SPL_ - The existing SPL_TPL Makefile variable is renamed to PHASE_ It should be noted that xpl_phase() can generally be used instead of the above CONFIGs without a code-space or run-time penalty. This series does not attempt to convert all of U-Boot to use this new terminology but it makes a start. In particular, renaming spl.h and common/spl seems like a bridge too far at this point. The series is fully bisectable. It has also been checked to ensure there are no code-size changes on any commit.
Diffstat (limited to 'drivers/clk/stm32')
-rw-r--r--drivers/clk/stm32/clk-stm32mp1.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c
index 204ac170531..4044edfb768 100644
--- a/drivers/clk/stm32/clk-stm32mp1.c
+++ b/drivers/clk/stm32/clk-stm32mp1.c
@@ -26,7 +26,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_XPL_BUILD)
/* activate clock tree initialization in the driver */
#define STM32MP1_CLOCK_TREE_INIT
#endif
@@ -2279,7 +2279,7 @@ static int stm32mp1_clk_probe(struct udevice *dev)
dev_err(dev, "clock tree initialization failed (%d)\n", result);
#endif
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
#if defined(VERBOSE_DEBUG)
/* display debug information for probe after relocation */
if (gd->flags & GD_FLG_RELOC)
@@ -2314,7 +2314,7 @@ static const struct clk_ops stm32mp1_clk_ops = {
.disable = stm32mp1_clk_disable,
.get_rate = stm32mp1_clk_get_rate,
.set_rate = stm32mp1_clk_set_rate,
-#if IS_ENABLED(CONFIG_CMD_CLK) && !IS_ENABLED(CONFIG_SPL_BUILD)
+#if IS_ENABLED(CONFIG_CMD_CLK) && !IS_ENABLED(CONFIG_XPL_BUILD)
.dump = stm32mp1_clk_dump,
#endif
};