diff options
| author | Tom Rini <trini@konsulko.com> | 2018-01-26 07:46:34 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-26 07:46:34 -0500 |
| commit | 1d12a7c8cd4e58d5c3989bc239d5fa9577079dfd (patch) | |
| tree | 00550f8c91498b648d95c0c1c9f642deb324c4a5 /drivers/net/ag7xxx.c | |
| parent | a3f77c810b1a57853e4d5fee3014ac8cbbd03a9a (diff) | |
| parent | 58c125b9e2b232ce73ed7b24ba7b1ca5ff41c5bd (diff) | |
| download | u-boot-1d12a7c8cd4e58d5c3989bc239d5fa9577079dfd.tar.gz | |
Merge git://git.denx.de/u-boot-spi
Diffstat (limited to 'drivers/net/ag7xxx.c')
| -rw-r--r-- | drivers/net/ag7xxx.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c index 00e6806892a..f28187058e8 100644 --- a/drivers/net/ag7xxx.c +++ b/drivers/net/ag7xxx.c @@ -164,8 +164,8 @@ static int ag7xxx_switch_read(struct mii_dev *bus, int addr, int reg, u16 *val) writel(AG7XXX_ETH_MII_MGMT_CMD_READ, regs + AG7XXX_ETH_MII_MGMT_CMD); - ret = wait_for_bit("ag7xxx", regs + AG7XXX_ETH_MII_MGMT_IND, - AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0); + ret = wait_for_bit_le32(regs + AG7XXX_ETH_MII_MGMT_IND, + AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0); if (ret) return ret; @@ -185,8 +185,8 @@ static int ag7xxx_switch_write(struct mii_dev *bus, int addr, int reg, u16 val) regs + AG7XXX_ETH_MII_MGMT_ADDRESS); writel(val, regs + AG7XXX_ETH_MII_MGMT_CTRL); - ret = wait_for_bit("ag7xxx", regs + AG7XXX_ETH_MII_MGMT_IND, - AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0); + ret = wait_for_bit_le32(regs + AG7XXX_ETH_MII_MGMT_IND, + AG7XXX_ETH_MII_MGMT_IND_BUSY, 0, 1000, 0); return ret; } @@ -510,13 +510,13 @@ static void ag7xxx_eth_stop(struct udevice *dev) /* Stop the TX DMA. */ writel(0, priv->regs + AG7XXX_ETH_DMA_TX_CTRL); - wait_for_bit("ag7xxx", priv->regs + AG7XXX_ETH_DMA_TX_CTRL, ~0, 0, - 1000, 0); + wait_for_bit_le32(priv->regs + AG7XXX_ETH_DMA_TX_CTRL, ~0, 0, + 1000, 0); /* Stop the RX DMA. */ writel(0, priv->regs + AG7XXX_ETH_DMA_RX_CTRL); - wait_for_bit("ag7xxx", priv->regs + AG7XXX_ETH_DMA_RX_CTRL, ~0, 0, - 1000, 0); + wait_for_bit_le32(priv->regs + AG7XXX_ETH_DMA_RX_CTRL, ~0, 0, + 1000, 0); } /* |