nvme: Introduce driver ops

The NVMe storage controller integrated on Apple SoCs deviates
from the NVMe standard in two aspects.  It uses a "linear"
submission queue and it integrates an NVMMU that needs to be
programmed for each NVMe command.  Introduce driver ops such
that we can set up the linear submission queue and program the
NVMMU in the driver for this strange beast.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>

1 files changed, 55 insertions, 0 deletions

diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index 8e9ae3c7f62..bc6b79f8dd1 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -596,6 +596,7 @@ enum {
 
 /* Represents an NVM Express device. Each nvme_dev is a PCI function. */
 struct nvme_dev {
+	struct udevice *udev;
 	struct list_head node;
 	struct nvme_queue **queues;
 	u32 __iomem *dbs;
@@ -622,6 +623,33 @@ struct nvme_dev {
 	u32 nn;
 };
 
+/* Admin queue and a single I/O queue. */
+enum nvme_queue_id {
+	NVME_ADMIN_Q,
+	NVME_IO_Q,
+	NVME_Q_NUM,
+};
+
+/*
+ * An NVM Express queue. Each device has at least two (one for admin
+ * commands and one for I/O commands).
+ */
+struct nvme_queue {
+	struct nvme_dev *dev;
+	struct nvme_command *sq_cmds;
+	struct nvme_completion *cqes;
+	u32 __iomem *q_db;
+	u16 q_depth;
+	s16 cq_vector;
+	u16 sq_head;
+	u16 sq_tail;
+	u16 cq_head;
+	u16 qid;
+	u8 cq_phase;
+	u8 cqe_seen;
+	unsigned long cmdid_data[];
+};
+
 /*
  * An NVM Express namespace is equivalent to a SCSI LUN.
  * Each namespace is operated as an independent "device".
@@ -636,6 +664,33 @@ struct nvme_ns {
 	u8 flbas;
 };
 
+struct nvme_ops {
+	/**
+	 * setup_queue - Controller-specific NVM Express queue setup.
+	 *
+	 * @nvmeq: NVM Express queue
+	 * Return: 0 if OK, -ve on error
+	 */
+	int (*setup_queue)(struct nvme_queue *nvmeq);
+	/**
+	 * submit_cmd - Controller-specific NVM Express command submission.
+	 *
+	 * If this function pointer is set to NULL, normal command
+	 * submission is performed according to the NVM Express spec.
+	 *
+	 * @nvmeq: NVM Express queue
+	 * @cmd:   NVM Express command
+	 */
+	void (*submit_cmd)(struct nvme_queue *nvmeq, struct nvme_command *cmd);
+	/**
+	 * complete_cmd - Controller-specific NVM Express command completion
+	 *
+	 * @nvmeq: NVM Express queue
+	 * @cmd:   NVM Express command
+	 */
+	void (*complete_cmd)(struct nvme_queue *nvmeq, struct nvme_command *cmd);
+};
+
 int nvme_init(struct udevice *udev);
 
 #endif /* __DRIVER_NVME_H__ */