arm: Remove spear600 boards and the rest of SPEAr support

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.  As this is
the last of the SPEAr platforms, so remove the rest of the remaining
support as well.

Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

7 files changed, 0 insertions, 238 deletions

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 8541ba0b0ae..06dfc32fa54 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_RCAR_GPIO)		+= gpio-rcar.o
 obj-$(CONFIG_RZA1_GPIO)		+= gpio-rza1.o
 obj-$(CONFIG_S5P)		+= s5p_gpio.o
 obj-$(CONFIG_SANDBOX_GPIO)	+= sandbox.o
-obj-$(CONFIG_SPEAR_GPIO)	+= spear_gpio.o
 obj-$(CONFIG_TEGRA_GPIO)	+= tegra_gpio.o
 obj-$(CONFIG_TEGRA186_GPIO)	+= tegra186_gpio.o
 obj-$(CONFIG_DA8XX_GPIO)	+= da8xx_gpio.o
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
deleted file mode 100644
index 4e4cd125457..00000000000
--- a/drivers/gpio/spear_gpio.c
+++ /dev/null
@@ -1,89 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012 Stefan Roese <sr@denx.de>
- */
-
-/*
- * Driver for SPEAr600 GPIO controller
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/arch/hardware.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <errno.h>
-
-static int gpio_direction(unsigned gpio,
-			  enum gpio_direction direction)
-{
-	struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
-	u32 val;
-
-	val = readl(&regs->gpiodir);
-
-	if (direction == GPIO_DIRECTION_OUT)
-		val |= 1 << gpio;
-	else
-		val &= ~(1 << gpio);
-
-	writel(val, &regs->gpiodir);
-
-	return 0;
-}
-
-int gpio_set_value(unsigned gpio, int value)
-{
-	struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
-
-	if (value)
-		writel(1 << gpio, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
-	else
-		writel(0, &regs->gpiodata[DATA_REG_ADDR(gpio)]);
-
-	return 0;
-}
-
-int gpio_get_value(unsigned gpio)
-{
-	struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
-	u32 val;
-
-	val = readl(&regs->gpiodata[DATA_REG_ADDR(gpio)]);
-
-	return !!val;
-}
-
-int gpio_request(unsigned gpio, const char *label)
-{
-	if (gpio >= SPEAR_GPIO_COUNT)
-		return -EINVAL;
-
-	return 0;
-}
-
-int gpio_free(unsigned gpio)
-{
-	return 0;
-}
-
-void gpio_toggle_value(unsigned gpio)
-{
-	gpio_set_value(gpio, !gpio_get_value(gpio));
-}
-
-int gpio_direction_input(unsigned gpio)
-{
-	return gpio_direction(gpio, GPIO_DIRECTION_IN);
-}
-
-int gpio_direction_output(unsigned gpio, int value)
-{
-	int ret = gpio_direction(gpio, GPIO_DIRECTION_OUT);
-
-	if (ret < 0)
-		return ret;
-
-	gpio_set_value(gpio, value);
-	return 0;
-}
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index de57ab928af..35d6e2c8ec5 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -136,16 +136,6 @@ config SYS_I2C_DW
 	  controller is used in various SoCs, e.g. the ST SPEAr, Altera
 	  SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
 
-config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
-	bool "DW I2C Enable Status Register not supported"
-	depends on SYS_I2C_DW && \
-		(TARGET_SPEAR600 || TARGET_X600)
-	default y
-	help
-	  Some versions of the Designware I2C controller do not support the
-	  enable status register. This config option can be enabled in such
-	  cases.
-
 config SYS_I2C_ASPEED
 	bool "Aspeed I2C Controller"
 	depends on DM_I2C && ARCH_ASPEED
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 072803691e3..e57eed0f6cd 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -24,16 +24,6 @@
  */
 #define DW_I2C_COMP_TYPE	0x44570140
 
-#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
-static int  dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
-{
-	u32 ena = enable ? IC_ENABLE_0B : 0;
-
-	writel(ena, &i2c_base->ic_enable);
-
-	return 0;
-}
-#else
 static int dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
 {
 	u32 ena = enable ? IC_ENABLE_0B : 0;
@@ -55,7 +45,6 @@ static int dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
 
 	return -ETIMEDOUT;
 }
-#endif
 
 /* High and low times in different speed modes (in ns) */
 enum {
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 1f4c74f0f63..1c24710b2db 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -389,55 +389,6 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 	return 0;
 }
 
-#ifndef CONFIG_SPL_BUILD
-/*
- * fsmc_nand_switch_ecc - switch the ECC operation between different engines
- *
- * @eccstrength		- the number of bits that could be corrected
- *			  (1 - HW, 4 - SW BCH4)
- */
-int fsmc_nand_switch_ecc(uint32_t eccstrength)
-{
-	struct nand_chip *nand;
-	struct mtd_info *mtd;
-	int err;
-
-	/*
-	 * This functions is only called on SPEAr600 platforms, supporting
-	 * 1 bit HW ECC. The BCH8 HW ECC (FSMC_VER8) from the ST-Ericsson
-	 * Nomadik SoC is currently supporting this fsmc_nand_switch_ecc()
-	 * function, as it doesn't need to switch to a different ECC layout.
-	 */
-	mtd = get_nand_dev_by_index(nand_curr_device);
-	nand = mtd_to_nand(mtd);
-
-	/* Setup the ecc configurations again */
-	if (eccstrength == 1) {
-		nand->ecc.mode = NAND_ECC_HW;
-		nand->ecc.bytes = 3;
-		nand->ecc.strength = 1;
-		nand->ecc.layout = &fsmc_ecc1_layout;
-		nand->ecc.calculate = fsmc_read_hwecc;
-		nand->ecc.correct = nand_correct_data;
-	} else if (eccstrength == 4) {
-		/*
-		 * .calculate .correct and .bytes will be set in
-		 * nand_scan_tail()
-		 */
-		nand->ecc.mode = NAND_ECC_SOFT_BCH;
-		nand->ecc.strength = 4;
-		nand->ecc.layout = NULL;
-	} else {
-		printf("Error: ECC strength %d not supported!\n", eccstrength);
-	}
-
-	/* Update NAND handling after ECC mode switch */
-	err = nand_scan_tail(mtd);
-
-	return err;
-}
-#endif /* CONFIG_SPL_BUILD */
-
 int fsmc_nand_init(struct nand_chip *nand)
 {
 	static int chip_nr;
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index a12e8f27025..eb6fe9f6b30 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -36,7 +36,6 @@ obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
 obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
-obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o
diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c
deleted file mode 100644
index 3e87e0c7fd8..00000000000
--- a/drivers/usb/host/ehci-spear.c
+++ /dev/null
@@ -1,77 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2010
- * Armando Visconti, ST Micoelectronics, <armando.visconti@st.com>.
- *
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- */
-
-#include <common.h>
-#include <log.h>
-#include <asm/io.h>
-#include <usb.h>
-#include <linux/delay.h>
-#include "ehci.h"
-#include <asm/arch/hardware.h>
-#include <asm/arch/spr_misc.h>
-
-static void spear6xx_usbh_stop(void)
-{
-	struct misc_regs *const misc_p =
-	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
-	u32 periph1_rst = readl(misc_p->periph1_rst);
-
-	periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
-	writel(periph1_rst, misc_p->periph1_rst);
-
-	udelay(1000);
-	periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
-	writel(periph1_rst, misc_p->periph1_rst);
-}
-
-/*
- * Create the appropriate control structures to manage
- * a new EHCI host controller.
- */
-int ehci_hcd_init(int index, enum usb_init_type init,
-		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
-	u32 ehci = 0;
-
-	switch (index) {
-	case 0:
-		ehci = CONFIG_SYS_UHC0_EHCI_BASE;
-		break;
-	case 1:
-		ehci = CONFIG_SYS_UHC1_EHCI_BASE;
-		break;
-	default:
-		printf("ERROR: wrong controller index!\n");
-		break;
-	};
-
-	*hccr = (struct ehci_hccr *)(ehci + 0x100);
-	*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
-			HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
-
-	debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
-		(uint32_t)*hccr, (uint32_t)*hcor,
-		(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
-
-	return 0;
-}
-
-/*
- * Destroy the appropriate control structures corresponding
- * the the EHCI host controller.
- */
-int ehci_hcd_stop(int index)
-{
-#if defined(CONFIG_SPEAR600)
-	spear6xx_usbh_stop();
-#endif
-
-	return 0;
-}