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| author | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-02-14 20:42:49 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-02-17 19:07:48 +0800 |
| commit | 8900e2bbecd021b16eee7c344cd6ca0e1ee901f3 (patch) | |
| tree | e58677bfd533bfc4d9e95a69603f444ae6d84fae /include/configs/ax25-ae350.h | |
| parent | da24626d147cdd04e84f88c0196a0131fa22cee7 (diff) | |
| download | u-boot-8900e2bbecd021b16eee7c344cd6ca0e1ee901f3.tar.gz | |
riscv: Rename Andes cpu and board names
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'include/configs/ax25-ae350.h')
| -rw-r--r-- | include/configs/ax25-ae350.h | 93 |
1 files changed, 0 insertions, 93 deletions
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h deleted file mode 100644 index b566ecf296f..00000000000 --- a/include/configs/ax25-ae350.h +++ /dev/null @@ -1,93 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation <rick@andestech.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define RISCV_MMODE_TIMERBASE 0xe6000000 -#define RISCV_MMODE_TIMER_FREQ 60000000 - -#define RISCV_SMODE_TIMER_FREQ 60000000 - -/* - * CPU and Board Configuration Options - */ - -/* - * Miscellaneous configurable options - */ - -/* - * Physical Memory Map - */ -#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1 \ - (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ -#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ -#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_0 - -/* - * Serial console configuration - */ -#define CFG_SYS_NS16550_CLK 19660800 - -/* Init Stack Pointer */ - -/* support JEDEC */ -#define PHYS_FLASH_1 0x88000000 /* BANK 0 */ -#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CFG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } - -/* max number of memory banks */ -/* - * There are 4 banks supported for this Controller, - * but we have only 1 bank connected to flash on board -*/ -#define CFG_SYS_FLASH_BANKS_SIZES {0x4000000} - -/* environments */ - -/* SPI FLASH */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 16 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ - -/* Initial Memory map for Linux*/ -#define CFG_SYS_BOOTMAPSZ (64 << 20) -/* Increase max gunzip size */ - -/* Support autoboot from RAM (kernel image is loaded via debug port) */ -#define KERNEL_IMAGE_ADDR "0x2000000 " -#define BOOTENV_DEV_NAME_RAM(devtypeu, devtypel, instance) \ - "ram " -#define BOOTENV_DEV_RAM(devtypeu, devtypel, instance) \ - "bootcmd_ram=" \ - "booti " \ - KERNEL_IMAGE_ADDR \ - "- $fdtcontroladdr\0" - -/* When we use RAM as ENV */ - -/* Enable distro boot */ -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - func(DHCP, dhcp, na) \ - func(RAM, ram, na) -#include <config_distro_bootcmd.h> - -#define CFG_EXTRA_ENV_SETTINGS \ - "kernel_addr_r=0x00080000\0" \ - "pxefile_addr_r=0x01f00000\0" \ - "scriptaddr=0x01f00000\0" \ - "fdt_addr_r=0x02000000\0" \ - "ramdisk_addr_r=0x02800000\0" \ - BOOTENV - -#endif /* __CONFIG_H */ |