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| author | Humberto Naves <hsnaves@gmail.com> | 2022-05-22 21:54:57 -0400 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2022-05-23 21:28:07 +0200 |
| commit | 1b05136a6ca8387175ca7bf1aa66a9c40a153cc2 (patch) | |
| tree | 37e64d0806d036b0098c2625e65836384fc20aa4 /include | |
| parent | c0a1409d21e7b342566dccb9cc1d38209aabc5ff (diff) | |
| download | u-boot-1b05136a6ca8387175ca7bf1aa66a9c40a153cc2.tar.gz | |
arm: socfpga: Add the terasic de10-standard board
Use the de10-nano files as templates for the de10-standard board.
The files in qts directory are generated by quartus from the GHRD
design.
Signed-off-by: Humberto Naves <hsnaves@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_de10_standard.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/configs/socfpga_de10_standard.h b/include/configs/socfpga_de10_standard.h new file mode 100644 index 00000000000..b68b6e99dc7 --- /dev/null +++ b/include/configs/socfpga_de10_standard.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022, Humberto Naves <hsnaves@gmail.com> + * + * Adapted from socfpga_de0_nano_soc.h + */ +#ifndef __CONFIG_TERASIC_DE10_STANDARD_H__ +#define __CONFIG_TERASIC_DE10_STANDARD_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +#endif /* __CONFIG_TERASIC_DE10_STANDARD_H__ */ |