diff options
52 files changed, 162 insertions, 112 deletions
diff --git a/arch/arm/dts/r8a7790-u-boot.dtsi b/arch/arm/dts/r8a7790-u-boot.dtsi index 45e2fa6f9f0..2a7d76bd7b1 100644 --- a/arch/arm/dts/r8a7790-u-boot.dtsi +++ b/arch/arm/dts/r8a7790-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7790 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7790 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a7791-u-boot.dtsi b/arch/arm/dts/r8a7791-u-boot.dtsi index 7143ffc1658..bb0e2fd106c 100644 --- a/arch/arm/dts/r8a7791-u-boot.dtsi +++ b/arch/arm/dts/r8a7791-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7791 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7791 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a7792-u-boot.dtsi b/arch/arm/dts/r8a7792-u-boot.dtsi index 214cfde1f89..ebbdcb7efd5 100644 --- a/arch/arm/dts/r8a7792-u-boot.dtsi +++ b/arch/arm/dts/r8a7792-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7792 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7792 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a7793-u-boot.dtsi b/arch/arm/dts/r8a7793-u-boot.dtsi index fb947462c54..08f2248e1f3 100644 --- a/arch/arm/dts/r8a7793-u-boot.dtsi +++ b/arch/arm/dts/r8a7793-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7793 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7793 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a7794-u-boot.dtsi b/arch/arm/dts/r8a7794-u-boot.dtsi index 53b54c88917..303afaeb4ce 100644 --- a/arch/arm/dts/r8a7794-u-boot.dtsi +++ b/arch/arm/dts/r8a7794-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7794 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7794 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77951-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi index 4cbec591479..c16c5116592 100644 --- a/arch/arm/dts/r8a77951-u-boot.dtsi +++ b/arch/arm/dts/r8a77951-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7795 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7795 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi index 15a91474324..2245be2aa76 100644 --- a/arch/arm/dts/r8a77960-u-boot.dtsi +++ b/arch/arm/dts/r8a77960-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A7796 SoC + * Device Tree Source extras for U-Boot on R-Car R8A7796 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index 54107d1ae35..f39acc237d3 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A77965 SoC + * Device Tree Source extras for U-Boot on R-Car R8A77965 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi index d252c2e8e6c..7900c641ba1 100644 --- a/arch/arm/dts/r8a77970-u-boot.dtsi +++ b/arch/arm/dts/r8a77970-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A77970 SoC + * Device Tree Source extras for U-Boot on R-Car R8A77970 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi index 9f7bf499bc0..aa7e058c585 100644 --- a/arch/arm/dts/r8a77980-u-boot.dtsi +++ b/arch/arm/dts/r8a77980-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A77980 SoC + * Device Tree Source extras for U-Boot on R-Car R8A77980 SoC * * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi index 50bbbe18647..b701f68db81 100644 --- a/arch/arm/dts/r8a77990-u-boot.dtsi +++ b/arch/arm/dts/r8a77990-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A77990 SoC + * Device Tree Source extras for U-Boot on R-Car R8A77990 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a77995-u-boot.dtsi b/arch/arm/dts/r8a77995-u-boot.dtsi index 347b59ac42c..f4bafb6d088 100644 --- a/arch/arm/dts/r8a77995-u-boot.dtsi +++ b/arch/arm/dts/r8a77995-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar R8A77995 SoC + * Device Tree Source extras for U-Boot on R-Car R8A77995 SoC * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/dts/r8a779x-u-boot.dtsi b/arch/arm/dts/r8a779x-u-boot.dtsi index 001ac59adb9..d1441f1f9df 100644 --- a/arch/arm/dts/r8a779x-u-boot.dtsi +++ b/arch/arm/dts/r8a779x-u-boot.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source extras for U-Boot on RCar Gen3 + * Device Tree Source extras for U-Boot on R-Car Gen3 * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/arch/arm/mach-renesas/Kconfig.32 b/arch/arm/mach-renesas/Kconfig.32 index 693a5abba0d..bbc61ccf480 100644 --- a/arch/arm/mach-renesas/Kconfig.32 +++ b/arch/arm/mach-renesas/Kconfig.32 @@ -1,11 +1,11 @@ if RCAR_32 config ARCH_RENESAS_BOARD_STRING - string "Renesas RCar Gen2 board name" + string "Renesas R-Car Gen2 board name" default "Board" config RCAR_GEN2 - bool "Renesas RCar Gen2" + bool "Renesas R-Car Gen2" select PHY select PHY_RCAR_GEN2 select TMU_TIMER diff --git a/arch/arm/mach-renesas/include/mach/boot0.h b/arch/arm/mach-renesas/include/mach/boot0.h index fe88a2e0373..2128eccd8a4 100644 --- a/arch/arm/mach-renesas/include/mach/boot0.h +++ b/arch/arm/mach-renesas/include/mach/boot0.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Specialty padding for the RCar Gen2 SPL JTAG loading + * Specialty padding for the R-Car Gen2 SPL JTAG loading */ #ifndef __BOOT0_H diff --git a/arch/arm/mach-renesas/memmap-gen3.c b/arch/arm/mach-renesas/memmap-gen3.c index c50700df078..d24419f5daa 100644 --- a/arch/arm/mach-renesas/memmap-gen3.c +++ b/arch/arm/mach-renesas/memmap-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 memory map tables + * Renesas R-Car Gen3 memory map tables * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 9122f33d88d..18be244aa79 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -68,6 +68,19 @@ struct msg_get_clock_rate { u32 end_tag; }; +struct efi_fw_image fw_images[] = { + { + .fw_name = u"RPI_UBOOT", + .image_index = 1, + }, +}; + +struct efi_capsule_update_info update_info = { + .dfu_string = "mmc 0=u-boot.bin fat 0 1", + .num_images = ARRAY_SIZE(fw_images), + .images = fw_images, +}; + #ifdef CONFIG_ARM64 #define DTB_DIR "broadcom/" #else @@ -545,12 +558,15 @@ void update_fdt_from_fw(void *fdt, void *fw_fdt) if (fdt == fw_fdt) return; - /* The firmware provides a more precie model; so copy that */ + /* The firmware provides a more precise model; so copy that */ copy_property(fdt, fw_fdt, "/", "model"); /* memory reserve as suggested by the firmware */ copy_property(fdt, fw_fdt, "/", "memreserve"); + /* copy the CMA memory setting from the firmware DT to linux */ + copy_property(fdt, fw_fdt, "/reserved-memory/linux,cma", "size"); + /* Adjust dma-ranges for the SD card and PCI bus as they can depend on * the SoC revision */ diff --git a/boot/image-fdt.c b/boot/image-fdt.c index 3d5b6f9e2dc..73c43c30684 100644 --- a/boot/image-fdt.c +++ b/boot/image-fdt.c @@ -77,7 +77,7 @@ static void boot_fdt_reserve_region(u64 addr, u64 size, enum lmb_flags flags) debug(" reserving fdt memory region: addr=%llx size=%llx flags=%x\n", (unsigned long long)addr, (unsigned long long)size, flags); - } else { + } else if (ret != -EEXIST) { puts("ERROR: reserving fdt memory region failed "); printf("(addr=%llx size=%llx flags=%x)\n", (unsigned long long)addr, diff --git a/configs/am62x_a53_usbdfu.config b/configs/am62x_a53_usbdfu.config index 3a19cf23287..0d3c6df1e73 100644 --- a/configs/am62x_a53_usbdfu.config +++ b/configs/am62x_a53_usbdfu.config @@ -16,7 +16,6 @@ CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_SPL_USB_DWC3_GENERIC=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index 3c8f8fc1bb7..a6a8431c8ff 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -19,14 +19,19 @@ CONFIG_SYS_PBSIZE=1049 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_FS_UUID=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_DFU_MMC=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x200000 CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y @@ -49,3 +54,6 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y +# CONFIG_HEXDUMP is not set +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 9853c448809..358096f3d1c 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -19,14 +19,19 @@ CONFIG_SYS_PBSIZE=1049 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_FS_UUID=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_DFU_MMC=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x200000 CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y @@ -49,3 +54,6 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y +# CONFIG_HEXDUMP is not set +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index f5fb322aa8f..17b6688e75c 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -20,11 +20,13 @@ CONFIG_SYS_PBSIZE=1049 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_FS_UUID=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -65,3 +67,6 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y +# CONFIG_HEXDUMP is not set +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 02f942cf344..a8723ea24e1 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -18,15 +18,20 @@ CONFIG_SYS_PBSIZE=1049 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_FS_UUID=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y CONFIG_DM_DMA=y +CONFIG_DFU_MMC=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x200000 CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y @@ -56,3 +61,6 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y +# CONFIG_HEXDUMP is not set +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index a093027eb0e..12966d02a22 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -5,20 +5,20 @@ config CLK_RENESAS Enable support for clock present on Renesas SoCs. config CLK_RCAR - bool "Renesas RCar clock driver support" + bool "Renesas R-Car clock driver support" help - Enable common code for clocks on Renesas RCar SoCs. + Enable common code for clocks on Renesas R-Car SoCs. config CLK_RCAR_CPG_LIB bool "CPG/MSSR library functions" config CLK_RCAR_GEN2 - bool "Renesas RCar Gen2 clock driver" + bool "Renesas R-Car Gen2 clock driver" def_bool y if RCAR_32 depends on CLK_RENESAS select CLK_RCAR help - Enable this to support the clocks on Renesas RCar Gen2 SoC. + Enable this to support the clocks on Renesas R-Car Gen2 SoC. config CLK_R8A7790 bool "Renesas R8A7790 clock driver" @@ -51,14 +51,14 @@ config CLK_R8A7794 Enable this to support the clocks on Renesas R8A7794 SoC. config CLK_RCAR_GEN3 - bool "Renesas RCar Gen3 and Gen4 clock driver" + bool "Renesas R-Car Gen3 and Gen4 clock driver" def_bool y if RCAR_64 depends on CLK_RENESAS select CLK_RCAR select CLK_RCAR_CPG_LIB select DM_RESET help - Enable this to support the clocks on Renesas RCar Gen3 and Gen4 SoCs. + Enable this to support the clocks on Renesas R-Car Gen3 and Gen4 SoCs. config CLK_R8A774A1 bool "Renesas R8A774A1 clock driver" diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 89f2d966746..9b6fce4675c 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen2 CPG MSSR driver + * Renesas R-Car Gen2 CPG MSSR driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index aa38c0f7dd0..375cc4a4930 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/rcar-cpg-lib.c b/drivers/clk/renesas/rcar-cpg-lib.c index 8862fbc7579..ea33bfd3239 100644 --- a/drivers/clk/renesas/rcar-cpg-lib.c +++ b/drivers/clk/renesas/rcar-cpg-lib.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index 35bad7f5f73..39ff4541c1e 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h index 71e409f3eb0..d5db14baf06 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.h +++ b/drivers/clk/renesas/renesas-cpg-mssr.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Renesas RCar Gen3 CPG MSSR driver + * Renesas R-Car Gen3 CPG MSSR driver * * Copyright (C) 2017-2018 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 92a8597420a..f4a453e1cdd 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -358,10 +358,10 @@ config PCF8575_GPIO chips are from NXP and TI. config RCAR_GPIO - bool "Renesas RCar GPIO driver" + bool "Renesas R-Car GPIO driver" depends on DM_GPIO && ARCH_RENESAS help - This driver supports the GPIO banks on Renesas RCar SoCs. + This driver supports the GPIO banks on Renesas R-Car SoCs. config RZA1_GPIO bool "Renesas RZ/A1 GPIO driver" diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 52067fa7c1f..cdae6825736 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -504,16 +504,16 @@ config SYS_I2C_OMAP24XX Add support for the OMAP2+ I2C driver. config SYS_I2C_RCAR_I2C - bool "Renesas RCar I2C driver" + bool "Renesas R-Car I2C driver" depends on (RCAR_GEN2 || RCAR_64) && DM_I2C help - Support for Renesas RCar I2C controller. + Support for Renesas R-Car I2C controller. config SYS_I2C_RCAR_IIC - bool "Renesas RCar Gen3 IIC driver" + bool "Renesas R-Car Gen3 IIC driver" depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C help - Support for Renesas RCar Gen3 IIC controller. + Support for Renesas R-Car Gen3 IIC controller. config SYS_I2C_ROCKCHIP bool "Rockchip I2C driver" diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c index 2aa0f5fbfae..e019d06be41 100644 --- a/drivers/i2c/rcar_iic.c +++ b/drivers/i2c/rcar_iic.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar IIC driver + * Renesas R-Car IIC driver * * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 92afa6adcda..556f07eaf8f 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -571,7 +571,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) int i, ret = 0, sret; u32 caps, reg; - /* Only supported on Renesas RCar */ + /* Only supported on Renesas R-Car */ if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS)) return -EINVAL; diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index f489fb70766..657aba75148 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -64,7 +64,7 @@ #define TMIO_SD_CLKCTL_DIV4 BIT(0) /* SDCLK = CLK / 4 */ #define TMIO_SD_CLKCTL_DIV2 0 /* SDCLK = CLK / 2 */ #define TMIO_SD_CLKCTL_DIV1 BIT(10) /* SDCLK = CLK */ -#define TMIO_SD_CLKCTL_RCAR_DIV1 0xff /* SDCLK = CLK (RCar ver.) */ +#define TMIO_SD_CLKCTL_RCAR_DIV1 0xff /* SDCLK = CLK (R-Car ver.) */ #define TMIO_SD_CLKCTL_OFFEN BIT(9) /* stop SDCLK when unused */ #define TMIO_SD_CLKCTL_SCLKEN BIT(8) /* SDCLK output enable */ #define TMIO_SD_SIZE 0x04c /* block size */ @@ -90,7 +90,7 @@ #define TMIO_SD_VOLT_180 (2 << 0)/* 1.8V signal */ #define TMIO_SD_DMA_MODE 0x410 #define TMIO_SD_DMA_MODE_DIR_RD BIT(16) /* 1: from device, 0: to dev */ -#define TMIO_SD_DMA_MODE_BUS_WIDTH (BIT(5) | BIT(4)) /* RCar, 64bit */ +#define TMIO_SD_DMA_MODE_BUS_WIDTH (BIT(5) | BIT(4)) /* R-Car, 64bit */ #define TMIO_SD_DMA_MODE_ADDR_INC BIT(0) /* 1: address inc, 0: fixed */ #define TMIO_SD_DMA_CTL 0x414 #define TMIO_SD_DMA_CTL_START BIT(0) /* start DMA (auto cleared) */ @@ -128,9 +128,9 @@ struct tmio_sd_priv { #define TMIO_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */ #define TMIO_SD_CAP_64BIT BIT(3) /* Controller is 64bit */ #define TMIO_SD_CAP_16BIT BIT(4) /* Controller is 16bit */ -#define TMIO_SD_CAP_RCAR_GEN2 BIT(5) /* Renesas RCar version of IP */ -#define TMIO_SD_CAP_RCAR_GEN3 BIT(6) /* Renesas RCar version of IP */ -#define TMIO_SD_CAP_RCAR_UHS BIT(7) /* Renesas RCar UHS/SDR modes */ +#define TMIO_SD_CAP_RCAR_GEN2 BIT(5) /* Renesas R-Car version of IP */ +#define TMIO_SD_CAP_RCAR_GEN3 BIT(6) /* Renesas R-Car version of IP */ +#define TMIO_SD_CAP_RCAR_UHS BIT(7) /* Renesas R-Car UHS/SDR modes */ #define TMIO_SD_CAP_RCAR \ (TMIO_SD_CAP_RCAR_GEN2 | TMIO_SD_CAP_RCAR_GEN3) struct udevice *vqmmc_dev; diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 3764e2567c1..e7ce8b9577b 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -194,11 +194,11 @@ config ALTERA_QSPI "Embedded Peripherals IP User Guide" of Altera. config RENESAS_RPC_HF - bool "Renesas RCar Gen3 RPC HyperFlash driver" + bool "Renesas R-Car Gen3 RPC HyperFlash driver" depends on RCAR_GEN3 && DM_MTD help This enables access to HyperFlash memory through the Renesas - RCar Gen3 RPC controller. + R-Car Gen3 RPC controller. config HBMC_AM654 bool "HyperBus controller driver for AM65x SoC" diff --git a/drivers/mtd/renesas_rpc_hf.c b/drivers/mtd/renesas_rpc_hf.c index 03545822b07..50a6191d9c2 100644 --- a/drivers/mtd/renesas_rpc_hf.c +++ b/drivers/mtd/renesas_rpc_hf.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen3 RPC HyperFlash driver + * Renesas R-Car Gen3 RPC HyperFlash driver * * Copyright (C) 2016 Renesas Electronics Corporation * Copyright (C) 2016 Cogent Embedded, Inc. diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 876a5fa57ee..41901433e8c 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -189,19 +189,19 @@ config PCI_MSC01 depends on TARGET_MALTA config PCI_RCAR_GEN2 - bool "Renesas RCar Gen2 PCIe driver" + bool "Renesas R-Car Gen2 PCIe driver" depends on RCAR_32 help Say Y here if you want to enable PCIe controller support on - Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is + Renesas R-Car Gen2 SoCs. The PCIe controller on R-Car Gen2 is also used to access EHCI USB controller on the SoC. config PCI_RCAR_GEN3 - bool "Renesas RCar Gen3 PCIe driver" + bool "Renesas R-Car Gen3 PCIe driver" depends on RCAR_GEN3 help Say Y here if you want to enable PCIe controller support on - Renesas RCar Gen3 SoCs. + Renesas R-Car Gen3 SoCs. config PCI_SANDBOX bool "Sandbox PCI support" diff --git a/drivers/pci/pci-rcar-gen2.c b/drivers/pci/pci-rcar-gen2.c index 12c31e74087..08d5c4fbb8b 100644 --- a/drivers/pci/pci-rcar-gen2.c +++ b/drivers/pci/pci-rcar-gen2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen2 PCIEC driver + * Renesas R-Car Gen2 PCIEC driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 76878246f1e..d4b4037ce19 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen3 PCIEC driver + * Renesas R-Car Gen3 PCIEC driver * * Copyright (C) 2018-2019 Marek Vasut <marek.vasut@gmail.com> * diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c index f9428c7ad12..be736629d51 100644 --- a/drivers/phy/phy-rcar-gen2.c +++ b/drivers/phy/phy-rcar-gen2.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen2 USB PHY driver + * Renesas R-Car Gen2 USB PHY driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c index b278f995f37..8c004eaf4c6 100644 --- a/drivers/phy/phy-rcar-gen3.c +++ b/drivers/phy/phy-rcar-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Renesas RCar Gen3 USB PHY driver + * Renesas R-Car Gen3 USB PHY driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index 57e88604aa2..a209193b332 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -12,34 +12,34 @@ config PINCTRL_PFC available multiplex function. config PINCTRL_PFC_R8A7790 - bool "Renesas RCar Gen2 R8A7790 pin control driver" + bool "Renesas R-Car Gen2 R8A7790 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7790 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7790 SoCs. config PINCTRL_PFC_R8A7791 - bool "Renesas RCar Gen2 R8A7791 pin control driver" + bool "Renesas R-Car Gen2 R8A7791 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7791 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7791 SoCs. config PINCTRL_PFC_R8A7792 - bool "Renesas RCar Gen2 R8A7792 pin control driver" + bool "Renesas R-Car Gen2 R8A7792 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7792 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7792 SoCs. config PINCTRL_PFC_R8A7793 - bool "Renesas RCar Gen2 R8A7793 pin control driver" + bool "Renesas R-Car Gen2 R8A7793 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7793 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7793 SoCs. config PINCTRL_PFC_R8A7794 - bool "Renesas RCar Gen2 R8A7794 pin control driver" + bool "Renesas R-Car Gen2 R8A7794 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen2 R8A7794 SoCs. + Support pin multiplexing control on Renesas R-Car Gen2 R8A7794 SoCs. config PINCTRL_PFC_R8A774A1 bool "Renesas RZ/G2 R8A774A1 pin control driver" @@ -66,76 +66,76 @@ config PINCTRL_PFC_R8A774E1 Support pin multiplexing control on Renesas RZ/G2H R8A774E1 SoCs. config PINCTRL_PFC_R8A77951 - bool "Renesas RCar Gen3 R8A7795 pin control driver" + bool "Renesas R-Car Gen3 R8A7795 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A7795 SoCs. config PINCTRL_PFC_R8A77960 - bool "Renesas RCar Gen3 R8A77960 pin control driver" + bool "Renesas R-Car Gen3 R8A77960 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77960 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77960 SoCs. config PINCTRL_PFC_R8A77961 - bool "Renesas RCar Gen3 R8A77961 pin control driver" + bool "Renesas R-Car Gen3 R8A77961 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77961 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77961 SoCs. config PINCTRL_PFC_R8A77965 - bool "Renesas RCar Gen3 R8A77965 pin control driver" + bool "Renesas R-Car Gen3 R8A77965 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77965 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77965 SoCs. config PINCTRL_PFC_R8A77970 - bool "Renesas RCar Gen3 R8A77970 pin control driver" + bool "Renesas R-Car Gen3 R8A77970 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77970 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77970 SoCs. config PINCTRL_PFC_R8A77980 - bool "Renesas RCar Gen3 R8A77980 pin control driver" + bool "Renesas R-Car Gen3 R8A77980 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77980 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77980 SoCs. config PINCTRL_PFC_R8A77990 - bool "Renesas RCar Gen3 R8A77990 pin control driver" + bool "Renesas R-Car Gen3 R8A77990 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77990 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77990 SoCs. config PINCTRL_PFC_R8A77995 - bool "Renesas RCar Gen3 R8A77995 pin control driver" + bool "Renesas R-Car Gen3 R8A77995 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A77995 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A77995 SoCs. config PINCTRL_PFC_R8A779A0 - bool "Renesas RCar Gen3 R8A779A0 pin control driver" + bool "Renesas R-Car Gen3 R8A779A0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen3 R8A779A0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen3 R8A779A0 SoCs. config PINCTRL_PFC_R8A779F0 - bool "Renesas RCar Gen4 R8A779F0 pin control driver" + bool "Renesas R-Car Gen4 R8A779F0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen4 R8A779F0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen4 R8A779F0 SoCs. config PINCTRL_PFC_R8A779G0 - bool "Renesas RCar Gen4 R8A779G0 pin control driver" + bool "Renesas R-Car Gen4 R8A779G0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen4 R8A779G0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen4 R8A779G0 SoCs. config PINCTRL_PFC_R8A779H0 - bool "Renesas RCar Gen4 R8A779H0 pin control driver" + bool "Renesas R-Car Gen4 R8A779H0 pin control driver" depends on PINCTRL_PFC help - Support pin multiplexing control on Renesas RCar Gen4 R8A779H0 SoCs. + Support pin multiplexing control on Renesas R-Car Gen4 R8A779H0 SoCs. config PINCTRL_RZA1 bool "Renesas RZ/A1 R7S72100 pin control driver" diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b27ad9a77e..c4f4a8d78df 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -920,7 +920,7 @@ config SCIF_CONSOLE depends on SH || ARCH_RENESAS help Select this to enable Renesas SCIF UART. To operate serial ports - on systems with RCar or SH SoCs, say Y to this option. If unsure, + on systems with R-Car or SH SoCs, say Y to this option. If unsure, say N. choice diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index fd5cb3694f6..96ea033082b 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -420,7 +420,7 @@ config RENESAS_RPC_SPI imply SPI_FLASH_SFDP_SUPPORT help Enable the Renesas RPC SPI driver, used to access SPI NOR flash - on Renesas RCar Gen3 SoCs. This uses driver model and requires a + on Renesas R-Car Gen3 SoCs. This uses driver model and requires a device tree binding to operate. config ROCKCHIP_SFC diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c index f1e6f9f4e01..7103d786c7e 100644 --- a/drivers/spi/renesas_rpc_spi.c +++ b/drivers/spi/renesas_rpc_spi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Renesas RCar Gen3 RPC QSPI driver + * Renesas R-Car Gen3 RPC QSPI driver * * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 010084ef7f3..c815764c2bc 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -115,10 +115,10 @@ config USB_GADGET_DWC2_OTG USB_GADGET to be enabled. config USB_RENESAS_USBHS - bool "Renesas RCar USB2.0 HS controller (gadget mode)" + bool "Renesas R-Car USB2.0 HS controller (gadget mode)" select USB_GADGET_DUALSPEED help - The Renesas Rcar USB 2.0 high-speed gadget controller + The Renesas R-Car USB 2.0 high-speed gadget controller integrated into Salvator and Kingfisher boards. Select this option if you want the driver to operate in Peripheral mode. This option requires USB_GADGET to be enabled. diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index bb5893d56db..24786a2bc91 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -103,12 +103,12 @@ config USB_XHCI_PCI Enables support for the PCI-based xHCI controller. config USB_XHCI_RCAR - bool "Renesas RCar USB 3.0 support" + bool "Renesas R-Car USB 3.0 support" default y depends on ARCH_RENESAS help Choose this option to add support for USB 3.0 driver on Renesas - RCar Gen3 SoCs. + R-Car Gen3 SoCs. config USB_XHCI_STI bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller" diff --git a/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h index 8db88f0dcfa..7c909b4697a 100644 --- a/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h +++ b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h @@ -1,5 +1,5 @@ /* - * Renesas RCar xHCI controller firmware version 3 + * Renesas R-Car xHCI controller firmware version 3 * * Copyright (c) 2014, Renesas Electronics Corporation * All rights reserved. diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index 38c5928faed..b72807053c4 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> * - * Renesas RCar USB HOST xHCI Controller + * Renesas R-Car USB HOST xHCI Controller */ #include <clk.h> diff --git a/drivers/video/zynqmp/zynqmp_dpsub.c b/drivers/video/zynqmp/zynqmp_dpsub.c index 76abfeac443..52af23c3c83 100644 --- a/drivers/video/zynqmp/zynqmp_dpsub.c +++ b/drivers/video/zynqmp/zynqmp_dpsub.c @@ -11,6 +11,7 @@ #include <dm.h> #include <errno.h> #include <generic-phy.h> +#include <reset.h> #include <stdlib.h> #include <video.h> #include <wait_bit.h> @@ -2093,10 +2094,15 @@ static int zynqmp_dpsub_probe(struct udevice *dev) { struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct zynqmp_dpsub_priv *priv = dev_get_priv(dev); + struct reset_ctl_bulk resets; struct clk clk; int ret; int mode = RGBA8888; + ret = reset_get_bulk(dev, &resets); + if (!ret) + reset_deassert_bulk(&resets); + ret = clk_get_by_name(dev, "dp_apb_clk", &clk); if (ret < 0) { dev_err(dev, "failed to get clock\n"); diff --git a/lib/lmb.c b/lib/lmb.c index b03237bc06c..a695edf70df 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -183,8 +183,10 @@ static long lmb_resize_regions(struct alist *lmb_rgn_lst, * the function might resize an already existing region or coalesce two * adjacent regions. * - * - * Returns: 0 if the region addition successful, -1 on failure + * Return: + * * %0 - Added successfully, or it's already added (only if LMB_NONE) + * * %-EEXIST - The region is already added, and flags != LMB_NONE + * * %-1 - Failure */ static long lmb_add_region_flags(struct alist *lmb_rgn_lst, phys_addr_t base, phys_size_t size, enum lmb_flags flags) @@ -217,17 +219,15 @@ static long lmb_add_region_flags(struct alist *lmb_rgn_lst, phys_addr_t base, coalesced++; break; } else if (lmb_addrs_overlap(base, size, rgnbase, rgnsize)) { - if (flags == LMB_NONE) { - ret = lmb_resize_regions(lmb_rgn_lst, i, base, - size); - if (ret < 0) - return -1; + if (flags != LMB_NONE) + return -EEXIST; - coalesced++; - break; - } else { + ret = lmb_resize_regions(lmb_rgn_lst, i, base, size); + if (ret < 0) return -1; - } + + coalesced++; + break; } } @@ -667,7 +667,7 @@ long lmb_add(phys_addr_t base, phys_size_t size) * * Free up a region of memory. * - * Return: 0 if successful, -1 on failure + * Return: 0 if successful, negative error code on failure */ long lmb_free_flags(phys_addr_t base, phys_size_t size, uint flags) @@ -818,7 +818,7 @@ static phys_addr_t _lmb_alloc_addr(phys_addr_t base, phys_size_t size, lmb_memory[rgn].size, base + size - 1, 1)) { /* ok, reserve the memory */ - if (lmb_reserve_flags(base, size, flags) >= 0) + if (!lmb_reserve_flags(base, size, flags)) return base; } } diff --git a/test/lib/lmb.c b/test/lib/lmb.c index 0bd29e2a4fe..48c3c966f8f 100644 --- a/test/lib/lmb.c +++ b/test/lib/lmb.c @@ -754,7 +754,7 @@ static int lib_test_lmb_flags(struct unit_test_state *uts) /* reserve again, same flag */ ret = lmb_reserve_flags(0x40010000, 0x10000, LMB_NOMAP); - ut_asserteq(ret, -1L); + ut_asserteq(ret, -EEXIST); ASSERT_LMB(mem_lst, used_lst, ram, ram_size, 1, 0x40010000, 0x10000, 0, 0, 0, 0); |