aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/dts/ast2600.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/dts/ast2600.dtsi')
-rw-r--r--arch/arm/dts/ast2600.dtsi113
1 files changed, 80 insertions, 33 deletions
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 64074309b7b..ac8cd4d67d8 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -416,60 +416,51 @@
status = "disabled";
};
- sdhci: sdhci@1e740000 {
- #interrupt-cells = <1>;
- compatible = "aspeed,aspeed-sdhci-irq", "simple-mfd";
- reg = <0x1e740000 0x1000>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- clocks = <&scu ASPEED_CLK_GATE_SDCLK>,
- <&scu ASPEED_CLK_GATE_SDEXTCLK>;
- clock-names = "ctrlclk", "extclk";
+ sdc: sdc@1e740000 {
+ compatible = "aspeed,ast2600-sd-controller";
+ reg = <0x1e740000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0x1e740000 0x1000>;
+ ranges = <0 0x1e740000 0x10000>;
+ clocks = <&scu ASPEED_CLK_GATE_SDCLK>;
+ status = "disabled";
- sdhci_slot0: sdhci_slot0@100 {
- compatible = "aspeed,sdhci-ast2600";
+ sdhci0: sdhci@1e740100 {
+ compatible = "aspeed,ast2600-sdhci", "sdhci";
reg = <0x100 0x100>;
- interrupts = <0>;
- interrupt-parent = <&sdhci>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
sdhci,auto-cmd12;
clocks = <&scu ASPEED_CLK_SDIO>;
status = "disabled";
};
- sdhci_slot1: sdhci_slot1@200 {
- compatible = "aspeed,sdhci-ast2600";
+ sdhci1: sdhci@1e740200 {
+ compatible = "aspeed,ast2600-sdhci", "sdhci";
reg = <0x200 0x100>;
- interrupts = <1>;
- interrupt-parent = <&sdhci>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
sdhci,auto-cmd12;
clocks = <&scu ASPEED_CLK_SDIO>;
status = "disabled";
};
};
- emmc: emmc@1e750000 {
- #interrupt-cells = <1>;
- compatible = "aspeed,aspeed-emmc-irq", "simple-mfd";
- reg = <0x1e750000 0x1000>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>,
- <&scu ASPEED_CLK_GATE_EMMCEXTCLK>;
- clock-names = "ctrlclk", "extclk";
+ emmc_controller: sdc@1e750000 {
+ compatible = "aspeed,ast2600-sd-controller";
+ reg = <0x1e750000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0x1e750000 0x1000>;
+ ranges = <0 0x1e750000 0x10000>;
+ clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>;
+ status = "disabled";
- emmc_slot0: emmc_slot0@100 {
- compatible = "aspeed,emmc-ast2600";
+ emmc: sdhci@1e750100 {
+ compatible = "aspeed,ast2600-sdhci";
reg = <0x100 0x100>;
- interrupts = <0>;
- interrupt-parent = <&emmc>;
+ sdhci,auto-cmd12;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_EMMC>;
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_emmc_default>;
};
};
@@ -832,7 +823,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
status = "disabled";
};
@@ -845,7 +839,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_default>;
status = "disabled";
};
@@ -858,7 +855,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_default>;
+ status = "disabled";
};
i2c3: i2c@200 {
@@ -870,7 +871,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4_default>;
+ status = "disabled";
};
i2c4: i2c@280 {
@@ -882,7 +887,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c5_default>;
+ status = "disabled";
};
i2c5: i2c@300 {
@@ -894,7 +903,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c6_default>;
+ status = "disabled";
};
i2c6: i2c@380 {
@@ -906,7 +919,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c7_default>;
+ status = "disabled";
};
i2c7: i2c@400 {
@@ -918,7 +935,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c8_default>;
+ status = "disabled";
};
i2c8: i2c@480 {
@@ -930,7 +951,11 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c9_default>;
+ status = "disabled";
};
i2c9: i2c@500 {
@@ -942,7 +967,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c10_default>;
status = "disabled";
};
@@ -955,7 +983,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c11_default>;
status = "disabled";
};
@@ -968,7 +999,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c12_default>;
status = "disabled";
};
@@ -981,7 +1015,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c13_default>;
status = "disabled";
};
@@ -994,7 +1031,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c14_default>;
status = "disabled";
};
@@ -1007,7 +1047,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c15_default>;
status = "disabled";
};
@@ -1020,7 +1063,10 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c16_default>;
status = "disabled";
};
@@ -1246,6 +1292,7 @@
function = "I2C1";
groups = "I2C1";
};
+
pinctrl_i2c2_default: i2c2_default {
function = "I2C2";
groups = "I2C2";
generated by cgit (git 2.34.1) at 2025-03-03 22:04:52 +0000