diff options
Diffstat (limited to 'arch/arm')
648 files changed, 864 insertions, 4081 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 39ad03acd2e..38fc757c1f0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1853,9 +1853,6 @@ config TARGET_LS1046AFRWY development platform that supports the QorIQ LS1046A Layerscape Architecture processor. -config ARCH_SC5XX - bool "Analog Devices SC5XX-processor family" - config TARGET_SL28 bool "Support sl28" select ARCH_LS1028A @@ -2289,8 +2286,6 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" -source "arch/arm/mach-sc5xx/Kconfig" - source "arch/arm/mach-snapdragon/Kconfig" source "arch/arm/mach-socfpga/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 734c6d69926..a4266a3e366 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -78,7 +78,6 @@ machine-$(CONFIG_ARCH_OWL) += owl machine-$(CONFIG_ARCH_RENESAS) += renesas machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx -machine-$(CONFIG_ARCH_SC5XX) += sc5xx machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_STM32) += stm32 diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c index 01d2e1a125d..1e16b89d006 100644 --- a/arch/arm/cpu/arm11/cpu.c +++ b/arch/arm/cpu/arm11/cpu.c @@ -14,6 +14,7 @@ * CPU specific code */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/cpu/arm1136/mx31/devices.c b/arch/arm/cpu/arm1136/mx31/devices.c index 87ca303e31b..9997e8fc339 100644 --- a/arch/arm/cpu/arm1136/mx31/devices.c +++ b/arch/arm/cpu/arm1136/mx31/devices.c @@ -6,6 +6,7 @@ * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> */ +#include <common.h> #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index fc56baccfcd..a3d4f147962 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -4,6 +4,7 @@ * Sascha Hauer, Pengutronix */ +#include <common.h> #include <div64.h> #include <init.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index b41ca68ae55..a913860491c 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -4,6 +4,7 @@ * Sascha Hauer, Pengutronix */ +#include <common.h> #include <init.h> #include <asm/arch/imx-regs.h> #include <asm/io.h> diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index e3d0216158f..f0fc58deadb 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -9,7 +9,7 @@ * Alex Zuepke <azu@sysgo.de> */ -#include <linux/types.h> +#include <common.h> #if defined(CONFIG_ARCH_TEGRA) static ulong timestamp; diff --git a/arch/arm/cpu/arm920t/cpu.c b/arch/arm/cpu/arm920t/cpu.c index 61e18230573..305713e7861 100644 --- a/arch/arm/cpu/arm920t/cpu.c +++ b/arch/arm/cpu/arm920t/cpu.c @@ -12,6 +12,7 @@ * CPU specific code */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index e792e8e795e..cba4a1f0358 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -8,6 +8,7 @@ */ #include <asm-offsets.h> +#include <common.h> #include <config.h> /* diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 5b87a3af91b..95963d2665f 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -6,6 +6,7 @@ #include <cpu_func.h> #include <asm/cache.h> #include <linux/types.h> +#include <common.h> #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void invalidate_dcache_all(void) diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c index 07ab04b7b08..2ce413a7f86 100644 --- a/arch/arm/cpu/arm926ejs/cpu.c +++ b/arch/arm/cpu/arm926ejs/cpu.c @@ -12,6 +12,7 @@ * CPU specific code */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c index 58f6cf80cae..4e1cf3a1e32 100644 --- a/arch/arm/cpu/arm926ejs/mxs/clock.c +++ b/arch/arm/cpu/arm926ejs/mxs/clock.c @@ -9,6 +9,7 @@ * Copyright (C) 2010 Freescale Semiconductor, Inc. */ +#include <common.h> #include <log.h> #include <linux/errno.h> #include <asm/io.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/iomux.c b/arch/arm/cpu/arm926ejs/mxs/iomux.c index 851b4deb080..381264b8a18 100644 --- a/arch/arm/cpu/arm926ejs/mxs/iomux.c +++ b/arch/arm/cpu/arm926ejs/mxs/iomux.c @@ -6,6 +6,7 @@ * <armlinux@phytec.de> */ +#include <common.h> #include <linux/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index 7b2bb09551b..4f3cb63c56d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -9,6 +9,7 @@ * Copyright (C) 2010 Freescale Semiconductor, Inc. */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <hang.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 76a69d7f958..249f8de8fbe 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include <common.h> #include <config.h> #include <init.h> #include <log.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c index b2d3b2b13ef..2cfbd780953 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include <common.h> #include <config.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index c3136dd8976..a94803ee93d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include <common.h> #include <config.h> #include <init.h> #include <log.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 8b65c094a8a..77bca7e331a 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -6,6 +6,7 @@ * on behalf of DENX Software Engineering GmbH */ +#include <common.h> #include <config.h> #include <hang.h> #include <log.h> diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index a6eb053cadb..61982e38a1d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -20,6 +20,7 @@ #include <asm-offsets.h> #include <config.h> +#include <common.h> #include <system-constants.h> /* diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c index cbd3b5d9958..3dff3d768d1 100644 --- a/arch/arm/cpu/arm926ejs/mxs/timer.c +++ b/arch/arm/cpu/arm926ejs/mxs/timer.c @@ -9,6 +9,7 @@ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 5d6c9f0861e..c882bd39eab 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -16,6 +16,7 @@ #include <asm-offsets.h> #include <config.h> +#include <common.h> #include <linux/linkage.h> /* diff --git a/arch/arm/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c index efd232d3423..334bb542743 100644 --- a/arch/arm/cpu/arm946es/cpu.c +++ b/arch/arm/cpu/arm946es/cpu.c @@ -12,6 +12,7 @@ * CPU specific code */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c index f25a8674dea..17bd53dae84 100644 --- a/arch/arm/cpu/armv7/arch_timer.c +++ b/arch/arm/cpu/armv7/arch_timer.c @@ -4,7 +4,7 @@ * Texas Instruments Incorporated, <www.ti.com> */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c index 7f73f893458..39217c5b2bf 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c @@ -9,6 +9,7 @@ * */ +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c index 55dcc2fd78c..1b3f36aebe1 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c index b769c451105..d7edefee231 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c @@ -9,6 +9,7 @@ * */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <linux/delay.h> diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c index 5f7cc4a102d..209ceca9a06 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <linux/delay.h> #include <linux/errno.h> diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c index f3ff29bebe8..f2ba354c24f 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c index 87918059408..f604aec62fa 100644 --- a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c +++ b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> #include "clk-core.h" diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c index b258fea45c8..8f6260e7857 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c @@ -9,6 +9,7 @@ * */ +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c index 55dcc2fd78c..1b3f36aebe1 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c index 3f2e021a307..26b673a5405 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c @@ -9,6 +9,7 @@ * */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <linux/delay.h> diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c index 5f7cc4a102d..209ceca9a06 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <linux/delay.h> #include <linux/errno.h> diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c index f3ff29bebe8..f2ba354c24f 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c index 87918059408..f604aec62fa 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <linux/errno.h> #include <asm/arch/sysmap.h> #include "clk-core.h" diff --git a/arch/arm/cpu/armv7/bcm281xx/reset.c b/arch/arm/cpu/armv7/bcm281xx/reset.c index 87e4337be4e..1491e5c88b2 100644 --- a/arch/arm/cpu/armv7/bcm281xx/reset.c +++ b/arch/arm/cpu/armv7/bcm281xx/reset.c @@ -3,6 +3,7 @@ * Copyright 2013 Broadcom Corporation. */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <asm/arch/sysmap.h> diff --git a/arch/arm/cpu/armv7/bcmcygnus/reset.c b/arch/arm/cpu/armv7/bcmcygnus/reset.c index 617c8d68a2a..63992fd8701 100644 --- a/arch/arm/cpu/armv7/bcmcygnus/reset.c +++ b/arch/arm/cpu/armv7/bcmcygnus/reset.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv7/bcmnsp/reset.c b/arch/arm/cpu/armv7/bcmnsp/reset.c index c3be33124c6..a3137752e88 100644 --- a/arch/arm/cpu/armv7/bcmnsp/reset.c +++ b/arch/arm/cpu/armv7/bcmnsp/reset.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index d11420d2fdd..19ff4323528 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -7,6 +7,7 @@ #include <cpu_func.h> #include <asm/cache.h> #include <linux/types.h> +#include <common.h> #include <asm/armv7.h> #include <asm/utils.h> diff --git a/arch/arm/cpu/armv7/cp15.c b/arch/arm/cpu/armv7/cp15.c index b2c52db68dc..0ac4e7ba8c8 100644 --- a/arch/arm/cpu/armv7/cp15.c +++ b/arch/arm/cpu/armv7/cp15.c @@ -7,6 +7,7 @@ * CP15 specific code */ +#include <common.h> #include <command.h> #include <asm/system.h> #include <asm/cache.h> diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index aa981faef00..6259ffa5108 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -14,6 +14,7 @@ * CPU specific code */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c index 7baade61b07..f6d25bb682c 100644 --- a/arch/arm/cpu/armv7/exception_level.c +++ b/arch/arm/cpu/armv7/exception_level.c @@ -8,6 +8,7 @@ * secure mode before booting an operating system. */ +#include <common.h> #include <bootm.h> #include <cpu_func.h> #include <log.h> diff --git a/arch/arm/cpu/armv7/iproc-common/armpll.c b/arch/arm/cpu/armv7/iproc-common/armpll.c index b345671b0a6..8c3a323f065 100644 --- a/arch/arm/cpu/armv7/iproc-common/armpll.c +++ b/arch/arm/cpu/armv7/iproc-common/armpll.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <asm/io.h> #include <asm/iproc-common/armpll.h> #include <asm/iproc-common/sysmap.h> diff --git a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c index eca7e8b512b..896d2f95694 100644 --- a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <cpu_func.h> #include <asm/cache.h> diff --git a/arch/arm/cpu/armv7/iproc-common/timer.c b/arch/arm/cpu/armv7/iproc-common/timer.c index b60d90f7e6a..a4255a44c00 100644 --- a/arch/arm/cpu/armv7/iproc-common/timer.c +++ b/arch/arm/cpu/armv7/iproc-common/timer.c @@ -3,6 +3,7 @@ * Copyright 2014 Broadcom Corporation. */ +#include <common.h> #include <div64.h> #include <init.h> #include <time.h> diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index e885a85ce65..4e1fe281201 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 74a2dcbc116..c455969609f 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -4,6 +4,7 @@ * Copyright 2021 NXP */ +#include <common.h> #include <cpu_func.h> #include <init.h> #include <net.h> diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index 34eea22eb92..1c3d24bcad9 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <net.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c index 664eae532d5..e31a4fb6c31 100644 --- a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c +++ b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include <common.h> #include <asm/io.h> #include "fsl_epu.h" diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c index c1eadb34523..f74d819ea1e 100644 --- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/immap_ls102xa.h> #include <linux/errno.h> diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c index 3032e266c5d..8c030be8b36 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include <linux/kernel.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/immap_ls102xa.h> diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 7ff59edd452..84d4ea3a8f4 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <log.h> #include <asm/arch/clock.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c index 374de92d026..a1949686235 100644 --- a/arch/arm/cpu/armv7/ls102xa/spl.c +++ b/arch/arm/cpu/armv7/ls102xa/spl.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include <common.h> #include <spl.h> u32 spl_boot_device(void) diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index 6f32ced5aec..c6126b10c35 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -3,6 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv7/mpu_v7r.c b/arch/arm/cpu/armv7/mpu_v7r.c index 2d83e4c721d..1d31c63e5fd 100644 --- a/arch/arm/cpu/armv7/mpu_v7r.c +++ b/arch/arm/cpu/armv7/mpu_v7r.c @@ -6,6 +6,7 @@ * Lokesh Vutla <lokeshvutla@ti.com> */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <asm/armv7.h> diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c index 4331dde7643..fb2920950d4 100644 --- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -3,6 +3,7 @@ * Copyright (C) 2009 Samsung Electronics * Minkyu Kang <mk7.kang@samsung.com> */ +#include <common.h> #include <display_options.h> #include <fdtdec.h> #include <init.h> diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c b/arch/arm/cpu/armv7/s5p-common/pwm.c index 986b585b70e..5068327d3c5 100644 --- a/arch/arm/cpu/armv7/s5p-common/pwm.c +++ b/arch/arm/cpu/armv7/s5p-common/pwm.c @@ -5,7 +5,7 @@ * Donghwa Lee <dh09.lee@samsung.com> */ -#include <config.h> +#include <common.h> #include <errno.h> #include <asm/io.h> #include <asm/arch/pwm.h> diff --git a/arch/arm/cpu/armv7/s5p-common/sromc.c b/arch/arm/cpu/armv7/s5p-common/sromc.c index c0035fb18eb..0fc170936ae 100644 --- a/arch/arm/cpu/armv7/s5p-common/sromc.c +++ b/arch/arm/cpu/armv7/s5p-common/sromc.c @@ -4,7 +4,7 @@ * Naveen Krishna Ch <ch.naveen@samsung.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/sromc.h> diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 12994ecc843..9d981cce145 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -6,6 +6,7 @@ * Minkyu Kang <mk7.kang@samsung.com> */ +#include <common.h> #include <div64.h> #include <init.h> #include <time.h> diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c index 27ffb450378..8febfe52766 100644 --- a/arch/arm/cpu/armv7/s5p4418/cpu.c +++ b/arch/arm/cpu/armv7/s5p4418/cpu.c @@ -4,6 +4,7 @@ * Hyunseok, Jung <hsjung@nexell.co.kr> */ +#include <common.h> #include <command.h> #include <asm/system.h> #include <asm/cache.h> diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index 4c30f3294b7..5cb8cfa6cf3 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -7,6 +7,7 @@ * which was based on code by Carl van Schaik <carl@ok-labs.com>. */ #include <config.h> +#include <common.h> #include <asm/cache.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/cpu/armv7/sunxi/sram.c b/arch/arm/cpu/armv7/sunxi/sram.c index bc25719c9c4..28ff6a1b7c2 100644 --- a/arch/arm/cpu/armv7/sunxi/sram.c +++ b/arch/arm/cpu/armv7/sunxi/sram.c @@ -9,6 +9,7 @@ * SRAM init for older sunxi SoCs. */ +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/cpu/armv7/syslib.c b/arch/arm/cpu/armv7/syslib.c index f0eda1ca98d..7e29636972d 100644 --- a/arch/arm/cpu/armv7/syslib.c +++ b/arch/arm/cpu/armv7/syslib.c @@ -7,6 +7,7 @@ * Syed Mohammed Khasim <khasim@ti.com> */ +#include <common.h> #include <asm/io.h> /************************************************************ diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index e61ad7b96e9..c23ddc12b45 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -3,6 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include <common.h> #include <clock_legacy.h> #include <command.h> #include <cpu_func.h> diff --git a/arch/arm/cpu/armv7/vf610/timer.c b/arch/arm/cpu/armv7/vf610/timer.c index 7bae0b5574a..a9c1a8fcebc 100644 --- a/arch/arm/cpu/armv7/vf610/timer.c +++ b/arch/arm/cpu/armv7/vf610/timer.c @@ -3,6 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c index 5dc7ed5e270..c0422485ba4 100644 --- a/arch/arm/cpu/armv7/virt-dt.c +++ b/arch/arm/cpu/armv7/virt-dt.c @@ -15,6 +15,7 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <common.h> #include <errno.h> #include <log.h> #include <stdio_dev.h> diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c index 811499367d4..5ffeca13d91 100644 --- a/arch/arm/cpu/armv7/virt-v7.c +++ b/arch/arm/cpu/armv7/virt-v7.c @@ -8,6 +8,7 @@ * needed to enable ARMv7 virtualization for current hypervisors */ +#include <common.h> #include <cpu_func.h> #include <asm/armv7.h> #include <asm/cache.h> diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index b6d08b7aad7..d1aecf6a85c 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -4,6 +4,7 @@ * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. */ +#include <common.h> #include <cpu_func.h> #include <errno.h> #include <log.h> diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7m/cpu.c index b4440d3f3f8..65427b5312b 100644 --- a/arch/arm/cpu/armv7m/cpu.c +++ b/arch/arm/cpu/armv7m/cpu.c @@ -7,6 +7,7 @@ * Kamil Lulko, <kamil.lulko@gmail.com> */ +#include <common.h> #include <cpu_func.h> #include <irq_func.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv7m/systick-timer.c b/arch/arm/cpu/armv7m/systick-timer.c index d8fa4f0c707..c30af4ff7a2 100644 --- a/arch/arm/cpu/armv7m/systick-timer.c +++ b/arch/arm/cpu/armv7m/systick-timer.c @@ -21,7 +21,7 @@ * using CFG_SYS_HZ_CLOCK. */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index d4c64f2d60d..57d06f0575d 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -7,6 +7,7 @@ * Alexander Graf <agraf@suse.de> */ +#include <common.h> #include <cpu_func.h> #include <hang.h> #include <log.h> diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c index 97667e607a8..9bfe3815e51 100644 --- a/arch/arm/cpu/armv8/cpu-dt.c +++ b/arch/arm/cpu/armv8/cpu-dt.c @@ -3,6 +3,7 @@ * Copyright 2016 NXP Semiconductor, Inc. */ +#include <common.h> #include <asm/cache.h> #include <asm/psci.h> #include <asm/system.h> diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c index d568efa427a..3c7f36ad8d8 100644 --- a/arch/arm/cpu/armv8/cpu.c +++ b/arch/arm/cpu/armv8/cpu.c @@ -10,6 +10,7 @@ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c index 85c78f55789..b11936548fb 100644 --- a/arch/arm/cpu/armv8/exception_level.c +++ b/arch/arm/cpu/armv8/exception_level.c @@ -8,6 +8,7 @@ * level before booting an operating system. */ +#include <common.h> #include <bootm.h> #include <cpu_func.h> #include <log.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d2dbfdd08a0..12d31184ad9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -4,7 +4,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <cpu_func.h> #include <env.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index ca6be3626fb..22ce6992165 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -4,7 +4,7 @@ * Copyright 2020-2021 NXP */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <efi_loader.h> #include <log.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c index 78961d8089e..b1bb29bcaf5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c @@ -3,12 +3,11 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <log.h> #include <asm/io.h> #include <linux/delay.h> #include <linux/errno.h> -#include <linux/string.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/soc.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 9a24d4b3031..4455eb1726d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -4,7 +4,7 @@ * Copyright 2019 NXP. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <cpu_func.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c index b768790437f..fbd5fd7d433 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c @@ -4,7 +4,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <env.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index 452246e0e67..137778dc136 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -6,7 +6,7 @@ * Derived from arch/power/cpu/mpc85xx/speed.c */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <cpu_func.h> #include <asm/global_data.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c index 04ffefafbf7..c22e73253c3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c @@ -3,7 +3,7 @@ * Copyright 2018 NXP */ -#include <config.h> +#include <common.h> #include <linux/libfdt.h> #include <fdt_support.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c index c0e5455507a..8d7beca7db3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2016 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/immap_lsch2.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c index d48baa63816..86a49b152e4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c @@ -3,9 +3,9 @@ * Copyright 2019 NXP */ +#include <common.h> #include <fdt_support.h> #include <log.h> -#include <asm/arch/stream_id_lsch3.h> #include <asm/arch-fsl-layerscape/immap_lsch3.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> #include <asm/arch-fsl-layerscape/fsl_portals.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c index 1b4eab3613e..80d2910f679 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -3,8 +3,7 @@ * Copyright 2019 NXP */ -#include <config.h> -#include <linux/kernel.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> struct serdes_config { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c index ec80e42055d..e3c3fc6bfb5 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c @@ -3,12 +3,11 @@ * Copyright 2018 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch-fsl-layerscape/immap_lsch2.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> #include <asm/arch-fsl-layerscape/fsl_portals.h> #include <fsl_sec.h> -#include <asm/arch/stream_id_lsch3.h> #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c index 1911ca1a175..6c5e52ebaa6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/immap_lsch2.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c index a73dd316f8d..333d7e2fa21 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c @@ -3,11 +3,10 @@ * Copyright 2018 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch-fsl-layerscape/immap_lsch2.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> #include <asm/arch-fsl-layerscape/fsl_portals.h> -#include <asm/arch/stream_id_lsch3.h> #ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c index 26ca4ca10f3..9347e516bf6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c @@ -4,7 +4,7 @@ * Copyright 2019 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/immap_lsch2.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c index 3a076ca04f6..23743ae10cf 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c @@ -3,11 +3,10 @@ * Copyright 2019 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch-fsl-layerscape/immap_lsch3.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> #include <asm/arch-fsl-layerscape/fsl_portals.h> -#include <asm/arch/stream_id_lsch3.h> struct icid_id_table icid_tbl[] = { SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c index 154b727392e..fe667f06c39 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2017-2019 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/soc.h> #include <asm/io.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c index 5088c8ebb7f..7997422840f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> struct serdes_config { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c index c320e835c99..e6403b79526 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c @@ -3,11 +3,10 @@ * Copyright 2019 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch-fsl-layerscape/immap_lsch3.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> #include <asm/arch-fsl-layerscape/fsl_portals.h> -#include <asm/arch/stream_id_lsch3.h> struct icid_id_table icid_tbl[] = { SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c index df9329df77e..3a0ed1fa550 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c @@ -3,11 +3,10 @@ * Copyright 2019 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch-fsl-layerscape/immap_lsch3.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> #include <asm/arch-fsl-layerscape/fsl_portals.h> -#include <asm/arch/stream_id_lsch3.h> struct icid_id_table icid_tbl[] = { SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c index 43f0e8c87ba..5941d90e036 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c @@ -3,7 +3,7 @@ * Copyright 2018, 2020 NXP */ -#include <config.h> +#include <common.h> #include <asm/arch/fsl_serdes.h> struct serdes_config { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index db913208b9e..ce0c46ad0d4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -3,7 +3,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <cpu_func.h> #include <image.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index d85a630f8a3..4c61d28c20f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -4,7 +4,7 @@ * Copyright 2019-2021 NXP */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <cpu_func.h> #include <env.h> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index a739ff2da58..232adfa843a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -3,7 +3,7 @@ * Copyright 2014-2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <cpu_func.h> #include <debug_uart.h> diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index e4aa5a47455..8f83372cbca 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -4,6 +4,7 @@ * David Feng <fenghua@phytium.com.cn> */ +#include <common.h> #include <bootstage.h> #include <command.h> #include <time.h> diff --git a/arch/arm/cpu/armv8/hisilicon/pinmux.c b/arch/arm/cpu/armv8/hisilicon/pinmux.c index d7a5a792610..e14057c0a47 100644 --- a/arch/arm/cpu/armv8/hisilicon/pinmux.c +++ b/arch/arm/cpu/armv8/hisilicon/pinmux.c @@ -4,6 +4,7 @@ * Peter Griffin <peter.griffin@linaro.org> */ +#include <common.h> #include <fdtdec.h> #include <log.h> #include <asm/gpio.h> diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c index 44372cbe4a1..c0e8726346f 100644 --- a/arch/arm/cpu/armv8/sec_firmware.c +++ b/arch/arm/cpu/armv8/sec_firmware.c @@ -3,7 +3,7 @@ * Copyright 2016 NXP Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <errno.h> #include <fdt_support.h> diff --git a/arch/arm/cpu/armv8/sha1_ce_glue.c b/arch/arm/cpu/armv8/sha1_ce_glue.c index c88b4dc66e1..780b119a90b 100644 --- a/arch/arm/cpu/armv8/sha1_ce_glue.c +++ b/arch/arm/cpu/armv8/sha1_ce_glue.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org> */ +#include <common.h> #include <u-boot/sha1.h> extern void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src, diff --git a/arch/arm/cpu/armv8/sha256_ce_glue.c b/arch/arm/cpu/armv8/sha256_ce_glue.c index d5d2b4f4ac7..67dd796c122 100644 --- a/arch/arm/cpu/armv8/sha256_ce_glue.c +++ b/arch/arm/cpu/armv8/sha256_ce_glue.c @@ -5,6 +5,7 @@ * Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org> */ +#include <common.h> #include <u-boot/sha256.h> extern void sha256_armv8_ce_process(uint32_t state[8], uint8_t const *src, diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c index 485294b88d0..42a0962fdcd 100644 --- a/arch/arm/cpu/armv8/spin_table.c +++ b/arch/arm/cpu/armv8/spin_table.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada <yamada.masahiro@socionext.com> */ +#include <common.h> #include <linux/libfdt.h> #include <asm/spin_table.h> diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c index 259b49ff364..8f1231c86eb 100644 --- a/arch/arm/cpu/armv8/spl_data.c +++ b/arch/arm/cpu/armv8/spl_data.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include <common.h> #include <spl.h> char __data_save_start[0] __section(".__data_save_start"); diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi index e9cffca073e..e5c64c86d1d 100644 --- a/arch/arm/dts/k3-am62-main.dtsi +++ b/arch/arm/dts/k3-am62-main.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family Main Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_main { @@ -42,8 +42,9 @@ }; }; - main_conf: bus@100000 { - compatible = "simple-bus"; + main_conf: syscon@100000 { + compatible = "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x20000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x00 0x00100000 0x20000>; @@ -120,13 +121,8 @@ <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>, - <0x00 0x48600000 0x00 0x8000>, - <0x00 0x484a4000 0x00 0x2000>, - <0x00 0x484c2000 0x00 0x2000>, - <0x00 0x48420000 0x00 0x2000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "bchan"; + <0x00 0x4bc00000 0x00 0x100000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <3>; @@ -142,13 +138,8 @@ reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, - <0x00 0x485e0000 0x00 0x10000>, - <0x00 0x484a0000 0x00 0x2000>, - <0x00 0x484c0000 0x00 0x2000>, - <0x00 0x48430000 0x00 0x1000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "rflow"; + <0x00 0x4b800000 0x00 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <2>; @@ -511,9 +502,6 @@ main_gpio0: gpio@600000 { compatible = "ti,am64-gpio", "ti,keystone-gpio"; reg = <0x0 0x00600000 0x0 0x100>; - gpio-ranges = <&main_pmx0 0 0 32>, - <&main_pmx0 32 33 38>, - <&main_pmx0 70 72 22>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; @@ -532,10 +520,6 @@ compatible = "ti,am64-gpio", "ti,keystone-gpio"; reg = <0x0 0x00601000 0x0 0x100>; gpio-controller; - gpio-ranges = <&main_pmx0 0 94 41>, - <&main_pmx0 41 136 6>, - <&main_pmx0 47 143 3>, - <&main_pmx0 50 149 2>; #gpio-cells = <2>; interrupt-parent = <&main_gpio_intr>; interrupts = <180>, <181>, <182>, @@ -558,9 +542,10 @@ clock-names = "clk_ahb", "clk_xin"; assigned-clocks = <&k3_clks 57 6>; assigned-clock-parents = <&k3_clks 57 8>; - bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + ti,trm-icp = <0x2>; + bus-width = <8>; ti,clkbuf-sel = <0x7>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; @@ -578,8 +563,7 @@ power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; - ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -591,6 +575,8 @@ ti,itap-del-sel-sd-hs = <0x1>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; + ti,clkbuf-sel = <0x7>; + bus-width = <4>; status = "disabled"; }; @@ -601,8 +587,7 @@ power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; - ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x8>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0x0>; @@ -614,6 +599,7 @@ ti,itap-del-sel-sd-hs = <0xa>; ti,itap-del-sel-sdr12 = <0xa>; ti,itap-del-sel-sdr25 = <0x1>; + ti,clkbuf-sel = <0x7>; status = "disabled"; }; @@ -637,8 +623,6 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; - snps,usb2-gadget-lpm-disable; - snps,usb2-lpm-disable; }; }; @@ -662,8 +646,6 @@ interrupt-names = "host", "peripheral"; maximum-speed = "high-speed"; dr_mode = "otg"; - snps,usb2-gadget-lpm-disable; - snps,usb2-lpm-disable; }; }; @@ -693,15 +675,6 @@ }; }; - gpu: gpu@fd00000 { - compatible = "ti,am62-gpu", "img,img-axe"; - reg = <0x00 0x0fd00000 0x00 0x20000>; - clocks = <&k3_clks 187 0>; - clock-names = "core"; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; - }; - cpsw3g: ethernet@8000000 { compatible = "ti,am642-cpsw-nuss"; #address-cells = <2>; @@ -780,10 +753,9 @@ <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ - <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ - <0x00 0x30201000 0x00 0x1000>; /* common1 */ + <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2", "common1"; + "ovr1", "ovr2", "vp1", "vp2"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&dss_vp1_clk>, @@ -993,66 +965,4 @@ power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; - - ti_csi2rx0: ticsi2rx@30102000 { - compatible = "ti,j721e-csi2rx-shim"; - dmas = <&main_bcdma 0 0x4700 0>; - dma-names = "rx0"; - reg = <0x00 0x30102000 0x00 0x1000>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - cdns_csi2rx0: csi-bridge@30101000 { - compatible = "ti,j721e-csi2rx", "cdns,csi2rx"; - reg = <0x00 0x30101000 0x00 0x1000>; - clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>, - <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>; - clock-names = "sys_clk", "p_clk", "pixel_if0_clk", - "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; - phys = <&dphy0>; - phy-names = "dphy"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - csi0_port0: port@0 { - reg = <0>; - status = "disabled"; - }; - - csi0_port1: port@1 { - reg = <1>; - status = "disabled"; - }; - - csi0_port2: port@2 { - reg = <2>; - status = "disabled"; - }; - - csi0_port3: port@3 { - reg = <3>; - status = "disabled"; - }; - - csi0_port4: port@4 { - reg = <4>; - status = "disabled"; - }; - }; - }; - }; - - dphy0: phy@30110000 { - compatible = "cdns,dphy-rx"; - reg = <0x00 0x30110000 0x00 0x1100>; - #phy-cells = <0>; - power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; - status = "disabled"; - }; - }; diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi index e66d486ef1f..0e0b234581c 100644 --- a/arch/arm/dts/k3-am62-mcu.dtsi +++ b/arch/arm/dts/k3-am62-mcu.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family MCU Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_mcu { diff --git a/arch/arm/dts/k3-am62-thermal.dtsi b/arch/arm/dts/k3-am62-thermal.dtsi index 12ba833002a..a358757e26f 100644 --- a/arch/arm/dts/k3-am62-thermal.dtsi +++ b/arch/arm/dts/k3-am62-thermal.dtsi @@ -1,7 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ - */ +// SPDX-License-Identifier: GPL-2.0 #include <dt-bindings/thermal/thermal.h> diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi index 23ce1bfda8d..fef76f52a52 100644 --- a/arch/arm/dts/k3-am62-wakeup.dtsi +++ b/arch/arm/dts/k3-am62-wakeup.dtsi @@ -1,12 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ -#include <dt-bindings/bus/ti-sysc.h> - &cbass_wakeup { wkup_conf: syscon@43000000 { bootph-all; @@ -23,34 +21,14 @@ }; }; - target-module@2b300050 { - compatible = "ti,sysc-omap2", "ti,sysc"; - reg = <0x00 0x2b300050 0x00 0x4>, - <0x00 0x2b300054 0x00 0x4>, - <0x00 0x2b300058 0x00 0x4>; - reg-names = "rev", "sysc", "syss"; - ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | - SYSC_OMAP2_SOFTRESET | - SYSC_OMAP2_AUTOIDLE)>; - ti,sysc-sidle = <SYSC_IDLE_FORCE>, - <SYSC_IDLE_NO>, - <SYSC_IDLE_SMART>, - <SYSC_IDLE_SMART_WKUP>; - ti,syss-mask = <1>; - ti,no-reset-on-init; + wkup_uart0: serial@2b300000 { + compatible = "ti,am64-uart", "ti,am654-uart"; + reg = <0x00 0x2b300000 0x00 0x100>; + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 114 0>; - clock-names = "fck"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x00 0x2b300000 0x100000>; - - wkup_uart0: serial@0 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x0 0x100>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; + clock-names = "fclk"; + status = "disabled"; }; wkup_i2c0: i2c@2b200000 { diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi index f0781f2bea2..f1e15206e1c 100644 --- a/arch/arm/dts/k3-am62.dtsi +++ b/arch/arm/dts/k3-am62.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62 SoC Family * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/gpio/gpio.h> diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi index 54a7702037d..fb2032068d1 100644 --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi @@ -206,66 +206,3 @@ }; }; #endif - -&main_bcdma { - reg = <0x00 0x485c0100 0x00 0x100>, - <0x00 0x4c000000 0x00 0x20000>, - <0x00 0x4a820000 0x00 0x20000>, - <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>, - <0x00 0x48600000 0x00 0x8000>, - <0x00 0x484a4000 0x00 0x2000>, - <0x00 0x484c2000 0x00 0x2000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", - "cfg", "tchan", "rchan"; -}; - -&main_pktdma { - reg = <0x00 0x485c0000 0x00 0x100>, - <0x00 0x4a800000 0x00 0x20000>, - <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, - <0x00 0x485e0000 0x00 0x20000>, - <0x00 0x484a0000 0x00 0x4000>, - <0x00 0x484c0000 0x00 0x2000>, - <0x00 0x48430000 0x00 0x4000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg", - "tchan", "rchan", "rflow"; - bootph-all; -}; - -&mdio0_pins_default { - bootph-all; -}; - -&cpsw3g_mdio { - bootph-all; -}; - -&cpsw3g_phy0 { - bootph-all; -}; - -&rgmii1_pins_default { - bootph-all; -}; - -&cpsw3g { - bootph-all; - - ethernet-ports { - bootph-all; - }; -}; - -&phy_gmii_sel { - bootph-all; -}; - -&cpsw_port1 { - bootph-all; -}; - -&cpsw_port2 { - status = "disabled"; -}; diff --git a/arch/arm/dts/k3-am625-beagleplay.dts b/arch/arm/dts/k3-am625-beagleplay.dts index 8ab838f1697..9a6bd0a3c94 100644 --- a/arch/arm/dts/k3-am625-beagleplay.dts +++ b/arch/arm/dts/k3-am625-beagleplay.dts @@ -1,9 +1,9 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * https://beagleplay.org/ * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ - * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation */ /dts-v1/; @@ -29,6 +29,7 @@ i2c3 = &main_i2c3; i2c4 = &wkup_i2c0; i2c5 = &mcu_i2c0; + mdio-gpio0 = &mdio0; mmc0 = &sdhci0; mmc1 = &sdhci1; mmc2 = &sdhci2; @@ -230,6 +231,27 @@ }; }; + /* Workaround for errata i2329 - just use mdio bitbang */ + mdio0: mdio { + compatible = "virtual,mdio-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&mdio0_pins_default>; + gpios = <&main_gpio0 86 GPIO_ACTIVE_HIGH>, /* MDC */ + <&main_gpio0 85 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + cpsw3g_phy0: ethernet-phy@0 { + reg = <0>; + }; + + cpsw3g_phy1: ethernet-phy@1 { + reg = <1>; + reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>; + reset-assert-us = <25>; + reset-deassert-us = <60000>; /* T2 */ + }; + }; }; &main_pmx0 { @@ -290,10 +312,8 @@ mdio0_pins_default: mdio0-default-pins { pinctrl-single,pins = < - AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ - AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ - AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ - AM62X_IOPAD(0x018c, PIN_INPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ + AM62X_IOPAD(0x0160, PIN_OUTPUT, 7) /* (AD24) MDIO0_MDC.GPIO0_86 */ + AM62X_IOPAD(0x015c, PIN_INPUT, 7) /* (AB22) MDIO0_MDIO.GPIO0_85 */ >; }; @@ -385,6 +405,7 @@ AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */ AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */ AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */ + AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */ AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */ >; @@ -422,7 +443,7 @@ >; }; - main_uart0_pins_default: main-uart0-default-pins { + console_pins_default: console-default-pins { bootph-all; pinctrl-single,pins = < AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ @@ -552,13 +573,11 @@ }; &usbss0 { - bootph-all; ti,vbus-divider; status = "okay"; }; &usb0 { - bootph-all; dr_mode = "peripheral"; }; @@ -592,23 +611,8 @@ }; &cpsw3g_mdio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mdio0_pins_default>; - - cpsw3g_phy0: ethernet-phy@0 { - reg = <0>; - reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_LOW>; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - }; - - cpsw3g_phy1: ethernet-phy@1 { - reg = <1>; - reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>; - reset-assert-us = <25>; - reset-deassert-us = <60000>; /* T2 */ - }; + /* Workaround for errata i2329 - Use mdio bitbang */ + status = "disabled"; }; &main_gpio0 { @@ -619,7 +623,7 @@ "USR0", "USR1", "USR2", "USR3", "", "", "USR4", /* 3-9 */ "EEPROM_WP", /* 10 */ "CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2", /* 11-12 */ - "CC1352P7_BOOT", "CC1352P7_RSTN", "GBE_RSTN", "", "", /* 13-17 */ + "CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "", /* 13-17 */ "USR_BUTTON", "", "", "", "", "", "", "", "", /* 18-26 */ "", "", "", "", "", "", "", "", "", "HDMI_INT", /* 27-36 */ "", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */ @@ -823,6 +827,7 @@ bootph-all; pinctrl-names = "default"; pinctrl-0 = <&emmc_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; status = "okay"; }; @@ -835,6 +840,7 @@ vmmc-supply = <&vdd_3v3_sd>; vqmmc-supply = <&vdd_sd_dv>; + ti,driver-strength-ohm = <50>; disable-wp; cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; cd-debounce-delay-ms = <100>; @@ -846,10 +852,12 @@ vmmc-supply = <&wlan_en>; pinctrl-names = "default"; pinctrl-0 = <&wifi_pins_default>, <&wifi_32k_clk>; + bus-width = <4>; non-removable; ti,fails-without-test-cd; cap-power-off-card; keep-power-in-suspend; + ti,driver-strength-ohm = <50>; assigned-clocks = <&k3_clks 157 158>; assigned-clock-parents = <&k3_clks 157 160>; #address-cells = <1>; @@ -869,7 +877,7 @@ &main_uart0 { bootph-all; pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; + pinctrl-0 = <&console_pins_default>; status = "okay"; }; diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts index ae81ebb39d0..b18092497c9 100644 --- a/arch/arm/dts/k3-am625-sk.dts +++ b/arch/arm/dts/k3-am625-sk.dts @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * AM625 SK: https://www.ti.com/lit/zip/sprr448 * - * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-am625.dtsi b/arch/arm/dts/k3-am625.dtsi index 4014add6320..4193c2b3eed 100644 --- a/arch/arm/dts/k3-am625.dtsi +++ b/arch/arm/dts/k3-am625.dtsi @@ -1,10 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC family in Quad core configuration * * TRM: https://www.ti.com/lit/pdf/spruiv7 * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi index aa1e057082f..4ae7fdc5221 100644 --- a/arch/arm/dts/k3-am62a-main.dtsi +++ b/arch/arm/dts/k3-am62a-main.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A SoC Family Main Domain peripherals * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_main { @@ -42,8 +42,9 @@ }; }; - main_conf: bus@100000 { - compatible = "simple-bus"; + main_conf: syscon@100000 { + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x20000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x00 0x00 0x00100000 0x20000>; @@ -100,13 +101,8 @@ <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>, - <0x00 0x48600000 0x00 0x8000>, - <0x00 0x484a4000 0x00 0x2000>, - <0x00 0x484c2000 0x00 0x2000>, - <0x00 0x48420000 0x00 0x2000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "bchan"; + <0x00 0x4bc00000 0x00 0x100000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <3>; ti,sci = <&dmsc>; @@ -121,13 +117,8 @@ reg = <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>, - <0x00 0x485e0000 0x00 0x10000>, - <0x00 0x484a0000 0x00 0x2000>, - <0x00 0x484c0000 0x00 0x2000>, - <0x00 0x48430000 0x00 0x1000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", - "ring", "tchan", "rchan", "rflow"; + <0x00 0x4b800000 0x00 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; msi-parent = <&inta_main_dmss>; #dma-cells = <2>; ti,sci = <&dmsc>; @@ -153,44 +144,6 @@ }; }; - dmss_csi: bus@4e000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - dma-ranges; - ranges = <0x00 0x4e000000 0x00 0x4e000000 0x00 0x300000>; - - ti,sci-dev-id = <198>; - - inta_main_dmss_csi: interrupt-controller@4e0a0000 { - compatible = "ti,sci-inta"; - reg = <0x00 0x4e0a0000 0x00 0x8000>; - #interrupt-cells = <0>; - interrupt-controller; - interrupt-parent = <&gic500>; - msi-controller; - ti,sci = <&dmsc>; - ti,sci-dev-id = <200>; - ti,interrupt-ranges = <0 237 8>; - ti,unmapped-event-sources = <&main_bcdma_csi>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - }; - - main_bcdma_csi: dma-controller@4e230000 { - compatible = "ti,am62a-dmss-bcdma-csirx"; - reg = <0x00 0x4e230000 0x00 0x100>, - <0x00 0x4e180000 0x00 0x8000>, - <0x00 0x4e100000 0x00 0x10000>; - reg-names = "gcfg", "rchanrt", "ringrt"; - msi-parent = <&inta_main_dmss_csi>; - #dma-cells = <3>; - ti,sci = <&dmsc>; - ti,sci-dev-id = <199>; - ti,sci-rm-range-rchan = <0x21>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - }; - }; - dmsc: system-controller@44043000 { compatible = "ti,k2g-sci"; reg = <0x00 0x44043000 0x00 0xfe0>; @@ -509,7 +462,7 @@ <193>, <194>, <195>; interrupt-controller; #interrupt-cells = <2>; - ti,ngpio = <92>; + ti,ngpio = <87>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 77 0>; @@ -527,7 +480,7 @@ <183>, <184>, <185>; interrupt-controller; #interrupt-cells = <2>; - ti,ngpio = <52>; + ti,ngpio = <88>; ti,davinci-gpio-unbanked = <0>; power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 78 0>; @@ -535,24 +488,6 @@ status = "disabled"; }; - sdhci0: mmc@fa10000 { - compatible = "ti,am62-sdhci"; - reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; - clock-names = "clk_ahb", "clk_xin"; - assigned-clocks = <&k3_clks 57 6>; - assigned-clock-parents = <&k3_clks 57 8>; - bus-width = <8>; - mmc-hs200-1_8v; - ti,clkbuf-sel = <0x7>; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-mmc-hs = <0x0>; - ti,otap-del-sel-hs200 = <0x6>; - status = "disabled"; - }; - sdhci1: mmc@fa00000 { compatible = "ti,am62-sdhci"; reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; @@ -560,8 +495,7 @@ power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 58 5>, <&k3_clks 58 6>; clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; - ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; @@ -573,30 +507,8 @@ ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - no-1-8-v; - status = "disabled"; - }; - - sdhci2: mmc@fa20000 { - compatible = "ti,am62-sdhci"; - reg = <0x00 0xfa20000 0x00 0x260>, <0x00 0xfa28000 0x00 0x134>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 184 5>, <&k3_clks 184 6>; - clock-names = "clk_ahb", "clk_xin"; - bus-width = <4>; ti,clkbuf-sel = <0x7>; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-sd-hs = <0x0>; - ti,otap-del-sel-sdr12 = <0xf>; - ti,otap-del-sel-sdr25 = <0xf>; - ti,otap-del-sel-sdr50 = <0xc>; - ti,otap-del-sel-sdr104 = <0x6>; - ti,otap-del-sel-ddr50 = <0x9>; - ti,itap-del-sel-legacy = <0x0>; - ti,itap-del-sel-sd-hs = <0x0>; - ti,itap-del-sel-sdr12 = <0x0>; - ti,itap-del-sel-sdr25 = <0x0>; + bus-width = <4>; no-1-8-v; status = "disabled"; }; @@ -964,91 +876,4 @@ power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status = "disabled"; }; - - ti_csi2rx0: ticsi2rx@30102000 { - compatible = "ti,j721e-csi2rx-shim"; - dmas = <&main_bcdma_csi 0 0x5000 0>; - dma-names = "rx0"; - reg = <0x00 0x30102000 0x00 0x1000>; - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - cdns_csi2rx0: csi-bridge@30101000 { - compatible = "ti,j721e-csi2rx", "cdns,csi2rx"; - reg = <0x00 0x30101000 0x00 0x1000>; - clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>, - <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>; - clock-names = "sys_clk", "p_clk", "pixel_if0_clk", - "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; - phys = <&dphy0>; - phy-names = "dphy"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - csi0_port0: port@0 { - reg = <0>; - status = "disabled"; - }; - - csi0_port1: port@1 { - reg = <1>; - status = "disabled"; - }; - - csi0_port2: port@2 { - reg = <2>; - status = "disabled"; - }; - - csi0_port3: port@3 { - reg = <3>; - status = "disabled"; - }; - - csi0_port4: port@4 { - reg = <4>; - status = "disabled"; - }; - }; - }; - }; - - dphy0: phy@30110000 { - compatible = "cdns,dphy-rx"; - reg = <0x00 0x30110000 0x00 0x1100>; - #phy-cells = <0>; - power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; - status = "disabled"; - }; - - dss: dss@30200000 { - compatible = "ti,am62a7-dss"; - reg = <0x00 0x30200000 0x00 0x1000>, /* common */ - <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ - <0x00 0x30206000 0x00 0x1000>, /* vid */ - <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ - <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ - <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */ - <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ - <0x00 0x30201000 0x00 0x1000>; /* common1 */ - reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2", "common1"; - power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 186 6>, - <&k3_clks 186 0>, - <&k3_clks 186 2>; - clock-names = "fck", "vp1", "vp2"; - interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - - dss_ports: ports { - #address-cells = <1>; - #size-cells = <0>; - }; - }; }; diff --git a/arch/arm/dts/k3-am62a-mcu.dtsi b/arch/arm/dts/k3-am62a-mcu.dtsi index 8c36e56f413..a6d16a94088 100644 --- a/arch/arm/dts/k3-am62a-mcu.dtsi +++ b/arch/arm/dts/k3-am62a-mcu.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM625 SoC Family MCU Domain peripherals * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_mcu { diff --git a/arch/arm/dts/k3-am62a-thermal.dtsi b/arch/arm/dts/k3-am62a-thermal.dtsi index c7486fb2a5b..85ce545633e 100644 --- a/arch/arm/dts/k3-am62a-thermal.dtsi +++ b/arch/arm/dts/k3-am62a-thermal.dtsi @@ -1,7 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ - */ +// SPDX-License-Identifier: GPL-2.0 #include <dt-bindings/thermal/thermal.h> diff --git a/arch/arm/dts/k3-am62a-wakeup.dtsi b/arch/arm/dts/k3-am62a-wakeup.dtsi index f7bec484705..4e8279fa01e 100644 --- a/arch/arm/dts/k3-am62a-wakeup.dtsi +++ b/arch/arm/dts/k3-am62a-wakeup.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ &cbass_wakeup { diff --git a/arch/arm/dts/k3-am62a.dtsi b/arch/arm/dts/k3-am62a.dtsi index b1b88460029..61a210ecd5f 100644 --- a/arch/arm/dts/k3-am62a.dtsi +++ b/arch/arm/dts/k3-am62a.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A SoC Family * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/gpio/gpio.h> diff --git a/arch/arm/dts/k3-am62a7-sk.dts b/arch/arm/dts/k3-am62a7-sk.dts index f241637a564..8f64ac2c756 100644 --- a/arch/arm/dts/k3-am62a7-sk.dts +++ b/arch/arm/dts/k3-am62a7-sk.dts @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * AM62A SK: https://www.ti.com/lit/zip/sprr459 * - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; @@ -20,7 +20,6 @@ serial0 = &wkup_uart0; serial2 = &main_uart0; serial3 = &main_uart1; - mmc0 = &sdhci0; mmc1 = &sdhci1; }; @@ -133,18 +132,6 @@ clock-frequency = <12288000>; }; - hdmi0: connector-hdmi { - compatible = "hdmi-connector"; - label = "hdmi"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&sii9022_out>; - }; - }; - }; - codec_audio: sound { compatible = "simple-audio-card"; simple-audio-card,name = "AM62Ax-SKEVM"; @@ -194,39 +181,6 @@ }; &main_pmx0 { - main_dss0_pins_default: main-dss0-default-pins { - pinctrl-single,pins = < - AM62AX_IOPAD(0x100, PIN_OUTPUT, 0) /* (V17) VOUT0_VSYNC */ - AM62AX_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (T18) VOUT0_HSYNC */ - AM62AX_IOPAD(0x104, PIN_OUTPUT, 0) /* (AA22) VOUT0_PCLK */ - AM62AX_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (U17) VOUT0_DE */ - AM62AX_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ - AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (U21) VOUT0_DATA1 */ - AM62AX_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (U20) VOUT0_DATA2 */ - AM62AX_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (U19) VOUT0_DATA3 */ - AM62AX_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (T19) VOUT0_DATA4 */ - AM62AX_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (U18) VOUT0_DATA5 */ - AM62AX_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V22) VOUT0_DATA6 */ - AM62AX_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA7 */ - AM62AX_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V19) VOUT0_DATA8 */ - AM62AX_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (V18) VOUT0_DATA9 */ - AM62AX_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA10 */ - AM62AX_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA11 */ - AM62AX_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (W20) VOUT0_DATA12 */ - AM62AX_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (W19) VOUT0_DATA13 */ - AM62AX_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y21) VOUT0_DATA14 */ - AM62AX_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA15 */ - AM62AX_IOPAD(0x05c, PIN_OUTPUT, 1) /* (P22) GPMC0_AD8.VOUT0_DATA16 */ - AM62AX_IOPAD(0x060, PIN_OUTPUT, 1) /* (R19) GPMC0_AD9.VOUT0_DATA17 */ - AM62AX_IOPAD(0x064, PIN_OUTPUT, 1) /* (R20) GPMC0_AD10.VOUT0_DATA18 */ - AM62AX_IOPAD(0x068, PIN_OUTPUT, 1) /* (R22) GPMC0_AD11.VOUT0_DATA19 */ - AM62AX_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */ - AM62AX_IOPAD(0x070, PIN_OUTPUT, 1) /* (R21) GPMC0_AD13.VOUT0_DATA21 */ - AM62AX_IOPAD(0x074, PIN_OUTPUT, 1) /* (T20) GPMC0_AD14.VOUT0_DATA22 */ - AM62AX_IOPAD(0x078, PIN_OUTPUT, 1) /* (T21) GPMC0_AD15.VOUT0_DATA23 */ - >; - }; - main_uart0_pins_default: main-uart0-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */ @@ -264,22 +218,6 @@ >; }; - main_mmc0_pins_default: main-mmc0-default-pins { - pinctrl-single,pins = < - AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ - AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ - AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ - AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ - AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ - AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ - AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ - AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ - AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ - AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ - >; - }; - main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins = < AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ @@ -336,12 +274,6 @@ AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */ >; }; - - main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { - pinctrl-single,pins = < - AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ - >; - }; }; &mcu_pmx0 { @@ -475,12 +407,6 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - interrupt-parent = <&main_gpio1>; - interrupts = <23 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", "BT_EN_SOC", "MMC1_SD_EN", @@ -508,72 +434,6 @@ DRVDD-supply = <&vcc_3v3_sys>; DVDD-supply = <&buck5>; }; - - exp2: gpio@23 { - compatible = "ti,tca6424"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - - gpio-line-names = "", "", - "", "", - "", "", - "", "", - "WL_LT_EN", "CSI_RSTz", - "", "", - "", "", - "", "", - "SPI0_FET_SEL", "SPI0_FET_OE", - "RGMII2_BRD_CONN_DET", "CSI_SEL2", - "CSI_EN", "AUTO_100M_1000M_CONFIG", - "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST"; - }; - - sii9022: bridge-hdmi@3b { - compatible = "sil,sii9022"; - reg = <0x3b>; - interrupt-parent = <&exp1>; - interrupts = <16 IRQ_TYPE_EDGE_FALLING>; - #sound-dai-cells = <0>; - sil,i2s-data-lanes = < 0 >; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - sii9022_in: endpoint { - remote-endpoint = <&dpi1_out>; - }; - }; - - port@1 { - reg = <1>; - - sii9022_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; - }; - }; - }; -}; - -&main_i2c2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c2_pins_default>; - clock-frequency = <400000>; -}; - -&sdhci0 { - /* eMMC */ - status = "okay"; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&main_mmc0_pins_default>; - disable-wp; }; &sdhci1 { @@ -582,6 +442,7 @@ vmmc-supply = <&vdd_mmc1>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; }; @@ -683,20 +544,3 @@ tx-num-evt = <32>; rx-num-evt = <32>; }; - -&dss { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_dss0_pins_default>; -}; - -&dss_ports { - /* VP2: DPI Output */ - port@1 { - reg = <1>; - - dpi1_out: endpoint { - remote-endpoint = <&sii9022_in>; - }; - }; -}; diff --git a/arch/arm/dts/k3-am62a7.dtsi b/arch/arm/dts/k3-am62a7.dtsi index f86a23404e6..58f1c43edcf 100644 --- a/arch/arm/dts/k3-am62a7.dtsi +++ b/arch/arm/dts/k3-am62a7.dtsi @@ -1,10 +1,10 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for AM62A7 SoC family in Quad core configuration * * TRM: https://www.ti.com/lit/zip/spruj16 * - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi index 3c45782ab2b..19f57ead4eb 100644 --- a/arch/arm/dts/k3-am62x-sk-common.dtsi +++ b/arch/arm/dts/k3-am62x-sk-common.dtsi @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT +// SPDX-License-Identifier: GPL-2.0 /* * Common dtsi for AM62x SK and derivatives * - * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/ */ #include <dt-bindings/leds/common.h> @@ -399,18 +399,12 @@ }; }; -&main_i2c2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c2_pins_default>; - clock-frequency = <400000>; -}; - &sdhci0 { bootph-all; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc0_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; }; @@ -420,6 +414,7 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; + ti,driver-strength-ohm = <50>; disable-wp; }; @@ -458,7 +453,6 @@ }; &usbss0 { - bootph-all; status = "okay"; ti,vbus-divider; }; @@ -469,7 +463,6 @@ }; &usb0 { - bootph-all; #address-cells = <1>; #size-cells = <0>; usb-role-switch; @@ -524,12 +517,3 @@ }; }; }; - -/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ -&mcu_gpio0 { - status = "reserved"; -}; - -&mcu_gpio_intr { - status = "reserved"; -}; diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index e8020fec2dc..06db8659876 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-binman.dtsi" @@ -48,52 +48,6 @@ }; &binman { - tiboot3-j7200-hs-evm.bin { - filename = "tiboot3-j7200-hs-evm.bin"; - ti-secure-rom { - content = <&u_boot_spl_sr1>, <&ti_fs_enc_sr1>, <&combined_tifs_cfg_sr1>, - <&combined_dm_cfg_sr1>, <&sysfw_inner_cert_sr1>; - combined; - dm-data; - core-opts = <2>; - sysfw-inner-cert; - keyfile = "custMpk.pem"; - sw-rev = <1>; - content-sbl = <&u_boot_spl_sr1>; - content-sysfw = <&ti_fs_enc_sr1>; - content-sysfw-data = <&combined_tifs_cfg_sr1>; - content-sysfw-inner-cert = <&sysfw_inner_cert_sr1>; - content-dm-data = <&combined_dm_cfg_sr1>; - load = <0x41c00000>; - load-sysfw = <0x40000>; - load-sysfw-data = <0x7f000>; - load-dm-data = <0x41c80000>; - }; - u_boot_spl_sr1: u-boot-spl { - no-expanded; - }; - ti_fs_enc_sr1: ti-fs-enc.bin { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-enc.bin"; - type = "blob-ext"; - optional; - }; - combined_tifs_cfg_sr1: combined-tifs-cfg.bin { - filename = "combined-tifs-cfg.bin"; - type = "blob-ext"; - }; - sysfw_inner_cert_sr1: sysfw-inner-cert { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-cert.bin"; - type = "blob-ext"; - optional; - }; - combined_dm_cfg_sr1: combined-dm-cfg.bin { - filename = "combined-dm-cfg.bin"; - type = "blob-ext"; - }; - }; -}; - -&binman { tiboot3-j7200_sr2-hs-evm.bin { filename = "tiboot3-j7200_sr2-hs-evm.bin"; ti-secure-rom { @@ -139,53 +93,6 @@ }; &binman { - tiboot3-j7200-hs-fs-evm.bin { - filename = "tiboot3-j7200-hs-fs-evm.bin"; - ti-secure-rom { - content = <&u_boot_spl_fs_sr1>, <&ti_fs_enc_fs_sr1>, - <&combined_tifs_cfg_fs_sr1>, <&combined_dm_cfg_fs_sr1>, - <&sysfw_inner_cert_fs_sr1>; - combined; - dm-data; - core-opts = <2>; - sysfw-inner-cert; - keyfile = "custMpk.pem"; - sw-rev = <1>; - content-sbl = <&u_boot_spl_fs_sr1>; - content-sysfw = <&ti_fs_enc_fs_sr1>; - content-sysfw-data = <&combined_tifs_cfg_fs_sr1>; - content-sysfw-inner-cert = <&sysfw_inner_cert_fs_sr1>; - content-dm-data = <&combined_dm_cfg_fs_sr1>; - load = <0x41c00000>; - load-sysfw = <0x40000>; - load-sysfw-data = <0x7f000>; - load-dm-data = <0x41c80000>; - }; - u_boot_spl_fs_sr1: u-boot-spl { - no-expanded; - }; - ti_fs_enc_fs_sr1: ti-fs-enc.bin { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-enc.bin"; - type = "blob-ext"; - optional; - }; - combined_tifs_cfg_fs_sr1: combined-tifs-cfg.bin { - filename = "combined-tifs-cfg.bin"; - type = "blob-ext"; - }; - sysfw_inner_cert_fs_sr1: sysfw-inner-cert { - filename = "ti-sysfw/ti-fs-firmware-j7200-hs-fs-cert.bin"; - type = "blob-ext"; - optional; - }; - combined_dm_cfg_fs_sr1: combined-dm-cfg.bin { - filename = "combined-dm-cfg.bin"; - type = "blob-ext"; - }; - }; -}; - -&binman { tiboot3-j7200_sr2-hs-fs-evm.bin { filename = "tiboot3-j7200_sr2-hs-fs-evm.bin"; ti-secure-rom { diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi index 1514d897634..75a6e9599b9 100644 --- a/arch/arm/dts/k3-j721e-binman.dtsi +++ b/arch/arm/dts/k3-j721e-binman.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ */ #include "k3-binman.dtsi" @@ -130,94 +130,6 @@ }; &binman { - tiboot3-j721e_sr1_1-hs-fs-evm.bin { - filename = "tiboot3-j721e_sr1_1-hs-fs-evm.bin"; - ti-secure-rom { - content = <&u_boot_spl_fs_sr1_1>; - core = "public"; - core-opts = <2>; - load = <CONFIG_SPL_TEXT_BASE>; - keyfile = "custMpk.pem"; - }; - u_boot_spl_fs_sr1_1: u-boot-spl { - no-expanded; - }; - }; - sysfw_fs_sr1_1 { - filename = "sysfw.bin_fs_sr1_1"; - ti-fs-cert-fs.bin { - filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-cert.bin"; - type = "blob-ext"; - optional; - }; - ti-fs-firmware-j721e-hs-fs-enc.bin { - filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-fs-enc.bin"; - type = "blob-ext"; - optional; - }; - }; - itb_fs_sr1_1 { - filename = "sysfw-j721e_sr1_1-hs-fs-evm.itb"; - fit { - description = "SYSFW and Config fragments"; - #address-cells = <1>; - images { - sysfw.bin { - description = "sysfw"; - type = "firmware"; - arch = "arm"; - compression = "none"; - blob-ext { - filename = "sysfw.bin_fs_sr1_1"; - }; - }; - board-cfg.bin { - description = "board-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - board-cfg { - filename = "board-cfg.bin"; - type = "blob-ext"; - }; - - }; - pm-cfg.bin { - description = "pm-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - pm-cfg { - filename = "pm-cfg.bin"; - type = "blob-ext"; - }; - }; - rm-cfg.bin { - description = "rm-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - rm-cfg { - filename = "rm-cfg.bin"; - type = "blob-ext"; - }; - }; - sec-cfg.bin { - description = "sec-cfg"; - type = "firmware"; - arch = "arm"; - compression = "none"; - sec-cfg { - filename = "sec-cfg.bin"; - type = "blob-ext"; - }; - }; - }; - }; - }; -}; - -&binman { tiboot3-j721e_sr2-hs-fs-evm.bin { filename = "tiboot3-j721e_sr2-hs-fs-evm.bin"; ti-secure-rom { diff --git a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h b/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h deleted file mode 100644 index 683e3d412ce..00000000000 --- a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ -#ifndef ARCH_ADI_SC5XX_SC5XX_H -#define ARCH_ADI_SC5XX_SC5XX_H - -#include <linux/types.h> - -#define TWI0_CLKDIV 0x31001400 // TWI0 SCL Clock Divider Register -#define TWI1_CLKDIV 0x31001500 // TWI1 SCL Clock Divider Register -#define TWI2_CLKDIV 0x31001600 // TWI2 SCL Clock Divider Register - -const char *sc5xx_get_boot_mode(u32 *bmode); -void sc5xx_enable_rgmii(void); - -void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base); -void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end); -void sc5xx_enable_pmu(void); - -/** - * Per-SoC init function to be used to initialize hw-specific things. Examples: - * enable PMU on armv7, enable coresight timer on armv8, etc. - */ -void sc5xx_soc_init(void); - -/* - * Reconfigure SPI memory map region for OSPI use. The adi-spi3 driver - * does not use the memory map, while the OSPI driver requires it. Only - * available on sc59x and sc59x-64 - */ -void sc59x_remap_ospi(void); - -#endif diff --git a/arch/arm/include/asm/arch-adi/sc5xx/soc.h b/arch/arm/include/asm/arch-adi/sc5xx/soc.h deleted file mode 100644 index 430dbe2dae4..00000000000 --- a/arch/arm/include/asm/arch-adi/sc5xx/soc.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef BOARD_ADI_COMMON_SOC_H -#define BOARD_ADI_COMMON_SOC_H - -#include <phy.h> - -void fixup_dp83867_phy(struct phy_device *phydev); - -#endif diff --git a/arch/arm/include/asm/arch-adi/sc5xx/spl.h b/arch/arm/include/asm/arch-adi/sc5xx/spl.h deleted file mode 100644 index c215e6b892a..00000000000 --- a/arch/arm/include/asm/arch-adi/sc5xx/spl.h +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ -#ifndef ARCH_ADI_SC5XX_SPL_H -#define ARCH_ADI_SC5XX_SPL_H - -#include <linux/types.h> - -struct adi_boot_args { - phys_addr_t addr; - u32 flags; - u32 cmd; -}; - -extern u32 bmode; - -/** - * This table stores the arguments to the rom boot function per bootmode, - * and it is populated per SoC in the corresponding SoC support file (sc7x, sc58x, - * and so on). - */ -extern const struct adi_boot_args adi_rom_boot_args[8]; - -/** - * Struct layout for the boot config is also specific to an SoC, so you should - * only access it inside an SoC-specific boot hook function, which will be called - * from the boot rom while going from SPL to proper u-boot - */ -struct ADI_ROM_BOOT_CONFIG; -int32_t adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *cfg, int32_t cause); - -typedef void (*adi_rom_boot_fn)(void *address, uint32_t flags, int32_t count, - void *hook, uint32_t command); - -extern adi_rom_boot_fn adi_rom_boot; - -#endif diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h index 393bc7a6a8a..8e3d55f3e76 100644 --- a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h +++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h @@ -10,8 +10,6 @@ #ifndef __CLK_SYNTHESIZER_H #define __CLK_SYNTHESIZER_H -#include <linux/types.h> - #define CLK_SYNTHESIZER_ID_REG 0x0 #define CLK_SYNTHESIZER_XCSEL 0x05 #define CLK_SYNTHESIZER_MUX_REG 0x14 diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h index a415693de6e..50d6a6bc760 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h @@ -140,7 +140,6 @@ #define SCU_CLKDUTY_RGMII2TXCK_MASK (0x7f << SCU_CLKDUTY_RGMII2TXCK_SHIFT) #ifndef __ASSEMBLY__ -#include <linux/types.h> struct ast2500_clk_priv { struct ast2500_scu *scu; diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h index a2c8852db84..251bfa269bf 100644 --- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h @@ -125,8 +125,6 @@ #define SCU_MISC_CTRL1_UART5_DIV BIT(12) #ifndef __ASSEMBLY__ -#include <linux/types.h> - struct ast2600_scu { uint32_t prot_key1; /* 0x000 */ uint32_t chip_id1; /* 0x004 */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h index a02bec9371c..9e29350ca4b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h @@ -7,8 +7,6 @@ #ifndef __FSL_SERDES_H__ #define __FSL_SERDES_H__ -#include <linux/types.h> - #ifdef CONFIG_FSL_LSCH3 enum srds_prtcl { /* diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 147ca2f99de..9794db04499 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -6,7 +6,6 @@ #ifndef __ARCH_FSL_LSCH2_IMMAP_H__ #define __ARCH_FSL_LSCH2_IMMAP_H__ -#include <config.h> #include <fsl_immap.h> #ifndef __ASSEMBLY__ #include <linux/bitops.h> diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h b/arch/arm/include/asm/arch-imx8m/ddr.h index 1f81d91977c..c14855d177e 100644 --- a/arch/arm/include/asm/arch-imx8m/ddr.h +++ b/arch/arm/include/asm/arch-imx8m/ddr.h @@ -8,7 +8,7 @@ #include <asm/io.h> #include <asm/types.h> -#include <asm/arch/imx-regs.h> +#include <asm/arch/ddr.h> #define DDRC_DDR_SS_GPR0 0x3d000000 #define DDRC_IPS_BASE_ADDR_0 0x3f400000 diff --git a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h index 35e3ec7a987..9244e0a78fd 100644 --- a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h +++ b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h @@ -6,8 +6,6 @@ #ifndef __FSL_SERDES_H #define __FSL_SERDES_H -#include <linux/types.h> - enum srds_prtcl { /* * Nobody will check whether the device 'NONE' has been configured, diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 58013a85951..d585b5cf4b2 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -7,8 +7,6 @@ #ifndef __ASM_ARCH_CLOCK_H #define __ASM_ARCH_CLOCK_H -#include <stdbool.h> - #ifdef CONFIG_SYS_MX5_HCLK #define MXC_HCLK CONFIG_SYS_MX5_HCLK #else diff --git a/arch/arm/include/asm/arch-mx7/sys_proto.h b/arch/arm/include/asm/arch-mx7/sys_proto.h index 5da0037b2c6..634736cc09c 100644 --- a/arch/arm/include/asm/arch-mx7/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7/sys_proto.h @@ -7,8 +7,6 @@ #include <asm/mach-imx/sys_proto.h> -struct wdog_regs; - void set_wdog_reset(struct wdog_regs *wdog); #endif /* __SYS_PROTO_IMX7_ */ diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index e736772fda7..ecf3b4e7428 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -7,8 +7,6 @@ #ifndef _ASM_ARCH_BOOTROM_H #define _ASM_ARCH_BOOTROM_H -#include <linux/types.h> - /* * Saved Stack pointer address. * Access might be needed in some special cases. diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index 73e5283108b..f01c5aeb71c 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -6,8 +6,6 @@ #ifndef _ASM_ARCH_CLOCK_H #define _ASM_ARCH_CLOCK_H -#include <linux/types.h> - struct udevice; /* define pll mode */ diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h index f4bbc240131..a995bb950d9 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h @@ -5,8 +5,6 @@ #ifndef _ASM_ARCH_GRF_rk3308_H #define _ASM_ARCH_GRF_rk3308_H -#include <linux/kernel.h> - struct rk3308_grf { unsigned int gpio0a_iomux; unsigned int reserved0; diff --git a/arch/arm/include/asm/arch-sunxi/pmic_bus.h b/arch/arm/include/asm/arch-sunxi/pmic_bus.h index e26459fdd3b..5ab9b2809f2 100644 --- a/arch/arm/include/asm/arch-sunxi/pmic_bus.h +++ b/arch/arm/include/asm/arch-sunxi/pmic_bus.h @@ -8,8 +8,6 @@ #ifndef _SUNXI_PMIC_BUS_H #define _SUNXI_PMIC_BUS_H -#include <linux/types.h> - int pmic_bus_init(void); int pmic_bus_read(u8 reg, u8 *data); int pmic_bus_write(u8 reg, u8 data); diff --git a/arch/arm/include/asm/arch-sunxi/tve.h b/arch/arm/include/asm/arch-sunxi/tve.h index 4fbb4b91c86..46cd87e79e8 100644 --- a/arch/arm/include/asm/arch-sunxi/tve.h +++ b/arch/arm/include/asm/arch-sunxi/tve.h @@ -9,8 +9,6 @@ #ifndef _TVE_H #define _TVE_H -#include <linux/types.h> - enum tve_mode { tve_mode_vga, tve_mode_composite_pal, diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h index b922b2d30ea..78aeb25ac78 100644 --- a/arch/arm/include/asm/arch-tegra/ap.h +++ b/arch/arm/include/asm/arch-tegra/ap.h @@ -4,7 +4,6 @@ * NVIDIA Corporation <www.nvidia.com> */ #include <asm/types.h> -#include <asm/arch-tegra/tegra.h> /* Stabilization delays, in usec */ #define PLL_STABILIZATION_DELAY (300) diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h index d0ba83ae8bc..4e1da98d1f2 100644 --- a/arch/arm/include/asm/arch-tegra/cboot.h +++ b/arch/arm/include/asm/arch-tegra/cboot.h @@ -6,8 +6,6 @@ #ifndef _TEGRA_CBOOT_H_ #define _TEGRA_CBOOT_H_ -#include <linux/errno.h> -#include <linux/types.h> #include <net.h> #ifdef CONFIG_ARM64 diff --git a/arch/arm/include/asm/arch-tegra/gpio.h b/arch/arm/include/asm/arch-tegra/gpio.h index 3c1838cf137..fe7b3a50e0d 100644 --- a/arch/arm/include/asm/arch-tegra/gpio.h +++ b/arch/arm/include/asm/arch-tegra/gpio.h @@ -6,7 +6,6 @@ #ifndef _TEGRA_GPIO_H_ #define _TEGRA_GPIO_H_ -#include <linux/types.h> #include <dt-bindings/gpio/tegra-gpio.h> #define TEGRA_GPIOS_PER_PORT 8 diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h index dc8db391221..afec6bbdda3 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h @@ -10,7 +10,6 @@ #include <asm/io.h> #include <asm/types.h> -#include <asm/arch/tegra.h> struct udevice; diff --git a/arch/arm/include/asm/esr.h b/arch/arm/include/asm/esr.h index 99488730998..f19e4e726a1 100644 --- a/arch/arm/include/asm/esr.h +++ b/arch/arm/include/asm/esr.h @@ -7,7 +7,6 @@ #ifndef __ASM_ESR_H #define __ASM_ESR_H -#include <stdbool.h> #include <asm/memory.h> #include <linux/const.h> diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 45401d5e3c8..452bcd1b8fd 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -12,7 +12,6 @@ #include <config.h> #include <linux/types.h> -#include <asm/u-boot.h> /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/include/asm/mach-imx/gpio.h b/arch/arm/include/asm/mach-imx/gpio.h index 25763526f5f..1b7c9cd5249 100644 --- a/arch/arm/include/asm/mach-imx/gpio.h +++ b/arch/arm/include/asm/mach-imx/gpio.h @@ -9,8 +9,6 @@ #define __ASM_ARCH_IMX_GPIO_H #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) -#include <linux/types.h> - /* GPIO registers */ struct gpio_regs { u32 gpio_dr; /* data */ diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h b/arch/arm/include/asm/ti-common/davinci_nand.h index 84fe01e3b71..38a1a6ea0d7 100644 --- a/arch/arm/include/asm/ti-common/davinci_nand.h +++ b/arch/arm/include/asm/ti-common/davinci_nand.h @@ -9,7 +9,6 @@ #ifndef _DAVINCI_NAND_H_ #define _DAVINCI_NAND_H_ -#include <config.h> #include <asm/arch/hardware.h> #define NAND_READ_START 0x00 diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index 9afd8375999..181a8ac4c27 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -16,6 +16,7 @@ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> */ +#include <common.h> #include <linux/kbuild.h> #include <linux/arm-smccc.h> diff --git a/arch/arm/lib/bdinfo.c b/arch/arm/lib/bdinfo.c index 7c49462c8eb..b88b01eefdc 100644 --- a/arch/arm/lib/bdinfo.c +++ b/arch/arm/lib/bdinfo.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include <config.h> +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <asm/mach-types.h> diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index 2671f9a0ebf..29020bd1c6b 100644 --- a/arch/arm/lib/bootm-fdt.c +++ b/arch/arm/lib/bootm-fdt.c @@ -14,6 +14,7 @@ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) */ +#include <common.h> #include <fdt_support.h> #ifdef CONFIG_ARMV7_NONSEC #include <asm/armv7.h> diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 192c120a7d2..f30a483ed8b 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -11,6 +11,7 @@ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) */ +#include <common.h> #include <bootm.h> #include <bootstage.h> #include <command.h> diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 947012f2996..0893915b300 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include <common.h> #include <cpu_func.h> #include <log.h> #include <asm/global_data.h> diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c index 0afd3880447..d05314ee57f 100644 --- a/arch/arm/lib/cache-pl310.c +++ b/arch/arm/lib/cache-pl310.c @@ -9,6 +9,7 @@ #include <asm/armv7.h> #include <asm/pl310.h> #include <config.h> +#include <common.h> struct pl310_regs *const pl310 = (struct pl310_regs *)CFG_SYS_PL310_BASE; diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index b2ae74a59f1..7a160158671 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -6,7 +6,7 @@ /* for now: just dummy functions to satisfy the linker */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <log.h> #include <malloc.h> diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c index 5df5bc305a2..c905ecc4bd9 100644 --- a/arch/arm/lib/cmd_boot.c +++ b/arch/arm/lib/cmd_boot.c @@ -17,6 +17,7 @@ * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com> */ +#include <common.h> #include <command.h> /* diff --git a/arch/arm/lib/eabi_compat.c b/arch/arm/lib/eabi_compat.c index 0a96ba1355f..f7029918d4f 100644 --- a/arch/arm/lib/eabi_compat.c +++ b/arch/arm/lib/eabi_compat.c @@ -5,9 +5,7 @@ * (C) Copyright 2009 Wolfgang Denk <wd@denx.de> */ -#include <stdio.h> -#include <linux/stddef.h> -#include <linux/string.h> +#include <common.h> int raise (int signum) { diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index 2cc0a32f9d4..f4bbd21da91 100644 --- a/arch/arm/lib/gic-v3-its.c +++ b/arch/arm/lib/gic-v3-its.c @@ -2,6 +2,7 @@ /* * Copyright 2019 Broadcom. */ +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <asm/gic.h> diff --git a/arch/arm/lib/image.c b/arch/arm/lib/image.c index 1f672eee2c8..e394c1ad909 100644 --- a/arch/arm/lib/image.c +++ b/arch/arm/lib/image.c @@ -4,6 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include <common.h> #include <image.h> #include <mapmem.h> #include <asm/global_data.h> diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c index 333a5026a46..9961472f69f 100644 --- a/arch/arm/lib/interrupts.c +++ b/arch/arm/lib/interrupts.c @@ -18,6 +18,7 @@ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> */ +#include <common.h> #include <cpu_func.h> #include <efi_loader.h> #include <irq_func.h> diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c index b3024ba514e..125dc0bb390 100644 --- a/arch/arm/lib/interrupts_64.c +++ b/arch/arm/lib/interrupts_64.c @@ -4,6 +4,7 @@ * David Feng <fenghua@phytium.com.cn> */ +#include <common.h> #include <asm/esr.h> #include <asm/global_data.h> #include <asm/ptrace.h> diff --git a/arch/arm/lib/interrupts_m.c b/arch/arm/lib/interrupts_m.c index b977961bde8..277854aa878 100644 --- a/arch/arm/lib/interrupts_m.c +++ b/arch/arm/lib/interrupts_m.c @@ -4,10 +4,9 @@ * Kamil Lulko, <kamil.lulko@gmail.com> */ -#include <stdio.h> +#include <common.h> #include <cpu_func.h> #include <irq_func.h> -#include <vsprintf.h> /* * Upon exception entry ARMv7-M processors automatically save stack diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c index be800a3bc9e..903b3357048 100644 --- a/arch/arm/lib/psci-dt.c +++ b/arch/arm/lib/psci-dt.c @@ -3,6 +3,7 @@ * Copyright 2016 NXP Semiconductor, Inc. */ +#include <common.h> #include <asm/cache.h> #include <linux/libfdt.h> #include <fdt_support.h> diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c index c9796a4435c..3e051e36f12 100644 --- a/arch/arm/lib/reset.c +++ b/arch/arm/lib/reset.c @@ -20,6 +20,7 @@ * (C) Copyright 2004 Texas Insturments */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c index 4357acaef6c..b286bac9bf0 100644 --- a/arch/arm/lib/save_prev_bl_data.c +++ b/arch/arm/lib/save_prev_bl_data.c @@ -10,6 +10,7 @@ #include <fdtdec.h> #include <fdt_support.h> #include <fdt.h> +#include <common.h> #include <linux/errno.h> #include <asm/system.h> #include <asm/armv8/mmu.h> diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c index c43a63f1819..b13897495da 100644 --- a/arch/arm/lib/spl.c +++ b/arch/arm/lib/spl.c @@ -7,6 +7,7 @@ * Tom Rini <trini@ti.com> */ +#include <common.h> #include <config.h> #include <init.h> #include <log.h> diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c index ea1b937add7..656084c7e51 100644 --- a/arch/arm/lib/stack.c +++ b/arch/arm/lib/stack.c @@ -10,6 +10,7 @@ * Sysgo Real-Time Solutions, GmbH <www.elinos.com> * Marius Groeger <mgroeger@sysgo.de> */ +#include <common.h> #include <init.h> #include <lmb.h> #include <asm/global_data.h> diff --git a/arch/arm/lib/zimage.c b/arch/arm/lib/zimage.c index 51287251b3f..45e9c4506a9 100644 --- a/arch/arm/lib/zimage.c +++ b/arch/arm/lib/zimage.c @@ -6,6 +6,7 @@ * bootz code: * Copyright (C) 2012 Marek Vasut <marek.vasut@gmail.com> */ +#include <common.h> #include <image.h> #define LINUX_ARM_ZIMAGE_MAGIC 0x016f2818 diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c index 8bace3005eb..7a6151a9722 100644 --- a/arch/arm/mach-apple/board.c +++ b/arch/arm/mach-apple/board.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Mark Kettenis <kettenis@openbsd.org> */ +#include <common.h> #include <dm.h> #include <dm/uclass-internal.h> #include <efi_loader.h> diff --git a/arch/arm/mach-apple/rtkit.c b/arch/arm/mach-apple/rtkit.c index b8f4771e5e7..a550b553b66 100644 --- a/arch/arm/mach-apple/rtkit.c +++ b/arch/arm/mach-apple/rtkit.c @@ -4,14 +4,13 @@ * (C) Copyright 2021 Copyright The Asahi Linux Contributors */ +#include <common.h> #include <mailbox.h> #include <malloc.h> #include <asm/arch/rtkit.h> #include <linux/apple-mailbox.h> #include <linux/bitfield.h> -#include <linux/errno.h> -#include <linux/types.h> #define APPLE_RTKIT_EP_MGMT 0 #define APPLE_RTKIT_EP_CRASHLOG 1 diff --git a/arch/arm/mach-aspeed/ast2500/board_common.c b/arch/arm/mach-aspeed/ast2500/board_common.c index 531c2ad1562..bae10271844 100644 --- a/arch/arm/mach-aspeed/ast2500/board_common.c +++ b/arch/arm/mach-aspeed/ast2500/board_common.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2016 Google, Inc */ -#include <config.h> +#include <common.h> #include <dm.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c index 50d7f99b264..02bd3f67c96 100644 --- a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c +++ b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Google, Inc */ +#include <common.h> #include <dm.h> #include <asm/io.h> #include <asm/arch/scu_ast2500.h> diff --git a/arch/arm/mach-aspeed/ast2600/board_common.c b/arch/arm/mach-aspeed/ast2600/board_common.c index 4c0b705ea88..dc6cdc35d15 100644 --- a/arch/arm/mach-aspeed/ast2600/board_common.c +++ b/arch/arm/mach-aspeed/ast2600/board_common.c @@ -2,7 +2,7 @@ /* * Copyright (c) Aspeed Technology Inc. */ -#include <config.h> +#include <common.h> #include <dm.h> #include <ram.h> #include <timer.h> diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c index 05390c16f3a..0952e73a457 100644 --- a/arch/arm/mach-aspeed/ast2600/spl.c +++ b/arch/arm/mach-aspeed/ast2600/spl.c @@ -2,6 +2,7 @@ /* * Copyright (c) Aspeed Technology Inc. */ +#include <common.h> #include <debug_uart.h> #include <dm.h> #include <spl.h> diff --git a/arch/arm/mach-aspeed/ast_wdt.c b/arch/arm/mach-aspeed/ast_wdt.c index c420940d1cb..5bc442ef33c 100644 --- a/arch/arm/mach-aspeed/ast_wdt.c +++ b/arch/arm/mach-aspeed/ast_wdt.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Google, Inc */ +#include <common.h> #include <asm/io.h> #include <asm/arch/wdt.h> #include <linux/err.h> diff --git a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c index 459edadb587..c849885bc2b 100644 --- a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c +++ b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c @@ -10,6 +10,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/arm920t/clock.c b/arch/arm/mach-at91/arm920t/clock.c index ac55a61be64..09ac66d619d 100644 --- a/arch/arm/mach-at91/arm920t/clock.c +++ b/arch/arm/mach-at91/arm920t/clock.c @@ -7,7 +7,7 @@ * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> */ -#include <config.h> +#include <common.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c index 579e76b339d..9bf03fd68ec 100644 --- a/arch/arm/mach-at91/arm920t/cpu.c +++ b/arch/arm/mach-at91/arm920t/cpu.c @@ -10,7 +10,7 @@ * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> */ -#include <config.h> +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-at91/arm920t/reset.c b/arch/arm/mach-at91/arm920t/reset.c index 7582cef417f..91e375146ad 100644 --- a/arch/arm/mach-at91/arm920t/reset.c +++ b/arch/arm/mach-at91/arm920t/reset.c @@ -13,6 +13,7 @@ * Alex Zuepke <azu@sysgo.de> */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c index f7b4116344c..8ef5764e315 100644 --- a/arch/arm/mach-at91/arm920t/timer.c +++ b/arch/arm/mach-at91/arm920t/timer.c @@ -13,7 +13,7 @@ * Alex Zuepke <azu@sysgo.de> */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c index 201c99ade4e..c10571fa28a 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <dm.h> #include <asm/io.h> #include <asm/arch/at91sam9260_matrix.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c index b8d209cbec8..0c2b9f2ecc9 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c index 1749662dae9..3b8a4623866 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c @@ -9,6 +9,7 @@ * esd electronic system design gmbh <www.esd.eu> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c index 4c481484c3d..d517810c991 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <dm.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c index 4dc6e51aba8..9f98ce7a45c 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c @@ -4,6 +4,7 @@ * Josh Wu <josh.wu@atmel.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pio.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c index 4f5bafb8c2e..b4002eb7504 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c @@ -5,6 +5,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c index 40c8a58b563..f44760bed31 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Atmel Corporation */ +#include <common.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c index 241de6a5378..013daf43b74 100644 --- a/arch/arm/mach-at91/arm926ejs/clock.c +++ b/arch/arm/mach-at91/arm926ejs/clock.c @@ -7,8 +7,7 @@ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> */ -#include <config.h> -#include <time.h> +#include <common.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-at91/arm926ejs/cpu.c b/arch/arm/mach-at91/arm926ejs/cpu.c index e476cd5bcf3..5e84b0a40e1 100644 --- a/arch/arm/mach-at91/arm926ejs/cpu.c +++ b/arch/arm/mach-at91/arm926ejs/cpu.c @@ -6,7 +6,7 @@ * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> */ -#include <config.h> +#include <common.h> #include <init.h> #include <vsprintf.h> #include <asm/io.h> diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c index bb66700566e..aade13cc014 100644 --- a/arch/arm/mach-at91/arm926ejs/eflash.c +++ b/arch/arm/mach-at91/arm926ejs/eflash.c @@ -42,6 +42,7 @@ * someone puts a jffs2 into them) * do a read-modify-write for partially programmed pages */ +#include <common.h> #include <display_options.h> #include <flash.h> #include <log.h> diff --git a/arch/arm/mach-at91/arm926ejs/reset.c b/arch/arm/mach-at91/arm926ejs/reset.c index 01b2663f96c..6acbfa33011 100644 --- a/arch/arm/mach-at91/arm926ejs/reset.c +++ b/arch/arm/mach-at91/arm926ejs/reset.c @@ -5,6 +5,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c index 97c572deaaf..e3d3dd880ca 100644 --- a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c +++ b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries */ +#include <common.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> diff --git a/arch/arm/mach-at91/arm926ejs/timer.c b/arch/arm/mach-at91/arm926ejs/timer.c index 137a5e5b8fd..a8cf0e4bd79 100644 --- a/arch/arm/mach-at91/arm926ejs/timer.c +++ b/arch/arm/mach-at91/arm926ejs/timer.c @@ -5,6 +5,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c index 5357b4cffc2..6bfa02d1d0a 100644 --- a/arch/arm/mach-at91/armv7/clock.c +++ b/arch/arm/mach-at91/armv7/clock.c @@ -9,7 +9,7 @@ * Copyright (C) 2015 Wenyou Yang <wenyou.yang@atmel.com> */ -#include <config.h> +#include <common.h> #include <asm/global_data.h> #include <linux/delay.h> #include <linux/errno.h> diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c index f4b2f4f351c..5ea7e2609f5 100644 --- a/arch/arm/mach-at91/armv7/cpu.c +++ b/arch/arm/mach-at91/armv7/cpu.c @@ -8,7 +8,7 @@ * Bo Shen <voice.shen@atmel.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <init.h> #include <vsprintf.h> diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c index 469c2211766..edc20574c31 100644 --- a/arch/arm/mach-at91/armv7/sama5d2_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c @@ -4,6 +4,7 @@ * Wenyou Yang <wenyou.yang@atmel.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/clk.h> #include <asm/arch/sama5d2.h> diff --git a/arch/arm/mach-at91/armv7/sama5d3_devices.c b/arch/arm/mach-at91/armv7/sama5d3_devices.c index 67b63208eda..04b700a94d7 100644 --- a/arch/arm/mach-at91/armv7/sama5d3_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d3_devices.c @@ -4,6 +4,7 @@ * Bo Shen <voice.shen@atmel.com> */ +#include <common.h> #include <asm/arch/sama5d3.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index 76fff9cd466..e68ae994078 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -4,6 +4,7 @@ * Bo Shen <voice.shen@atmel.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-at91/armv7/timer.c b/arch/arm/mach-at91/armv7/timer.c index bfdb75ce39a..1f54c5dcad9 100644 --- a/arch/arm/mach-at91/armv7/timer.c +++ b/arch/arm/mach-at91/armv7/timer.c @@ -8,6 +8,7 @@ * Bo Shen <voice.shen@atmel.com> */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c index 019ef930022..62108d2bd0a 100644 --- a/arch/arm/mach-at91/atmel_sfr.c +++ b/arch/arm/mach-at91/atmel_sfr.c @@ -4,7 +4,7 @@ * Wenyou Yang <wenyou.yang@atmel.com> */ -#include <config.h> +#include <common.h> #include <asm/hardware.h> #include <asm/io.h> #include <asm/arch/at91_sfr.h> diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 442b822fe77..8344daeb39a 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -4,8 +4,8 @@ * Wenyou Yang <wenyou.yang@atmel.com> */ +#include <common.h> #include <dm.h> -#include <time.h> #include <wdt.h> #include <asm/io.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h index 683e539b1b3..f7b411cf7df 100644 --- a/arch/arm/mach-at91/include/mach/at91_common.h +++ b/arch/arm/mach-at91/include/mach/at91_common.h @@ -8,8 +8,6 @@ #ifndef AT91_COMMON_H #define AT91_COMMON_H -#include <linux/types.h> - void at91_can_hw_init(void); void at91_gmac_hw_init(void); void at91_macb_hw_init(void); diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index 3bef5648d4a..2fa8493a0bd 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -4,6 +4,7 @@ * Wenyou Yang <wenyou.yang@atmel.com> */ +#include <common.h> #include <asm/hardware.h> #include <asm/io.h> #include <asm/arch/sama5_matrix.h> diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c index ac6a719d9c0..5422c05456e 100644 --- a/arch/arm/mach-at91/mpddrc.c +++ b/arch/arm/mach-at91/mpddrc.c @@ -7,6 +7,7 @@ * Wenyou Yang <wenyou.yang@atmel.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/atmel_mpddrc.h> #include <asm/arch/at91_common.h> diff --git a/arch/arm/mach-at91/phy.c b/arch/arm/mach-at91/phy.c index ec38f5bc931..f4484a77c7d 100644 --- a/arch/arm/mach-at91/phy.c +++ b/arch/arm/mach-at91/phy.c @@ -11,7 +11,7 @@ * Copyright (C) 2013 DENX Software Engineering, hs@denx.de */ -#include <time.h> +#include <common.h> #include <asm/hardware.h> #include <asm/io.h> #include <linux/delay.h> diff --git a/arch/arm/mach-at91/sdram.c b/arch/arm/mach-at91/sdram.c index be3e91c7dba..6638aa82bb6 100644 --- a/arch/arm/mach-at91/sdram.c +++ b/arch/arm/mach-at91/sdram.c @@ -9,6 +9,7 @@ * Lead Tech Design <www.leadtechdesign.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91sam9_sdramc.h> diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c index 5feb8f73551..8d537998c98 100644 --- a/arch/arm/mach-at91/spl.c +++ b/arch/arm/mach-at91/spl.c @@ -4,6 +4,7 @@ * Bo Shen <voice.shen@atmel.com> */ +#include <common.h> #include <hang.h> #include <asm/io.h> #include <asm/arch/at91_common.h> diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c index cde1700a283..dfba9f730c1 100644 --- a/arch/arm/mach-at91/spl_at91.c +++ b/arch/arm/mach-at91/spl_at91.c @@ -8,7 +8,7 @@ * Bo Shen <voice.shen@atmel.com> */ -#include <config.h> +#include <common.h> #include <hang.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c index 62a7df8a195..a30c4f6c075 100644 --- a/arch/arm/mach-at91/spl_atmel.c +++ b/arch/arm/mach-at91/spl_atmel.c @@ -4,7 +4,7 @@ * Bo Shen <voice.shen@atmel.com> */ -#include <config.h> +#include <common.h> #include <hang.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c index 1b459707bc6..016bc1eb412 100644 --- a/arch/arm/mach-bcm283x/init.c +++ b/arch/arm/mach-bcm283x/init.c @@ -6,6 +6,7 @@ * project. */ +#include <common.h> #include <cpu_func.h> #include <init.h> #include <dm/device.h> diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c index c7cbfa72ffc..da9faafe1dd 100644 --- a/arch/arm/mach-bcm283x/mbox.c +++ b/arch/arm/mach-bcm283x/mbox.c @@ -3,9 +3,9 @@ * (C) Copyright 2012 Stephen Warren */ +#include <common.h> #include <cpu_func.h> #include <log.h> -#include <time.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch/base.h> diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c index 4993c0bdb81..2188b38d84b 100644 --- a/arch/arm/mach-bcm283x/msg.c +++ b/arch/arm/mach-bcm283x/msg.c @@ -3,6 +3,7 @@ * (C) Copyright 2012 Stephen Warren */ +#include <common.h> #include <memalign.h> #include <phys2bus.h> #include <asm/arch/mbox.h> diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c index 9199234917f..f13ac0c6375 100644 --- a/arch/arm/mach-bcm283x/reset.c +++ b/arch/arm/mach-bcm283x/reset.c @@ -6,7 +6,7 @@ * project. */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <asm/arch/base.h> diff --git a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c index ca403bae991..5ab04083cc6 100644 --- a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c index b11effe0667..52a53a2c76d 100644 --- a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c index a883e74ac00..c6b7a54fbdf 100644 --- a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-bcmbca/bcm63158/mmu_table.c b/arch/arm/mach-bcmbca/bcm63158/mmu_table.c index eb3cc3e5aec..fe7efb30e22 100644 --- a/arch/arm/mach-bcmbca/bcm63158/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm63158/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c index 458624e87aa..eb736bf7d50 100644 --- a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c index 83c07727573..8e53b4929eb 100644 --- a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-bcmbca/bcm6858/mmu_table.c b/arch/arm/mach-bcmbca/bcm6858/mmu_table.c index 82aba326dcb..898291075f5 100644 --- a/arch/arm/mach-bcmbca/bcm6858/mmu_table.c +++ b/arch/arm/mach-bcmbca/bcm6858/mmu_table.c @@ -2,6 +2,7 @@ /* * Copyright 2022 Broadcom Ltd. */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index 7c0a2638977..dae60262f5b 100644 --- a/arch/arm/mach-davinci/cpu.c +++ b/arch/arm/mach-davinci/cpu.c @@ -4,7 +4,7 @@ * Copyright (C) 2009 David Brownell */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <init.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c index 936b5e11667..08c8f592524 100644 --- a/arch/arm/mach-davinci/da850_lowlevel.c +++ b/arch/arm/mach-davinci/da850_lowlevel.c @@ -5,7 +5,7 @@ * Copyright (C) 2011 * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ -#include <config.h> +#include <common.h> #include <init.h> #include <nand.h> #include <ns16550.h> diff --git a/arch/arm/mach-davinci/da850_pinmux.c b/arch/arm/mach-davinci/da850_pinmux.c index 4ee3cd0d5b3..f2536c8dd6d 100644 --- a/arch/arm/mach-davinci/da850_pinmux.c +++ b/arch/arm/mach-davinci/da850_pinmux.c @@ -5,6 +5,7 @@ * Copyright (C) 2011 OMICRON electronics GmbH */ +#include <common.h> #include <asm/arch/davinci_misc.h> #include <asm/arch/hardware.h> #include <asm/arch/pinmux_defs.h> diff --git a/arch/arm/mach-davinci/include/mach/davinci_misc.h b/arch/arm/mach-davinci/include/mach/davinci_misc.h index 0d0ad1e593e..1133a23bdee 100644 --- a/arch/arm/mach-davinci/include/mach/davinci_misc.h +++ b/arch/arm/mach-davinci/include/mach/davinci_misc.h @@ -6,7 +6,6 @@ #ifndef __MISC_H #define __MISC_H -#include <linux/types.h> #include <asm/arch/hardware.h> /* pin muxer definitions */ diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c index 6c97e5810cd..cfad28c43d0 100644 --- a/arch/arm/mach-davinci/misc.c +++ b/arch/arm/mach-davinci/misc.c @@ -8,7 +8,7 @@ * Copyright (C) 2004 Texas Instruments. */ -#include <config.h> +#include <common.h> #include <env.h> #include <i2c.h> #include <init.h> diff --git a/arch/arm/mach-davinci/pinmux.c b/arch/arm/mach-davinci/pinmux.c index 5ecb434b03b..7904257b4a4 100644 --- a/arch/arm/mach-davinci/pinmux.c +++ b/arch/arm/mach-davinci/pinmux.c @@ -8,6 +8,7 @@ * Copyright (C) 2004 Texas Instruments. */ +#include <common.h> #include <asm/arch/hardware.h> #include <asm/io.h> #include <asm/arch/davinci_misc.h> diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 90b817860a6..dae10aa03bb 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -7,6 +7,7 @@ * Copyright (C) 2004 Texas Instruments. */ +#include <common.h> #include <asm/arch/hardware.h> #include <asm/io.h> diff --git a/arch/arm/mach-davinci/reset.c b/arch/arm/mach-davinci/reset.c index e3e2c56a676..0d59eb6e3ce 100644 --- a/arch/arm/mach-davinci/reset.c +++ b/arch/arm/mach-davinci/reset.c @@ -6,6 +6,7 @@ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <asm/arch/timer_defs.h> diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c index 8c6cf9c2192..5f5b9ebbf97 100644 --- a/arch/arm/mach-davinci/spl.c +++ b/arch/arm/mach-davinci/spl.c @@ -3,10 +3,12 @@ * Copyright (C) 2011 * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ +#include <common.h> #include <config.h> #include <hang.h> #include <init.h> #include <spl.h> +#include <asm/u-boot.h> #include <asm/utils.h> #include <nand.h> #include <asm/arch/dm365_lowlevel.h> diff --git a/arch/arm/mach-davinci/timer.c b/arch/arm/mach-davinci/timer.c index f2990f71877..83c190b620e 100644 --- a/arch/arm/mach-davinci/timer.c +++ b/arch/arm/mach-davinci/timer.c @@ -20,7 +20,7 @@ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index ee71b95237d..f91f2ee862d 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c @@ -4,10 +4,9 @@ * Minkyu Kang <mk7.kang@samsung.com> */ +#include <common.h> #include <clock_legacy.h> #include <log.h> -#include <time.h> -#include <mach/cpu.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-exynos/clock_init_exynos4.c b/arch/arm/mach-exynos/clock_init_exynos4.c index 95ed1956a07..584e4bac09f 100644 --- a/arch/arm/mach-exynos/clock_init_exynos4.c +++ b/arch/arm/mach-exynos/clock_init_exynos4.c @@ -23,6 +23,7 @@ * MA 02111-1307 USA */ +#include <common.h> #include <config.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-exynos/clock_init_exynos5.c b/arch/arm/mach-exynos/clock_init_exynos5.c index 232a2482dc6..1cb8d391e7c 100644 --- a/arch/arm/mach-exynos/clock_init_exynos5.c +++ b/arch/arm/mach-exynos/clock_init_exynos5.c @@ -5,6 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ +#include <common.h> #include <config.h> #include <asm/io.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h index 4f56160ee50..d7f02231fdf 100644 --- a/arch/arm/mach-exynos/common_setup.h +++ b/arch/arm/mach-exynos/common_setup.h @@ -23,8 +23,6 @@ * MA 02111-1307 USA */ -#include <linux/types.h> -#include <mach/cpu.h> #include <asm/arch/system.h> #define DMC_OFFSET 0x10000 diff --git a/arch/arm/mach-exynos/dmc_common.c b/arch/arm/mach-exynos/dmc_common.c index a96ded443b9..44923dd5520 100644 --- a/arch/arm/mach-exynos/dmc_common.c +++ b/arch/arm/mach-exynos/dmc_common.c @@ -5,7 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ -#include <linux/types.h> +#include <common.h> #include <asm/arch/spl.h> #include "clock_init.h" diff --git a/arch/arm/mach-exynos/dmc_init_ddr3.c b/arch/arm/mach-exynos/dmc_init_ddr3.c index 193de4c3a59..cad8ccc5315 100644 --- a/arch/arm/mach-exynos/dmc_init_ddr3.c +++ b/arch/arm/mach-exynos/dmc_init_ddr3.c @@ -5,6 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ +#include <common.h> #include <config.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-exynos/exynos5_setup.h b/arch/arm/mach-exynos/exynos5_setup.h index 4e508edba0c..e9874a8c1b2 100644 --- a/arch/arm/mach-exynos/exynos5_setup.h +++ b/arch/arm/mach-exynos/exynos5_setup.h @@ -8,7 +8,6 @@ #ifndef _SMDK5250_SETUP_H #define _SMDK5250_SETUP_H -#include <linux/types.h> #include <asm/arch/dmc.h> #define NOT_AVAILABLE 0 diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h index 757e1586bde..a3d8974dcb5 100644 --- a/arch/arm/mach-exynos/include/mach/power.h +++ b/arch/arm/mach-exynos/include/mach/power.h @@ -8,8 +8,6 @@ #define __ASM_ARM_ARCH_POWER_H_ #ifndef __ASSEMBLY__ -#include <linux/types.h> - struct exynos4_power { unsigned int om_stat; unsigned char res1[0x8]; diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 0967ab995a9..c57b8aee798 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -23,6 +23,7 @@ * MA 02111-1307 USA */ +#include <common.h> #include <config.h> #include <debug_uart.h> #include <asm/system.h> diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c index e2f32547adf..30e522804fb 100644 --- a/arch/arm/mach-exynos/mmu-arm64.c +++ b/arch/arm/mach-exynos/mmu-arm64.c @@ -4,6 +4,7 @@ * Thomas Abraham <thomas.ab@samsung.com> */ +#include <common.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c index 4061dd4aafa..ad3fbf2da7a 100644 --- a/arch/arm/mach-exynos/pinmux.c +++ b/arch/arm/mach-exynos/pinmux.c @@ -4,6 +4,7 @@ * Abhilash Kesavan <a.kesavan@samsung.com> */ +#include <common.h> #include <fdtdec.h> #include <log.h> #include <asm/gpio.h> diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c index 599d3ccff60..f2a6c00dd62 100644 --- a/arch/arm/mach-exynos/power.c +++ b/arch/arm/mach-exynos/power.c @@ -4,7 +4,7 @@ * Donghwa Lee <dh09.lee@samsung.com> */ -#include <mach/cpu.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/power.h> diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index be18f181a7a..aff2b5e1b6e 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -4,6 +4,7 @@ * Minkyu Kang <mk7.kang@samsung.com> */ +#include <common.h> #include <cpu_func.h> #include <asm/cache.h> #include <asm/io.h> diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c index bd5a06447b9..553dac75b61 100644 --- a/arch/arm/mach-exynos/spl_boot.c +++ b/arch/arm/mach-exynos/spl_boot.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Samsung Electronics */ +#include <common.h> #include <config.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-exynos/system.c b/arch/arm/mach-exynos/system.c index f5090613c0d..12d0d8fd34a 100644 --- a/arch/arm/mach-exynos/system.c +++ b/arch/arm/mach-exynos/system.c @@ -4,7 +4,7 @@ * Donghwa Lee <dh09.lee@samsung.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/system.h> diff --git a/arch/arm/mach-exynos/tzpc.c b/arch/arm/mach-exynos/tzpc.c index 320a0cf3513..abe8e7f4589 100644 --- a/arch/arm/mach-exynos/tzpc.c +++ b/arch/arm/mach-exynos/tzpc.c @@ -5,7 +5,7 @@ * Copyright (C) 2012 Samsung Electronics */ -#include <mach/cpu.h> +#include <common.h> #include <asm/arch/tzpc.h> #include <asm/io.h> diff --git a/arch/arm/mach-highbank/timer.c b/arch/arm/mach-highbank/timer.c index 32ec6f0ac0e..2423a0e3785 100644 --- a/arch/arm/mach-highbank/timer.c +++ b/arch/arm/mach-highbank/timer.c @@ -5,6 +5,7 @@ * Based on arm926ejs/mx27/timer.c */ +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/arch-armv7/systimer.h> diff --git a/arch/arm/mach-histb/board_common.c b/arch/arm/mach-histb/board_common.c index 84d02c9aca2..a26c2066e02 100644 --- a/arch/arm/mach-histb/board_common.c +++ b/arch/arm/mach-histb/board_common.c @@ -5,6 +5,7 @@ * (C) Copyright 2023 Yang Xiwen <forbidden405@outlook.com> */ +#include <common.h> #include <fdtdec.h> #include <init.h> #include <asm/system.h> diff --git a/arch/arm/mach-histb/sysmap-histb.c b/arch/arm/mach-histb/sysmap-histb.c index 76414558379..83a2bb94179 100644 --- a/arch/arm/mach-histb/sysmap-histb.c +++ b/arch/arm/mach-histb/sysmap-histb.c @@ -5,6 +5,7 @@ * (C) Copyright 2023 Yang Xiwen <forbidden405@outlook.com> */ +#include <common.h> #include <asm/armv8/mmu.h> static struct mm_region histb_mem_map[] = { diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c index b368db49fce..ab9b621a2a6 100644 --- a/arch/arm/mach-imx/cache.c +++ b/arch/arm/mach-imx/cache.c @@ -3,7 +3,7 @@ * Copyright 2015 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <asm/armv7.h> #include <asm/cache.h> diff --git a/arch/arm/mach-imx/cmd_bmode.c b/arch/arm/mach-imx/cmd_bmode.c index c20e80725f8..5b2f4686230 100644 --- a/arch/arm/mach-imx/cmd_bmode.c +++ b/arch/arm/mach-imx/cmd_bmode.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2012 Boundary Devices Inc. */ +#include <common.h> #include <linux/errno.h> #include <asm/io.h> #include <asm/mach-imx/boot_mode.h> diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c index c7962ead2d5..2f389dbe8df 100644 --- a/arch/arm/mach-imx/cmd_dek.c +++ b/arch/arm/mach-imx/cmd_dek.c @@ -6,7 +6,7 @@ * Command for encapsulating DEK blob */ -#include <config.h> +#include <common.h> #include <command.h> #include <log.h> #include <malloc.h> @@ -17,7 +17,6 @@ #include <asm/arch/clock.h> #include <mapmem.h> #include <tee.h> -#include <vsprintf.h> #ifdef CONFIG_IMX_SECO_DEK_ENCAP #include <imx_container.h> #include <firmware/imx/sci/sci.h> diff --git a/arch/arm/mach-imx/cmd_hdmidet.c b/arch/arm/mach-imx/cmd_hdmidet.c index 8104ab26b08..e2571adfb00 100644 --- a/arch/arm/mach-imx/cmd_hdmidet.c +++ b/arch/arm/mach-imx/cmd_hdmidet.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2012 Boundary Devices Inc. */ +#include <common.h> #include <command.h> #include <asm/arch/imx-regs.h> #include <asm/arch/mxc_hdmi.h> diff --git a/arch/arm/mach-imx/cmd_mfgprot.c b/arch/arm/mach-imx/cmd_mfgprot.c index 9925c992268..9576b48dde3 100644 --- a/arch/arm/mach-imx/cmd_mfgprot.c +++ b/arch/arm/mach-imx/cmd_mfgprot.c @@ -11,7 +11,7 @@ #include <asm/arch/clock.h> #include <linux/compiler.h> #include <command.h> -#include <config.h> +#include <common.h> #include <env.h> #include <fsl_sec.h> #include <mapmem.h> diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index c2e452b6927..70a213a49dd 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <command.h> #include <log.h> #include <malloc.h> diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index ceee31eecd7..488638c9058 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -7,6 +7,7 @@ */ #include <bootm.h> +#include <common.h> #include <dm.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c b/arch/arm/mach-imx/ddrmc-vf610-calibration.c index 2cf684322ea..7d787d04598 100644 --- a/arch/arm/mach-imx/ddrmc-vf610-calibration.c +++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c @@ -7,6 +7,7 @@ * */ /* #define DEBUG */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c index e449fa6f552..7895ee66f8a 100644 --- a/arch/arm/mach-imx/ddrmc-vf610.c +++ b/arch/arm/mach-imx/ddrmc-vf610.c @@ -6,6 +6,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/iomux-vf610.h> diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c index c13d9f0e00e..d02316ed6cb 100644 --- a/arch/arm/mach-imx/ele_ahab.c +++ b/arch/arm/mach-imx/ele_ahab.c @@ -3,6 +3,7 @@ * Copyright 2022 NXP */ +#include <common.h> #include <command.h> #include <errno.h> #include <imx_container.h> diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index 85d90686f68..27e053ef701 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -3,6 +3,7 @@ * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. */ +#include <common.h> #include <command.h> #include <config.h> #include <display_options.h> diff --git a/arch/arm/mach-imx/i2c-mxv7.c b/arch/arm/mach-imx/i2c-mxv7.c index 256db150818..a5866cf9f70 100644 --- a/arch/arm/mach-imx/i2c-mxv7.c +++ b/arch/arm/mach-imx/i2c-mxv7.c @@ -2,8 +2,8 @@ /* * Copyright (C) 2012 Boundary Devices Inc. */ +#include <common.h> #include <malloc.h> -#include <time.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> #include <linux/delay.h> diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c index e2388e3fef8..35da0ae0425 100644 --- a/arch/arm/mach-imx/image-container.c +++ b/arch/arm/mach-imx/image-container.c @@ -3,7 +3,7 @@ * Copyright 2019 NXP */ -#include <config.h> +#include <common.h> #include <errno.h> #include <imx_container.h> #include <log.h> diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c index ed44df394b1..1c072f6af11 100644 --- a/arch/arm/mach-imx/imx8/ahab.c +++ b/arch/arm/mach-imx/imx8/ahab.c @@ -3,6 +3,7 @@ * Copyright 2018-2019, 2022 NXP */ +#include <common.h> #include <command.h> #include <errno.h> #include <imx_container.h> diff --git a/arch/arm/mach-imx/imx8/clock.c b/arch/arm/mach-imx/imx8/clock.c index 4e49b5bf375..9941b57b4be 100644 --- a/arch/arm/mach-imx/imx8/clock.c +++ b/arch/arm/mach-imx/imx8/clock.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include <common.h> #include <asm/global_data.h> #include <linux/errno.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 627baa1d83f..6e643188f40 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -3,6 +3,7 @@ * Copyright 2018, 2021 NXP */ +#include <common.h> #include <clk.h> #include <cpu.h> #include <cpu_func.h> diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c index 6d0585f5cc6..c2bed3e0c1f 100644 --- a/arch/arm/mach-imx/imx8/fdt.c +++ b/arch/arm/mach-imx/imx8/fdt.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include <common.h> #include <log.h> #include <firmware/imx/sci/sci.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c index 3e27d75827a..e4f7651bd1d 100644 --- a/arch/arm/mach-imx/imx8/iomux.c +++ b/arch/arm/mach-imx/imx8/iomux.c @@ -3,6 +3,7 @@ * Copyright 2018 NXP */ +#include <common.h> #include <log.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c index c77104d0338..0ce3036818b 100644 --- a/arch/arm/mach-imx/imx8/misc.c +++ b/arch/arm/mach-imx/imx8/misc.c @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ +#include <common.h> #include <log.h> #include <firmware/imx/sci/sci.h> #include <asm/mach-imx/sys_proto.h> diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c index f13dfc15516..1eaa68f8d5f 100644 --- a/arch/arm/mach-imx/imx8/snvs_security_sc.c +++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c @@ -14,6 +14,7 @@ #include <command.h> #include <log.h> #include <stddef.h> +#include <common.h> #include <firmware/imx/sci/sci.h> #include <asm/arch-imx8/imx8-pins.h> #include <asm/arch-imx8/snvs_security_sc.h> diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index de630e940c9..47219957b58 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -5,6 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ +#include <common.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 7e6c3748716..9db62b944e4 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -5,6 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ +#include <common.h> #include <command.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/imx8m/clock_slice.c b/arch/arm/mach-imx/imx8m/clock_slice.c index 7cfdc46d349..b5ed27a923e 100644 --- a/arch/arm/mach-imx/imx8m/clock_slice.c +++ b/arch/arm/mach-imx/imx8m/clock_slice.c @@ -5,6 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ +#include <common.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/imx8m/psci.c b/arch/arm/mach-imx/imx8m/psci.c index f5644c642bd..62f0b768cfa 100644 --- a/arch/arm/mach-imx/imx8m/psci.c +++ b/arch/arm/mach-imx/imx8m/psci.c @@ -10,6 +10,7 @@ #include <asm/io.h> #include <asm/psci.h> #include <asm/secure.h> +#include <common.h> #include <cpu_func.h> #include <debug_uart.h> #include <fsl_wdog.h> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index be38ca52885..0c49fb9cd48 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -5,7 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <event.h> #include <init.h> diff --git a/arch/arm/mach-imx/imx8ulp/cgc.c b/arch/arm/mach-imx/imx8ulp/cgc.c index f9d8ed5b048..d2fadb4877c 100644 --- a/arch/arm/mach-imx/imx8ulp/cgc.c +++ b/arch/arm/mach-imx/imx8ulp/cgc.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP */ +#include <common.h> #include <div64.h> #include <asm/io.h> #include <errno.h> diff --git a/arch/arm/mach-imx/imx8ulp/clock.c b/arch/arm/mach-imx/imx8ulp/clock.c index fadf165ece2..36d12943a05 100644 --- a/arch/arm/mach-imx/imx8ulp/clock.c +++ b/arch/arm/mach-imx/imx8ulp/clock.c @@ -3,6 +3,7 @@ * Copyright 2020 NXP */ +#include <common.h> #include <command.h> #include <div64.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/imx8ulp/iomux.c b/arch/arm/mach-imx/imx8ulp/iomux.c index 43f856bf732..c6d20f54680 100644 --- a/arch/arm/mach-imx/imx8ulp/iomux.c +++ b/arch/arm/mach-imx/imx8ulp/iomux.c @@ -3,6 +3,7 @@ * Copyright 2020-2021 NXP */ +#include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/iomux.h> diff --git a/arch/arm/mach-imx/imx8ulp/pcc.c b/arch/arm/mach-imx/imx8ulp/pcc.c index 449e496521f..e3c6d6760be 100644 --- a/arch/arm/mach-imx/imx8ulp/pcc.c +++ b/arch/arm/mach-imx/imx8ulp/pcc.c @@ -3,6 +3,7 @@ * Copyright 2021 NXP */ +#include <common.h> #include <div64.h> #include <asm/io.h> #include <errno.h> diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c index ca657748ed9..cfc09e79cbd 100644 --- a/arch/arm/mach-imx/imx8ulp/rdc.c +++ b/arch/arm/mach-imx/imx8ulp/rdc.c @@ -3,8 +3,7 @@ * Copyright 2021 NXP */ -#include <config.h> -#include <linux/errno.h> +#include <common.h> #include <asm/io.h> #include <asm/types.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c index 0abf4579a1e..75d92af036a 100644 --- a/arch/arm/mach-imx/imx9/clock.c +++ b/arch/arm/mach-imx/imx9/clock.c @@ -5,6 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ +#include <common.h> #include <command.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/imx9/clock_root.c b/arch/arm/mach-imx/imx9/clock_root.c index 47106fffefb..7d7ae865946 100644 --- a/arch/arm/mach-imx/imx9/clock_root.c +++ b/arch/arm/mach-imx/imx9/clock_root.c @@ -5,7 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ -#include <config.h> +#include <common.h> #include <command.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-imx/imx9/imx_bootaux.c b/arch/arm/mach-imx/imx9/imx_bootaux.c index 73f2e72263d..6afb59e0515 100644 --- a/arch/arm/mach-imx/imx9/imx_bootaux.c +++ b/arch/arm/mach-imx/imx9/imx_bootaux.c @@ -3,12 +3,11 @@ * Copyright 2022 NXP */ +#include <common.h> #include <command.h> #include <log.h> #include <imx_sip.h> -#include <vsprintf.h> #include <linux/arm-smccc.h> -#include <linux/errno.h> int arch_auxiliary_core_check_up(u32 core_id) { diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index 32208220b20..2117489f232 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -5,7 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c index 8cdb28459a3..d0f855bb1bc 100644 --- a/arch/arm/mach-imx/imx9/trdc.c +++ b/arch/arm/mach-imx/imx9/trdc.c @@ -3,8 +3,8 @@ * Copyright 2022 NXP */ +#include <common.h> #include <log.h> -#include <linux/errno.h> #include <asm/io.h> #include <asm/types.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 26374fdc33e..f7b14ca38d9 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -3,18 +3,15 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include <common.h> #include <log.h> -#include <asm/arch/imx-regs.h> #include <asm/io.h> #include <asm/mach-imx/sys_proto.h> #include <command.h> #include <elf.h> #include <imx_sip.h> -#include <vsprintf.h> #include <linux/arm-smccc.h> #include <linux/compiler.h> -#include <linux/errno.h> -#include <linux/string.h> #include <cpu_func.h> #ifndef CONFIG_IMX8 diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c index 3028957953b..34162a3976f 100644 --- a/arch/arm/mach-imx/imxrt/soc.c +++ b/arch/arm/mach-imx/imxrt/soc.c @@ -4,6 +4,7 @@ * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> */ +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/armv7_mpu.h> diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c index c134e95ed78..18131a20f43 100644 --- a/arch/arm/mach-imx/iomux-v3.c +++ b/arch/arm/mach-imx/iomux-v3.c @@ -7,6 +7,7 @@ * * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. */ +#include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/mach-imx/iomux-v3.h> diff --git a/arch/arm/mach-imx/mac.c b/arch/arm/mach-imx/mac.c index e739fd14c89..9bb63d25b48 100644 --- a/arch/arm/mach-imx/mac.c +++ b/arch/arm/mach-imx/mac.c @@ -5,6 +5,7 @@ * Peng Fan <peng.fan@nxp.com> */ +#include <common.h> #include <asm/arch/imx-regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c index 7452b82f110..09a758ff6e8 100644 --- a/arch/arm/mach-imx/misc.c +++ b/arch/arm/mach-imx/misc.c @@ -3,6 +3,7 @@ * Copyright 2013 Stefan Roese <sr@denx.de> */ +#include <common.h> #include <lmb.h> #include <log.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-imx/mmc_env.c b/arch/arm/mach-imx/mmc_env.c index 34a7d1706f3..9c822f721c6 100644 --- a/arch/arm/mach-imx/mmc_env.c +++ b/arch/arm/mach-imx/mmc_env.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 NXP */ +#include <common.h> #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/mmdc_size.c b/arch/arm/mach-imx/mmdc_size.c index 2b1d203f863..41a5af6bd30 100644 --- a/arch/arm/mach-imx/mmdc_size.c +++ b/arch/arm/mach-imx/mmdc_size.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ -#include <config.h> +#include <common.h> #include <asm/io.h> #if defined(CONFIG_MX53) diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c index 0b8a10fd729..bbaddd5a33f 100644 --- a/arch/arm/mach-imx/mx5/clock.c +++ b/arch/arm/mach-imx/mx5/clock.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include <common.h> #include <command.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/mx5/mx53_dram.c b/arch/arm/mach-imx/mx5/mx53_dram.c index 180a745d435..f7441441947 100644 --- a/arch/arm/mach-imx/mx5/mx53_dram.c +++ b/arch/arm/mach-imx/mx5/mx53_dram.c @@ -4,6 +4,7 @@ * Patrick Bruenn <p.bruenn@beckhoff.com> */ +#include <common.h> #include <init.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-imx/mx5/soc.c b/arch/arm/mach-imx/mx5/soc.c index 4df5f9c1641..47f531dc856 100644 --- a/arch/arm/mach-imx/mx5/soc.c +++ b/arch/arm/mach-imx/mx5/soc.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include <common.h> #include <cpu_func.h> #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index fb9f56d2e63..e0da9c23958 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -3,10 +3,10 @@ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. */ +#include <common.h> #include <command.h> #include <div64.h> #include <log.h> -#include <time.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index 5a1258e002d..3c87c577737 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -4,6 +4,7 @@ * Author: Tim Harvey <tharvey@gateworks.com> */ +#include <common.h> #include <hang.h> #include <log.h> #include <linux/delay.h> diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index ab5de266577..2ba3245e226 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> -#include <config.h> +#include <common.h> #include <fsl_esdhc_imx.h> #include <linux/delay.h> #include <linux/sizes.h> diff --git a/arch/arm/mach-imx/mx6/module_fuse.c b/arch/arm/mach-imx/mx6/module_fuse.c index 8b23d48a854..b58f11c1e56 100644 --- a/arch/arm/mach-imx/mx6/module_fuse.c +++ b/arch/arm/mach-imx/mx6/module_fuse.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include <common.h> #include <fdt_support.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-imx/mx6/mp.c b/arch/arm/mach-imx/mx6/mp.c index 091a3723831..de9ace083ce 100644 --- a/arch/arm/mach-imx/mx6/mp.c +++ b/arch/arm/mach-imx/mx6/mp.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <linux/errno.h> diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index 340e6147b63..38ead8ace20 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/global_data.h> #include <asm/io.h> -#include <config.h> +#include <common.h> #include <env.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 3a3e01f3d0a..c2875e727c9 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -7,6 +7,7 @@ * Copyright 2021 NXP */ +#include <common.h> #include <env.h> #include <init.h> #include <linux/delay.h> diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index a8606fa9b24..4e232385afc 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -6,12 +6,11 @@ * Peng Fan <Peng.Fan@freescale.com> */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <command.h> #include <div64.h> #include <log.h> -#include <time.h> #include <asm/global_data.h> #include <asm/io.h> #include <linux/errno.h> diff --git a/arch/arm/mach-imx/mx7/clock_slice.c b/arch/arm/mach-imx/mx7/clock_slice.c index 2a1304fc112..dd731d94962 100644 --- a/arch/arm/mach-imx/mx7/clock_slice.c +++ b/arch/arm/mach-imx/mx7/clock_slice.c @@ -6,6 +6,7 @@ * Peng Fan <Peng.Fan@freescale.com> */ +#include <common.h> #include <div64.h> #include <asm/io.h> #include <linux/errno.h> diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c index c4a90be3945..cf25569765e 100644 --- a/arch/arm/mach-imx/mx7/ddr.c +++ b/arch/arm/mach-imx/mx7/ddr.c @@ -12,6 +12,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/crm_regs.h> #include <asm/arch/mx7-ddr.h> +#include <common.h> #include <linux/delay.h> /* diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c index 12d6a63b925..0b71fa40344 100644 --- a/arch/arm/mach-imx/mx7/psci-mx7.c +++ b/arch/arm/mach-imx/mx7/psci-mx7.c @@ -13,6 +13,7 @@ #include <asm/armv7.h> #include <asm/gic.h> #include <linux/bitops.h> +#include <common.h> #include <fsl_wdog.h> #define GPC_LPCR_A7_BSC 0x0 diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 16c77cbf7be..689dbefe8ee 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -4,6 +4,7 @@ * Copyright 2021 NXP */ +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fb19c62a520..37d8565c20f 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <command.h> #include <div64.h> diff --git a/arch/arm/mach-imx/mx7ulp/iomux.c b/arch/arm/mach-imx/mx7ulp/iomux.c index 2c87a8c18b9..05ddeed2a64 100644 --- a/arch/arm/mach-imx/mx7ulp/iomux.c +++ b/arch/arm/mach-imx/mx7ulp/iomux.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> diff --git a/arch/arm/mach-imx/mx7ulp/pcc.c b/arch/arm/mach-imx/mx7ulp/pcc.c index 0bfd8f71815..aa7ea86a443 100644 --- a/arch/arm/mach-imx/mx7ulp/pcc.c +++ b/arch/arm/mach-imx/mx7ulp/pcc.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include <common.h> #include <div64.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index d4fb5389cac..4c066557c1c 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Freescale Semiconductor, Inc. */ -#include <config.h> +#include <common.h> #include <div64.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 198ae2d919c..217b7c45867 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -4,7 +4,7 @@ * Copyright 2021 NXP */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-imx/priblob.c b/arch/arm/mach-imx/priblob.c index 65924483bc8..5b022d5c820 100644 --- a/arch/arm/mach-imx/priblob.c +++ b/arch/arm/mach-imx/priblob.c @@ -11,6 +11,7 @@ */ #include <asm/io.h> +#include <common.h> #include <command.h> #include <fsl_sec.h> diff --git a/arch/arm/mach-imx/rdc-sema.c b/arch/arm/mach-imx/rdc-sema.c index 56725cc109f..e683673753e 100644 --- a/arch/arm/mach-imx/rdc-sema.c +++ b/arch/arm/mach-imx/rdc-sema.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. */ +#include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/mach-imx/rdc-sema.h> diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c index 98a42b22f9c..0e81cc880a1 100644 --- a/arch/arm/mach-imx/speed.c +++ b/arch/arm/mach-imx/speed.c @@ -7,7 +7,7 @@ * TsiChung Liew (Tsi-Chung.Liew@freescale.com) */ -#include <config.h> +#include <common.h> #include <clock_legacy.h> #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index bc291dcd129..b30cd962553 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -6,7 +6,7 @@ * Author: Tim Harvey <tharvey@gateworks.com> */ -#include <config.h> +#include <common.h> #include <hang.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index 9a86f5c133f..b9ff9bb83b3 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include <common.h> #include <errno.h> #include <image.h> #include <imx_container.h> diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 922f851c56b..16df1186759 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -5,7 +5,7 @@ * The file use ls102xa/timer.c as a reference. */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c index 5ac8f28e670..fcd45f09f18 100644 --- a/arch/arm/mach-imx/timer.c +++ b/arch/arm/mach-imx/timer.c @@ -6,6 +6,7 @@ * (C) Copyright 2009 Freescale Semiconductor, Inc. */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/io.h> diff --git a/arch/arm/mach-imx/video.c b/arch/arm/mach-imx/video.c index 6cbb49da53c..1bc9b7cc7e1 100644 --- a/arch/arm/mach-imx/video.c +++ b/arch/arm/mach-imx/video.c @@ -1,9 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ -#include <stdio.h> +#include <common.h> #include <env.h> #include <linux/errno.h> -#include <asm/arch/imx-regs.h> #include <asm/mach-imx/video.h> #ifdef CONFIG_IMX_HDMI diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 3101f57d324..1bd523329a4 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -26,4 +26,3 @@ obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o endif obj-y += common.o security.o obj-$(CONFIG_SOC_K3_AM625) += am62x/ -obj-$(CONFIG_SOC_K3_AM642) += am64x/ diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index f341b4f367c..80c3cb3479f 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -285,7 +285,97 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) } } +static u32 __get_backup_bootmedia(u32 main_devstat) +{ + u32 bkup_bootmode = + (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; + u32 bkup_bootmode_cfg = + (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; + + switch (bkup_bootmode) { + case BACKUP_BOOT_DEVICE_UART: + return BOOT_DEVICE_UART; + + case BACKUP_BOOT_DEVICE_DFU: + if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + + case BACKUP_BOOT_DEVICE_ETHERNET: + return BOOT_DEVICE_ETHERNET; + + case BACKUP_BOOT_DEVICE_MMC: + if (bkup_bootmode_cfg) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BACKUP_BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BACKUP_BOOT_DEVICE_I2C: + return BOOT_DEVICE_I2C; + }; + + return BOOT_DEVICE_RAM; +} + +static u32 __get_primary_bootmedia(u32 main_devstat) +{ + u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; + u32 bootmode_cfg = + (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (bootmode) { + case BOOT_DEVICE_OSPI: + fallthrough; + case BOOT_DEVICE_QSPI: + fallthrough; + case BOOT_DEVICE_XSPI: + fallthrough; + case BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BOOT_DEVICE_ETHERNET_RGMII: + fallthrough; + case BOOT_DEVICE_ETHERNET_RMII: + return BOOT_DEVICE_ETHERNET; + + case BOOT_DEVICE_EMMC: + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_NAND: + return BOOT_DEVICE_NAND; + + case BOOT_DEVICE_MMC: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> + MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_DFU: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + case BOOT_DEVICE_NOBOOT: + return BOOT_DEVICE_RAM; + } + + return bootmode; +} + u32 spl_boot_device(void) { - return get_boot_device(); + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + + if (bootindex == K3_PRIMARY_BOOTMODE) + return __get_primary_bootmedia(devstat); + else + return __get_backup_bootmedia(devstat); } diff --git a/arch/arm/mach-k3/am64x/Makefile b/arch/arm/mach-k3/am64x/Makefile deleted file mode 100644 index acf09c3426c..00000000000 --- a/arch/arm/mach-k3/am64x/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -obj-y += boot.o diff --git a/arch/arm/mach-k3/am64x/boot.c b/arch/arm/mach-k3/am64x/boot.c deleted file mode 100644 index ce8ae941be6..00000000000 --- a/arch/arm/mach-k3/am64x/boot.c +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -#include <asm/io.h> -#include <asm/arch/hardware.h> -#include <asm/arch/spl.h> - -static u32 __get_backup_bootmedia(u32 main_devstat) -{ - u32 bkup_bootmode = - (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; - u32 bkup_bootmode_cfg = - (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; - - switch (bkup_bootmode) { - case BACKUP_BOOT_DEVICE_UART: - return BOOT_DEVICE_UART; - - case BACKUP_BOOT_DEVICE_DFU: - if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - - case BACKUP_BOOT_DEVICE_ETHERNET: - return BOOT_DEVICE_ETHERNET; - - case BACKUP_BOOT_DEVICE_MMC: - if (bkup_bootmode_cfg) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BACKUP_BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BACKUP_BOOT_DEVICE_I2C: - return BOOT_DEVICE_I2C; - }; - - return BOOT_DEVICE_RAM; -} - -static u32 __get_primary_bootmedia(u32 main_devstat) -{ - u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; - u32 bootmode_cfg = - (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; - - switch (bootmode) { - case BOOT_DEVICE_OSPI: - fallthrough; - case BOOT_DEVICE_QSPI: - fallthrough; - case BOOT_DEVICE_XSPI: - fallthrough; - case BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BOOT_DEVICE_ETHERNET_RGMII: - fallthrough; - case BOOT_DEVICE_ETHERNET_RMII: - return BOOT_DEVICE_ETHERNET; - - case BOOT_DEVICE_EMMC: - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_NAND: - return BOOT_DEVICE_NAND; - - case BOOT_DEVICE_MMC: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> - MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_DFU: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - - case BOOT_DEVICE_NOBOOT: - return BOOT_DEVICE_RAM; - } - - return bootmode; -} - -u32 get_boot_device(void) -{ - u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); - u32 bootmode = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX); - u32 bootmedia; - - if (bootmode == K3_PRIMARY_BOOTMODE) - bootmedia = __get_primary_bootmedia(devstat); - else - bootmedia = __get_backup_bootmedia(devstat); - - debug("%s: devstat = 0x%x bootmedia = 0x%x bootmode = %d\n", - __func__, devstat, bootmedia, bootmode); - - return bootmedia; -} diff --git a/arch/arm/mach-kirkwood/cache.c b/arch/arm/mach-kirkwood/cache.c index acd2e8b1145..009b7deeca6 100644 --- a/arch/arm/mach-kirkwood/cache.c +++ b/arch/arm/mach-kirkwood/cache.c @@ -3,6 +3,7 @@ * Copyright (c) 2012 Michael Walle * Michael Walle <michael@walle.cc> */ +#include <common.h> #include <asm/arch/cpu.h> #include <asm/cache.h> diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c index a432abe615d..2b493b36c20 100644 --- a/arch/arm/mach-kirkwood/cpu.c +++ b/arch/arm/mach-kirkwood/cpu.c @@ -5,6 +5,7 @@ * Written-by: Prafulla Wadaskar <prafulla@marvell.com> */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <env.h> diff --git a/arch/arm/mach-kirkwood/include/mach/mpp.h b/arch/arm/mach-kirkwood/include/mach/mpp.h index e2757942590..4d1f58c0cbd 100644 --- a/arch/arm/mach-kirkwood/include/mach/mpp.h +++ b/arch/arm/mach-kirkwood/include/mach/mpp.h @@ -8,8 +8,6 @@ #ifndef __KIRKWOOD_MPP_H #define __KIRKWOOD_MPP_H -#include <linux/types.h> - #define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \ /* MPP number */ ((_num) & 0xff) | \ /* MPP select value */ (((_sel) & 0xf) << 8) | \ diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 7938820e513..4fdad99cade 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -9,6 +9,7 @@ * warranty of any kind, whether express or implied. */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-lpc32xx/clk.c b/arch/arm/mach-lpc32xx/clk.c index 2e11903e7e0..cb2344d79fe 100644 --- a/arch/arm/mach-lpc32xx/clk.c +++ b/arch/arm/mach-lpc32xx/clk.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com> */ +#include <common.h> #include <clock_legacy.h> #include <div64.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-lpc32xx/cpu.c b/arch/arm/mach-lpc32xx/cpu.c index 80f5e7c88eb..a97f9a1958a 100644 --- a/arch/arm/mach-lpc32xx/cpu.c +++ b/arch/arm/mach-lpc32xx/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2011-2015 by Vladimir Zapolskiy <vz@mleia.com> */ +#include <common.h> #include <cpu_func.h> #include <init.h> #include <net.h> diff --git a/arch/arm/mach-lpc32xx/devices.c b/arch/arm/mach-lpc32xx/devices.c index 49308d6d4be..6a67a3591aa 100644 --- a/arch/arm/mach-lpc32xx/devices.c +++ b/arch/arm/mach-lpc32xx/devices.c @@ -3,7 +3,7 @@ * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com> */ -#include <config.h> +#include <common.h> #include <dm.h> #include <ns16550.h> diff --git a/arch/arm/mach-lpc32xx/dram.c b/arch/arm/mach-lpc32xx/dram.c index ab7c13512a5..16022379235 100644 --- a/arch/arm/mach-lpc32xx/dram.c +++ b/arch/arm/mach-lpc32xx/dram.c @@ -10,6 +10,7 @@ * This code runs from SRAM. */ +#include <common.h> #include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c index 523f9cfc8c4..90183e3014e 100644 --- a/arch/arm/mach-lpc32xx/timer.c +++ b/arch/arm/mach-lpc32xx/timer.c @@ -3,6 +3,7 @@ * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com> */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index ff1fdee5c8d..82018bd9d3e 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -23,7 +23,6 @@ config TARGET_MT7622 config TARGET_MT7623 bool "MediaTek MT7623 SoC" select CPU_V7A - select MMC_SUPPORTS_TUNING help The MediaTek MT7623 is a ARM-based SoC with a quad-core Cortex-A7 including NEON and GPU, Mali-450 graphics, several DDR3 options, diff --git a/arch/arm/mach-mediatek/cpu.c b/arch/arm/mach-mediatek/cpu.c index 8e8bc4f9cea..c329e7cc98a 100644 --- a/arch/arm/mach-mediatek/cpu.c +++ b/arch/arm/mach-mediatek/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 MediaTek Inc. */ +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <init.h> diff --git a/arch/arm/mach-mediatek/mt7622/init.c b/arch/arm/mach-mediatek/mt7622/init.c index 6e970acf8b0..00d3eb9ce7a 100644 --- a/arch/arm/mach-mediatek/mt7622/init.c +++ b/arch/arm/mach-mediatek/mt7622/init.c @@ -9,6 +9,7 @@ #include <asm/armv8/mmu.h> #include <asm/system.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include <linux/sizes.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7623/init.c b/arch/arm/mach-mediatek/mt7623/init.c index 3d6ba3f383c..988b057e598 100644 --- a/arch/arm/mach-mediatek/mt7623/init.c +++ b/arch/arm/mach-mediatek/mt7623/init.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 MediaTek Inc. */ -#include <config.h> +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <linux/io.h> diff --git a/arch/arm/mach-mediatek/mt7629/init.c b/arch/arm/mach-mediatek/mt7629/init.c index 7cb8b72c364..0130554ff35 100644 --- a/arch/arm/mach-mediatek/mt7629/init.c +++ b/arch/arm/mach-mediatek/mt7629/init.c @@ -5,7 +5,7 @@ */ #include <clk.h> -#include <config.h> +#include <common.h> #include <dm.h> #include <fdtdec.h> #include <init.h> diff --git a/arch/arm/mach-mediatek/mt7981/init.c b/arch/arm/mach-mediatek/mt7981/init.c index 07da5897190..862f0ca4793 100644 --- a/arch/arm/mach-mediatek/mt7981/init.c +++ b/arch/arm/mach-mediatek/mt7981/init.c @@ -9,6 +9,7 @@ #include <asm/armv8/mmu.h> #include <asm/system.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include <linux/sizes.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7986/init.c b/arch/arm/mach-mediatek/mt7986/init.c index a521c95bd9d..905a3ab4e27 100644 --- a/arch/arm/mach-mediatek/mt7986/init.c +++ b/arch/arm/mach-mediatek/mt7986/init.c @@ -9,6 +9,7 @@ #include <asm/armv8/mmu.h> #include <asm/system.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include <linux/sizes.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c index 2efc8c6a88f..082f12bf65e 100644 --- a/arch/arm/mach-mediatek/mt7988/init.c +++ b/arch/arm/mach-mediatek/mt7988/init.c @@ -8,6 +8,7 @@ #include <init.h> #include <asm/armv8/mmu.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include <asm/system.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt8183/init.c b/arch/arm/mach-mediatek/mt8183/init.c index 37243547da8..7496029705f 100644 --- a/arch/arm/mach-mediatek/mt8183/init.c +++ b/arch/arm/mach-mediatek/mt8183/init.c @@ -6,6 +6,7 @@ */ #include <clk.h> +#include <common.h> #include <dm.h> #include <fdtdec.h> #include <ram.h> diff --git a/arch/arm/mach-mediatek/mt8512/init.c b/arch/arm/mach-mediatek/mt8512/init.c index 3b48caf5196..5a21e9a4485 100644 --- a/arch/arm/mach-mediatek/mt8512/init.c +++ b/arch/arm/mach-mediatek/mt8512/init.c @@ -7,6 +7,7 @@ */ #include <clk.h> +#include <common.h> #include <dm.h> #include <fdtdec.h> #include <init.h> diff --git a/arch/arm/mach-mediatek/mt8516/init.c b/arch/arm/mach-mediatek/mt8516/init.c index 892bd441a33..3460dcc2494 100644 --- a/arch/arm/mach-mediatek/mt8516/init.c +++ b/arch/arm/mach-mediatek/mt8516/init.c @@ -6,6 +6,7 @@ */ #include <clk.h> +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <fdtdec.h> diff --git a/arch/arm/mach-mediatek/mt8518/init.c b/arch/arm/mach-mediatek/mt8518/init.c index c04bcb63517..f7e03de3650 100644 --- a/arch/arm/mach-mediatek/mt8518/init.c +++ b/arch/arm/mach-mediatek/mt8518/init.c @@ -7,6 +7,7 @@ */ #include <clk.h> +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <fdtdec.h> diff --git a/arch/arm/mach-mediatek/spl.c b/arch/arm/mach-mediatek/spl.c index 247d7ee6f1d..d3cda94617e 100644 --- a/arch/arm/mach-mediatek/spl.c +++ b/arch/arm/mach-mediatek/spl.c @@ -5,6 +5,7 @@ */ #include <clk.h> +#include <common.h> #include <hang.h> #include <init.h> #include <spl.h> diff --git a/arch/arm/mach-meson/board-a1.c b/arch/arm/mach-meson/board-a1.c index f848c0f068e..967bb671822 100644 --- a/arch/arm/mach-meson/board-a1.c +++ b/arch/arm/mach-meson/board-a1.c @@ -3,12 +3,12 @@ * (C) Copyright 2023 SberDevices, Inc. */ +#include <common.h> #include <asm/arch/a1.h> #include <asm/arch/boot.h> #include <asm/armv8/mmu.h> #include <asm/io.h> #include <linux/compiler.h> -#include <linux/errno.h> #include <linux/sizes.h> phys_size_t get_effective_memsize(void) diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c index 6535539184c..fdf18752cdd 100644 --- a/arch/arm/mach-meson/board-axg.c +++ b/arch/arm/mach-meson/board-axg.c @@ -4,6 +4,7 @@ * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com> */ +#include <common.h> #include <init.h> #include <net.h> #include <asm/arch/boot.h> diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c index 39774c43049..7ceba7cede8 100644 --- a/arch/arm/mach-meson/board-common.c +++ b/arch/arm/mach-meson/board-common.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com> */ +#include <common.h> #include <cpu_func.h> #include <fastboot.h> #include <init.h> diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c index dc4abe1e107..d5a830fb1db 100644 --- a/arch/arm/mach-meson/board-g12a.c +++ b/arch/arm/mach-meson/board-g12a.c @@ -4,6 +4,7 @@ * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com> */ +#include <common.h> #include <init.h> #include <log.h> #include <net.h> diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c index 0370ed57e20..c3fbdfffeae 100644 --- a/arch/arm/mach-meson/board-gx.c +++ b/arch/arm/mach-meson/board-gx.c @@ -4,6 +4,7 @@ * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com> */ +#include <common.h> #include <init.h> #include <net.h> #include <asm/arch/boot.h> diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c index b4058f59323..d51d9b8f064 100644 --- a/arch/arm/mach-meson/board-info.c +++ b/arch/arm/mach-meson/board-info.c @@ -4,6 +4,7 @@ * (C) Copyright 2019 Neil Armstrong <narmstrong@baylibre.com> */ +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index 4d9f83d3b38..914fd11c989 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -5,6 +5,7 @@ * Secure monitor calls. */ +#include <common.h> #include <dm.h> #include <log.h> #include <regmap.h> diff --git a/arch/arm/mach-mvebu/alleycat5/cpu.c b/arch/arm/mach-mvebu/alleycat5/cpu.c index be2d9a25bf9..0f72ae1709b 100644 --- a/arch/arm/mach-mvebu/alleycat5/cpu.c +++ b/arch/arm/mach-mvebu/alleycat5/cpu.c @@ -3,7 +3,7 @@ * Copyright (C) 2018 Marvell International Ltd. */ -#include <config.h> +#include <common.h> #include <dm.h> #include <fdtdec.h> #include <linux/libfdt.h> diff --git a/arch/arm/mach-mvebu/alleycat5/soc.c b/arch/arm/mach-mvebu/alleycat5/soc.c index 98e66735eb9..734b0a87dd4 100644 --- a/arch/arm/mach-mvebu/alleycat5/soc.c +++ b/arch/arm/mach-mvebu/alleycat5/soc.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Marvell International Ltd. */ +#include <common.h> #include <asm/arch-armada8k/cache_llc.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 63a12f7d774..4c67f1aba4d 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Stefan Roese <sr@denx.de> */ -#include <config.h> +#include <common.h> #include <dm.h> #include <fdtdec.h> #include <init.h> diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c index 17525691e68..ab72b304e5d 100644 --- a/arch/arm/mach-mvebu/armada3700/cpu.c +++ b/arch/arm/mach-mvebu/armada3700/cpu.c @@ -4,6 +4,7 @@ * Copyright (C) 2020 Marek Behún <kabel@kernel.org> */ +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <fdtdec.h> diff --git a/arch/arm/mach-mvebu/armada3700/efuse.c b/arch/arm/mach-mvebu/armada3700/efuse.c index 84a1e388c11..07d5f394354 100644 --- a/arch/arm/mach-mvebu/armada3700/efuse.c +++ b/arch/arm/mach-mvebu/armada3700/efuse.c @@ -5,10 +5,9 @@ */ #include <config.h> +#include <common.h> #include <asm/io.h> #include <linux/delay.h> -#include <linux/errno.h> -#include <linux/types.h> #include <mach/mbox.h> #include <mach/soc.h> diff --git a/arch/arm/mach-mvebu/armada3700/mbox.c b/arch/arm/mach-mvebu/armada3700/mbox.c index 5ac543abce5..6555b8673ce 100644 --- a/arch/arm/mach-mvebu/armada3700/mbox.c +++ b/arch/arm/mach-mvebu/armada3700/mbox.c @@ -4,11 +4,11 @@ * Copyright (C) 2021 Pali Rohár <pali@kernel.org> */ +#include <common.h> #include <asm/arch/soc.h> #include <asm/io.h> #include <linux/bitops.h> #include <linux/delay.h> -#include <linux/errno.h> #include <mach/mbox.h> #define RWTM_BASE (MVEBU_REGISTER(0xb0000)) diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c index 7908f75809c..939abce000f 100644 --- a/arch/arm/mach-mvebu/armada8k/cpu.c +++ b/arch/arm/mach-mvebu/armada8k/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 Stefan Roese <sr@denx.de> */ +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <fdtdec.h> diff --git a/arch/arm/mach-mvebu/armada8k/dram.c b/arch/arm/mach-mvebu/armada8k/dram.c index fd58551d0e3..6c801bfa1db 100644 --- a/arch/arm/mach-mvebu/armada8k/dram.c +++ b/arch/arm/mach-mvebu/armada8k/dram.c @@ -3,7 +3,7 @@ * Copyright (C) 2016 Stefan Roese <sr@denx.de> */ -#include <config.h> +#include <common.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index e603ab9ffb7..7c62a5dbb6a 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -3,7 +3,7 @@ * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de> */ -#include <config.h> +#include <common.h> #include <ahci.h> #include <cpu_func.h> #include <init.h> diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index c00c6b9b3fc..d398d0f7676 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -6,6 +6,7 @@ */ #include <config.h> +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c index 475687955e0..be5dc0e07d9 100644 --- a/arch/arm/mach-mvebu/efuse.c +++ b/arch/arm/mach-mvebu/efuse.c @@ -4,6 +4,7 @@ */ #include <config.h> +#include <common.h> #include <errno.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/gpio.c b/arch/arm/mach-mvebu/gpio.c index 587cbb00e7f..1d1e3df8ba9 100644 --- a/arch/arm/mach-mvebu/gpio.c +++ b/arch/arm/mach-mvebu/gpio.c @@ -5,6 +5,7 @@ * Written-by: Prafulla Wadaskar <prafulla@marvell.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c index 9baeece3c85..959ca8e9260 100644 --- a/arch/arm/mach-mvebu/mbus.c +++ b/arch/arm/mach-mvebu/mbus.c @@ -46,7 +46,7 @@ * mvebu_mbus_del_window(). */ -#include <config.h> +#include <common.h> #include <malloc.h> #include <linux/bitops.h> #include <linux/errno.h> diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c index 4582871556d..12596ec2d8b 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include <common.h> #include <spl.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c index efc31d5218a..3349f4eb549 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c @@ -3,7 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ -#include <config.h> +#include <common.h> #include <spl.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c index 9a1bbba7f2f..2a51b7113ce 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include <common.h> #include <spl.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c index 8290b861c07..fb8ec11dfb9 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include <common.h> #include <spl.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index 61b7f168697..68f8eade272 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -3,7 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ -#include <config.h> +#include <common.h> #include <i2c.h> #include <spl.h> #include <asm/io.h> diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c index 9b7bb2c3851..539d237623a 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c @@ -3,6 +3,7 @@ * Copyright (C) Marvell International Ltd. and its affiliates */ +#include <common.h> #include <spl.h> #include <asm/io.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 4f4f7e00e3c..79f8877745b 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -3,6 +3,7 @@ * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de> */ +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <fdtdec.h> diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index d94bde0777c..682431ee11d 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c @@ -4,6 +4,7 @@ * Copyright (C) 2024 Marek Behún <kabel@kernel.org> */ +#include <common.h> #include <dm.h> #include <dm/lists.h> #include <regmap.h> diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c index 3082f6077b7..59ffa26255f 100644 --- a/arch/arm/mach-nexell/clock.c +++ b/arch/arm/mach-nexell/clock.c @@ -4,8 +4,8 @@ * Hyunseok, Jung <hsjung@nexell.co.kr> */ +#include <common.h> #include <command.h> -#include <vsprintf.h> #include <linux/err.h> #include <asm/io.h> #include <asm/arch/nexell.h> diff --git a/arch/arm/mach-nexell/include/mach/mipi_display.h b/arch/arm/mach-nexell/include/mach/mipi_display.h index 9183ffdd9c3..f3fdec64647 100644 --- a/arch/arm/mach-nexell/include/mach/mipi_display.h +++ b/arch/arm/mach-nexell/include/mach/mipi_display.h @@ -11,8 +11,6 @@ #ifndef MIPI_DISPLAY_H #define MIPI_DISPLAY_H -#include <linux/types.h> - /* MIPI DSI Processor-to-Peripheral transaction types */ enum { MIPI_DSI_V_SYNC_START = 0x01, diff --git a/arch/arm/mach-nexell/include/mach/reset.h b/arch/arm/mach-nexell/include/mach/reset.h index 0c6a13043f9..e1301d4e53d 100644 --- a/arch/arm/mach-nexell/include/mach/reset.h +++ b/arch/arm/mach-nexell/include/mach/reset.h @@ -7,8 +7,6 @@ #ifndef __NEXELL_RESET__ #define __NEXELL_RESET__ -#include <linux/types.h> - #define NUMBER_OF_RESET_MODULE_PIN 69 enum rstcon { diff --git a/arch/arm/mach-nexell/reset.c b/arch/arm/mach-nexell/reset.c index 627f568270b..1f732a3d373 100644 --- a/arch/arm/mach-nexell/reset.c +++ b/arch/arm/mach-nexell/reset.c @@ -8,6 +8,7 @@ *FIXME : Not support device tree & reset control driver. * will remove after support device tree & reset control driver. */ +#include <common.h> #include <asm/io.h> #include <asm/arch/nexell.h> #include <asm/arch/reset.h> diff --git a/arch/arm/mach-nexell/tieoff.c b/arch/arm/mach-nexell/tieoff.c index 51cca6744d6..5a4744c296a 100644 --- a/arch/arm/mach-nexell/tieoff.c +++ b/arch/arm/mach-nexell/tieoff.c @@ -4,6 +4,7 @@ * Youngbok, Park <park@nexell.co.kr> */ +#include <common.h> #include <asm/arch/nexell.h> #include <asm/arch/clk.h> #include <asm/arch/reset.h> diff --git a/arch/arm/mach-nexell/timer.c b/arch/arm/mach-nexell/timer.c index b35c7b1bb33..3b311fd22a5 100644 --- a/arch/arm/mach-nexell/timer.c +++ b/arch/arm/mach-nexell/timer.c @@ -4,6 +4,7 @@ * Hyunseok, Jung <hsjung@nexell.co.kr> */ +#include <common.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-npcm/npcm7xx/cpu.c b/arch/arm/mach-npcm/npcm7xx/cpu.c index 47d51cab5c7..dd74bb9e087 100644 --- a/arch/arm/mach-npcm/npcm7xx/cpu.c +++ b/arch/arm/mach-npcm/npcm7xx/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ +#include <common.h> #include <cpu_func.h> #include <asm/armv7.h> #include <asm/io.h> diff --git a/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c b/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c index df80687c857..ed4b1ca5c98 100644 --- a/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c +++ b/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c @@ -3,7 +3,7 @@ * Copyright (c) 2021 Nuvoton Technology Corp. */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/pl310.h> diff --git a/arch/arm/mach-npcm/npcm8xx/cpu.c b/arch/arm/mach-npcm/npcm8xx/cpu.c index a1fb400b264..af594526094 100644 --- a/arch/arm/mach-npcm/npcm8xx/cpu.c +++ b/arch/arm/mach-npcm/npcm8xx/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include <common.h> #include <dm.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-npcm/npcm8xx/reset.c b/arch/arm/mach-npcm/npcm8xx/reset.c index e28b4ae7ae4..6954e6c6a17 100644 --- a/arch/arm/mach-npcm/npcm8xx/reset.c +++ b/arch/arm/mach-npcm/npcm8xx/reset.c @@ -3,6 +3,7 @@ * Copyright (c) 2022 Nuvoton Technology Corp. */ +#include <common.h> #include <asm/io.h> #include <asm/arch/gcr.h> #include <asm/arch/rst.h> diff --git a/arch/arm/mach-octeontx/clock.c b/arch/arm/mach-octeontx/clock.c index ffdee8799fb..9da21077ecd 100644 --- a/arch/arm/mach-octeontx/clock.c +++ b/arch/arm/mach-octeontx/clock.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include <common.h> #include <asm/io.h> #include <asm/arch/board.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-octeontx/cpu.c b/arch/arm/mach-octeontx/cpu.c index 90454edca25..aa5f4585c6f 100644 --- a/arch/arm/mach-octeontx/cpu.c +++ b/arch/arm/mach-octeontx/cpu.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include <common.h> #include <asm/armv8/mmu.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-octeontx2/clock.c b/arch/arm/mach-octeontx2/clock.c index ffdee8799fb..9da21077ecd 100644 --- a/arch/arm/mach-octeontx2/clock.c +++ b/arch/arm/mach-octeontx2/clock.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include <common.h> #include <asm/io.h> #include <asm/arch/board.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-octeontx2/cpu.c b/arch/arm/mach-octeontx2/cpu.c index 0a44af71a40..723deef719b 100644 --- a/arch/arm/mach-octeontx2/cpu.c +++ b/arch/arm/mach-octeontx2/cpu.c @@ -5,6 +5,7 @@ * https://spdx.org/licenses */ +#include <common.h> #include <asm/armv8/mmu.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c index ce33d2fe129..722e6db0566 100644 --- a/arch/arm/mach-omap2/abb.c +++ b/arch/arm/mach-omap2/abb.c @@ -8,6 +8,7 @@ * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> */ +#include <common.h> #include <asm/omap_common.h> #include <asm/arch/clock.h> #include <asm/io.h> diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 78c1e965c9f..09659da5867 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include <config.h> +#include <common.h> #include <dm.h> #include <debug_uart.h> #include <errno.h> diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c index 4765ce0adee..d4f2abe17a9 100644 --- a/arch/arm/mach-omap2/am33xx/chilisom.c +++ b/arch/arm/mach-omap2/am33xx/chilisom.c @@ -4,6 +4,7 @@ * Copyright (C) 2017, Grinn - http://grinn-global.com/ */ +#include <common.h> #include <init.h> #include <asm/arch/clock.h> #include <asm/arch/clk_synthesizer.h> diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c index b75eb58ee82..0969a404bf6 100644 --- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c +++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c @@ -7,7 +7,8 @@ * Copyright (C) 2016, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include <stdio.h> + +#include <common.h> #include <asm/arch/clk_synthesizer.h> #include <i2c.h> diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c index f07003c95bc..3273632c648 100644 --- a/arch/arm/mach-omap2/am33xx/clock.c +++ b/arch/arm/mach-omap2/am33xx/clock.c @@ -7,6 +7,7 @@ * * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include <common.h> #include <hang.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c index c33d974dccd..d39e7e4fed1 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c @@ -7,6 +7,7 @@ * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include <common.h> #include <asm/arch/cpu.h> #include <asm/arch/sys_proto.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-omap2/am33xx/clock_am43xx.c b/arch/arm/mach-omap2/am33xx/clock_am43xx.c index abd65ffd77f..8039bc2fe75 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am43xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am43xx.c @@ -8,6 +8,7 @@ * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include <common.h> #include <asm/arch/cpu.h> #include <asm/arch/clock.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c index 41eec005cb1..61b95c93733 100644 --- a/arch/arm/mach-omap2/am33xx/ddr.c +++ b/arch/arm/mach-omap2/am33xx/ddr.c @@ -5,7 +5,7 @@ * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ -#include <config.h> +#include <common.h> #include <log.h> #include <asm/arch/cpu.h> #include <asm/arch/ddr_defs.h> diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c index f19c66822d2..b29250b8d20 100644 --- a/arch/arm/mach-omap2/am33xx/emif4.c +++ b/arch/arm/mach-omap2/am33xx/emif4.c @@ -7,6 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include <common.h> #include <asm/arch/cpu.h> #include <asm/arch/ddr_defs.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-omap2/am33xx/fdt.c b/arch/arm/mach-omap2/am33xx/fdt.c index 3e81616cb74..2ec30b1f9c3 100644 --- a/arch/arm/mach-omap2/am33xx/fdt.c +++ b/arch/arm/mach-omap2/am33xx/fdt.c @@ -3,6 +3,7 @@ * Copyright 2017 Texas Instruments, Inc. */ +#include <common.h> #include <hang.h> #include <linux/libfdt.h> #include <fdt_support.h> diff --git a/arch/arm/mach-omap2/am33xx/mux.c b/arch/arm/mach-omap2/am33xx/mux.c index 06b08e89e7f..49605593979 100644 --- a/arch/arm/mach-omap2/am33xx/mux.c +++ b/arch/arm/mach-omap2/am33xx/mux.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <common.h> #include <asm/arch/mux.h> #include <asm/arch/hardware.h> #include <asm/io.h> diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c index 87afc096602..390d540e85a 100644 --- a/arch/arm/mach-omap2/am33xx/sys_info.c +++ b/arch/arm/mach-omap2/am33xx/sys_info.c @@ -11,6 +11,7 @@ * Syed Mohammed Khasim <khasim@ti.com> */ +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index e1ea3515ac1..aa0ab13d5fb 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -7,6 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ +#include <common.h> #include <ahci.h> #include <log.h> #include <dm/uclass.h> diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c index 2a0c22841d0..390d1f2a649 100644 --- a/arch/arm/mach-omap2/clocks-common.c +++ b/arch/arm/mach-omap2/clocks-common.c @@ -12,6 +12,7 @@ * Santosh Shilimkar <santosh.shilimkar@ti.com> * Rajendra Nayak <rnayak@ti.com> */ +#include <common.h> #include <hang.h> #include <i2c.h> #include <init.h> diff --git a/arch/arm/mach-omap2/emif-common.c b/arch/arm/mach-omap2/emif-common.c index 4d431e20779..9daaeef7319 100644 --- a/arch/arm/mach-omap2/emif-common.c +++ b/arch/arm/mach-omap2/emif-common.c @@ -8,7 +8,7 @@ * Aneesh V <aneesh@ti.com> */ -#include <config.h> +#include <common.h> #include <hang.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-omap2/fdt-common.c b/arch/arm/mach-omap2/fdt-common.c index c6b4c03b508..e90d5776703 100644 --- a/arch/arm/mach-omap2/fdt-common.c +++ b/arch/arm/mach-omap2/fdt-common.c @@ -3,7 +3,7 @@ * Copyright 2016-2017 Texas Instruments, Inc. */ -#include <config.h> +#include <common.h> #include <log.h> #include <linux/libfdt.h> #include <fdt_support.h> diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index 138501602c3..0e4572ca41a 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -10,6 +10,7 @@ * Aneesh V <aneesh@ti.com> * Steve Sakoman <steve@sakoman.com> */ +#include <common.h> #include <debug_uart.h> #include <event.h> #include <fdtdec.h> diff --git a/arch/arm/mach-omap2/mem-common.c b/arch/arm/mach-omap2/mem-common.c index 00f144eb747..19197482aa4 100644 --- a/arch/arm/mach-omap2/mem-common.c +++ b/arch/arm/mach-omap2/mem-common.c @@ -12,7 +12,7 @@ * Syed Mohammed Khasim <khasim@ti.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/cpu.h> #if IS_ENABLED(CONFIG_TARGET_AM335X_GUARDIAN) diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c index 200a08fa5c8..36db5882433 100644 --- a/arch/arm/mach-omap2/omap-cache.c +++ b/arch/arm/mach-omap2/omap-cache.c @@ -11,9 +11,9 @@ * Steve Sakoman <steve@sakoman.com> */ +#include <common.h> #include <cpu_func.h> #include <log.h> -#include <linux/string.h> #include <asm/cache.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-omap2/omap3/am35x_musb.c b/arch/arm/mach-omap2/omap3/am35x_musb.c index d3807623bc6..1121acc0058 100644 --- a/arch/arm/mach-omap2/omap3/am35x_musb.c +++ b/arch/arm/mach-omap2/omap3/am35x_musb.c @@ -8,8 +8,8 @@ * Hema HK <hemahk@ti.com> */ +#include <common.h> #include <log.h> -#include <time.h> #include <dm/device.h> #include <asm/io.h> #include <asm/arch/am35x_def.h> diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c index c5ada607f97..c76a95dd5d0 100644 --- a/arch/arm/mach-omap2/omap3/board.c +++ b/arch/arm/mach-omap2/omap3/board.c @@ -15,6 +15,7 @@ * Syed Mohammed Khasim <khasim@ti.com> * */ +#include <common.h> #include <command.h> #include <dm.h> #include <init.h> diff --git a/arch/arm/mach-omap2/omap3/boot.c b/arch/arm/mach-omap2/omap3/boot.c index 2a36a25e279..ea26115b711 100644 --- a/arch/arm/mach-omap2/omap3/boot.c +++ b/arch/arm/mach-omap2/omap3/boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <spl.h> diff --git a/arch/arm/mach-omap2/omap3/clock.c b/arch/arm/mach-omap2/omap3/clock.c index 417d1eb846f..13685e0567a 100644 --- a/arch/arm/mach-omap2/omap3/clock.c +++ b/arch/arm/mach-omap2/omap3/clock.c @@ -11,12 +11,11 @@ * Syed Mohammed Khasim <khasim@ti.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/clocks_omap3.h> #include <asm/arch/mem.h> -#include <asm/arch/omap.h> #include <asm/arch/sys_proto.h> #include <command.h> diff --git a/arch/arm/mach-omap2/omap3/emac.c b/arch/arm/mach-omap2/omap3/emac.c index 7348e92cabd..d0d0b7a75a6 100644 --- a/arch/arm/mach-omap2/omap3/emac.c +++ b/arch/arm/mach-omap2/omap3/emac.c @@ -6,6 +6,7 @@ * (C) Copyright 2011, Ilya Yanok, Emcraft Systems */ +#include <common.h> #include <net.h> #include <asm/io.h> #include <asm/arch/am35x_def.h> diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index 049eedfeb65..4fbfb387ab0 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -9,7 +9,7 @@ * Texas Instruments Incorporated - https://www.ti.com/ */ -#include <config.h> +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c index 404333689f6..4d27d82c788 100644 --- a/arch/arm/mach-omap2/omap3/sdrc.c +++ b/arch/arm/mach-omap2/omap3/sdrc.c @@ -21,6 +21,7 @@ * Manikandan Pillai <mani.pillai@ti.com> */ +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-omap2/omap3/spl_id_nand.c b/arch/arm/mach-omap2/omap3/spl_id_nand.c index d4712629d9d..84a0b0ade93 100644 --- a/arch/arm/mach-omap2/omap3/spl_id_nand.c +++ b/arch/arm/mach-omap2/omap3/spl_id_nand.c @@ -11,6 +11,7 @@ * Jian Zhang <jzhang@ti.com> */ +#include <common.h> #include <jffs2/load_kernel.h> #include <linux/mtd/rawnand.h> #include <linux/mtd/omap_gpmc.h> diff --git a/arch/arm/mach-omap2/omap3/sys_info.c b/arch/arm/mach-omap2/omap3/sys_info.c index 1e3fcd59796..5f535e27827 100644 --- a/arch/arm/mach-omap2/omap3/sys_info.c +++ b/arch/arm/mach-omap2/omap3/sys_info.c @@ -11,10 +11,9 @@ * Syed Mohammed Khasim <khasim@ti.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/mem.h> /* get mem tables */ -#include <asm/arch/omap.h> #include <asm/arch/sys_proto.h> #include <asm/bootm.h> #include <asm/omap_common.h> diff --git a/arch/arm/mach-omap2/omap4/boot.c b/arch/arm/mach-omap2/omap4/boot.c index a60249f7fd6..90b5380ae39 100644 --- a/arch/arm/mach-omap2/omap4/boot.c +++ b/arch/arm/mach-omap2/omap4/boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> */ +#include <common.h> #include <asm/io.h> #include <asm/omap_common.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-omap2/omap4/emif.c b/arch/arm/mach-omap2/omap4/emif.c index 5b0d3b5c78a..35a51645be7 100644 --- a/arch/arm/mach-omap2/omap4/emif.c +++ b/arch/arm/mach-omap2/omap4/emif.c @@ -8,6 +8,7 @@ * Aneesh V <aneesh@ti.com> */ +#include <common.h> #include <asm/emif.h> #include <asm/arch/sys_proto.h> #include <asm/utils.h> diff --git a/arch/arm/mach-omap2/omap4/hw_data.c b/arch/arm/mach-omap2/omap4/hw_data.c index a81d7655494..d587a4d4def 100644 --- a/arch/arm/mach-omap2/omap4/hw_data.c +++ b/arch/arm/mach-omap2/omap4/hw_data.c @@ -8,6 +8,7 @@ * * Sricharan R <r.sricharan@ti.com> */ +#include <common.h> #include <asm/arch/omap.h> #include <asm/arch/sys_proto.h> #include <asm/omap_common.h> diff --git a/arch/arm/mach-omap2/omap4/hwinit.c b/arch/arm/mach-omap2/omap4/hwinit.c index e3e6cc8e578..27dfa9142dc 100644 --- a/arch/arm/mach-omap2/omap4/hwinit.c +++ b/arch/arm/mach-omap2/omap4/hwinit.c @@ -10,6 +10,7 @@ * Aneesh V <aneesh@ti.com> * Steve Sakoman <steve@sakoman.com> */ +#include <common.h> #include <palmas.h> #include <asm/armv7.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-omap2/omap4/sdram_elpida.c b/arch/arm/mach-omap2/omap4/sdram_elpida.c index a29a264016e..2a18cf0215d 100644 --- a/arch/arm/mach-omap2/omap4/sdram_elpida.c +++ b/arch/arm/mach-omap2/omap4/sdram_elpida.c @@ -9,6 +9,7 @@ * Aneesh V <aneesh@ti.com> */ +#include <common.h> #include <asm/emif.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-omap2/omap5/abb.c b/arch/arm/mach-omap2/omap5/abb.c index 21da0b11661..2f9f8e65d03 100644 --- a/arch/arm/mach-omap2/omap5/abb.c +++ b/arch/arm/mach-omap2/omap5/abb.c @@ -8,7 +8,7 @@ * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> */ -#include <asm/arch/omap.h> +#include <common.h> #include <asm/omap_common.h> #include <asm/io.h> #include <linux/bitops.h> diff --git a/arch/arm/mach-omap2/omap5/boot.c b/arch/arm/mach-omap2/omap5/boot.c index 5b479a87516..15d6836c6ea 100644 --- a/arch/arm/mach-omap2/omap5/boot.c +++ b/arch/arm/mach-omap2/omap5/boot.c @@ -5,6 +5,7 @@ * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> */ +#include <common.h> #include <asm/io.h> #include <asm/omap_common.h> #include <spl.h> diff --git a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c index d50452b5a30..8569eff31ab 100644 --- a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c +++ b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c @@ -6,7 +6,7 @@ * Lokesh Vutla <lokeshvutla@ti.com> */ -#include <config.h> +#include <common.h> #include <hang.h> #include <log.h> #include <asm/utils.h> diff --git a/arch/arm/mach-omap2/omap5/emif.c b/arch/arm/mach-omap2/omap5/emif.c index d243ff3bd8f..2de36b6feca 100644 --- a/arch/arm/mach-omap2/omap5/emif.c +++ b/arch/arm/mach-omap2/omap5/emif.c @@ -8,6 +8,7 @@ * Aneesh V <aneesh@ti.com> for OMAP4 */ +#include <common.h> #include <log.h> #include <asm/emif.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c index f75ec47d821..0ca02e664c4 100644 --- a/arch/arm/mach-omap2/omap5/fdt.c +++ b/arch/arm/mach-omap2/omap5/fdt.c @@ -3,7 +3,7 @@ * Copyright 2016 Texas Instruments, Inc. */ -#include <config.h> +#include <common.h> #include <hang.h> #include <log.h> #include <linux/libfdt.h> diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c index e65727026ef..b39132222ee 100644 --- a/arch/arm/mach-omap2/omap5/hw_data.c +++ b/arch/arm/mach-omap2/omap5/hw_data.c @@ -8,6 +8,7 @@ * * Sricharan R <r.sricharan@ti.com> */ +#include <common.h> #include <palmas.h> #include <asm/arch/omap.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c index 7f41e85c4a6..edab9a92982 100644 --- a/arch/arm/mach-omap2/omap5/hwinit.c +++ b/arch/arm/mach-omap2/omap5/hwinit.c @@ -11,6 +11,7 @@ * Steve Sakoman <steve@sakoman.com> * Sricharan <r.sricharan@ti.com> */ +#include <common.h> #include <cpu_func.h> #include <palmas.h> #include <asm/armv7.h> diff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c index 6bf4cf4a758..786da45fac8 100644 --- a/arch/arm/mach-omap2/omap5/sdram.c +++ b/arch/arm/mach-omap2/omap5/sdram.c @@ -10,6 +10,7 @@ * Sricharan R <r.sricharan@ti.com> */ +#include <common.h> #include <asm/emif.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c index 16bbc93f4a3..64560b21e3f 100644 --- a/arch/arm/mach-omap2/sec-common.c +++ b/arch/arm/mach-omap2/sec-common.c @@ -12,7 +12,7 @@ * Andrew F. Davis <afd@ti.com> */ -#include <config.h> +#include <common.h> #include <command.h> #include <cpu_func.h> #include <hang.h> diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index ed0620e7b63..71fdf5bf487 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -15,7 +15,7 @@ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c index 2326d153b12..0623281a3c7 100644 --- a/arch/arm/mach-omap2/utils.c +++ b/arch/arm/mach-omap2/utils.c @@ -3,9 +3,9 @@ * Copyright 2011 Linaro Limited * Aneesh V <aneesh@ti.com> */ +#include <common.h> #include <env.h> #include <part.h> -#include <vsprintf.h> #include <asm/setup.h> #include <asm/arch/sys_proto.h> #include <asm/omap_common.h> diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index cb377aa1272..054782efbdb 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <config.h> +#include <common.h> #include <asm/omap_common.h> #include <asm/arch/sys_proto.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c index 58ee67eca50..ffae9a01e37 100644 --- a/arch/arm/mach-orion5x/cpu.c +++ b/arch/arm/mach-orion5x/cpu.c @@ -8,6 +8,7 @@ * Written-by: Prafulla Wadaskar <prafulla@marvell.com> */ +#include <common.h> #include <cpu_func.h> #include <init.h> #include <net.h> diff --git a/arch/arm/mach-orion5x/dram.c b/arch/arm/mach-orion5x/dram.c index 228a3f7ad07..5647f847d78 100644 --- a/arch/arm/mach-orion5x/dram.c +++ b/arch/arm/mach-orion5x/dram.c @@ -8,6 +8,7 @@ * Written-by: Prafulla Wadaskar <prafulla@marvell.com> */ +#include <common.h> #include <config.h> #include <init.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-orion5x/timer.c b/arch/arm/mach-orion5x/timer.c index 85736f04e67..b373e59e6fe 100644 --- a/arch/arm/mach-orion5x/timer.c +++ b/arch/arm/mach-orion5x/timer.c @@ -7,7 +7,7 @@ * Written-by: Prafulla Wadaskar <prafulla@marvell.com> */ -#include <config.h> +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c index 0130cad7678..f0f46f2dcb7 100644 --- a/arch/arm/mach-owl/soc.c +++ b/arch/arm/mach-owl/soc.c @@ -5,13 +5,13 @@ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> */ -#include <config.h> #include <cpu_func.h> #include <init.h> #include <asm/cache.h> #include <asm/global_data.h> #include <linux/arm-smccc.h> #include <linux/psci.h> +#include <common.h> #include <asm/io.h> #include <asm/mach-types.h> #include <asm/psci.h> diff --git a/arch/arm/mach-owl/sysmap-owl.c b/arch/arm/mach-owl/sysmap-owl.c index 6f0a220320e..81f6ca2e491 100644 --- a/arch/arm/mach-owl/sysmap-owl.c +++ b/arch/arm/mach-owl/sysmap-owl.c @@ -6,6 +6,7 @@ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> */ +#include <common.h> #include <asm/armv8/mmu.h> static struct mm_region owl_mem_map[] = { diff --git a/arch/arm/mach-renesas/memmap-gen3.c b/arch/arm/mach-renesas/memmap-gen3.c index c50700df078..4dff9e07629 100644 --- a/arch/arm/mach-renesas/memmap-gen3.c +++ b/arch/arm/mach-renesas/memmap-gen3.c @@ -7,6 +7,7 @@ #include <asm/armv8/mmu.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include <cpu_func.h> #define GEN3_NR_REGIONS 16 diff --git a/arch/arm/mach-renesas/memmap-rzg2l.c b/arch/arm/mach-renesas/memmap-rzg2l.c index 3b3c6f7cde9..9934a775220 100644 --- a/arch/arm/mach-renesas/memmap-rzg2l.c +++ b/arch/arm/mach-renesas/memmap-rzg2l.c @@ -8,6 +8,7 @@ #include <asm/armv8/mmu.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include <cpu_func.h> #define RZG2L_NR_REGIONS 16 diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 8a57b8217ff..cd226844b63 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -8,7 +8,7 @@ * Based on puma-rk3399.c: * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ -#include <config.h> +#include <common.h> #include <clk.h> #include <cpu_func.h> #include <env.h> diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 55e9456668a..f9be396aa55 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <adc.h> #include <command.h> #include <env.h> diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c index 82a0b3efef9..b36e559e871 100644 --- a/arch/arm/mach-rockchip/bootrom.c +++ b/arch/arm/mach-rockchip/bootrom.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Google, Inc */ +#include <common.h> #include <hang.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/boot_mode.h> diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index 14c7331e1ab..a62ff53c6a0 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -4,6 +4,7 @@ * Author: Jagan Teki <jagan@amarulasolutions.com> */ +#include <common.h> #include <env.h> #include <init.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c index f0b3c5f83f4..db368a7b8c2 100644 --- a/arch/arm/mach-rockchip/px30-board-tpl.c +++ b/arch/arm/mach-rockchip/px30-board-tpl.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <debug_uart.h> #include <dm.h> #include <init.h> diff --git a/arch/arm/mach-rockchip/px30/clk_px30.c b/arch/arm/mach-rockchip/px30/clk_px30.c index 410134769f8..7edf1321feb 100644 --- a/arch/arm/mach-rockchip/px30/clk_px30.c +++ b/arch/arm/mach-rockchip/px30/clk_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd. */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index 8b1509e55f2..2ec3289d75b 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <clk.h> #include <dm.h> #include <fdt_support.h> diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index c9de57493d8..37e88f5ccb9 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <log.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index 64e100172fa..73f6d241a1c 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -3,6 +3,7 @@ * (C) Copyright 2015-2019 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <debug_uart.h> #include <init.h> #include <asm/io.h> diff --git a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c index 9046601a75e..116dccd7b87 100644 --- a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c index 6c92b31dc84..e8130abdd77 100644 --- a/arch/arm/mach-rockchip/rk3036/rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <init.h> #include <asm/global_data.h> #include <asm/arch-rockchip/grf_rk3036.h> diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c index 308b9e6b8a8..07cd29a33e6 100644 --- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c @@ -2,7 +2,7 @@ /* * (C) Copyright 2015 Rockchip Electronics Co., Ltd */ -#include <config.h> +#include <common.h> #include <init.h> #include <asm/types.h> #include <asm/arch-rockchip/cru_rk3036.h> diff --git a/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c b/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c index 23b75269d50..c2fd1607990 100644 --- a/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c @@ -3,6 +3,7 @@ * (C) Copyright 2015 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c index 88057fad050..c47526dca5d 100644 --- a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index 70b55ca8abf..9a95ff85041 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk3066.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c index ff269b53b54..a598f6400de 100644 --- a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <log.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c index ae552af3ff5..a1b038c6486 100644 --- a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c +++ b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c @@ -3,6 +3,7 @@ * Copyright (c) 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c index f81c57a48be..1406d5d0d32 100644 --- a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c +++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c index c0e71c3fa90..94d1d23e1f4 100644 --- a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index 53b2eaa2d53..ffdcaa49a1e 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <hang.h> #include <init.h> diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c index 6df054e5b27..917ff37c0fc 100644 --- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <log.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/rk322x/clk_rk322x.c b/arch/arm/mach-rockchip/rk322x/clk_rk322x.c index 4703125392e..2e57672b246 100644 --- a/arch/arm/mach-rockchip/rk322x/clk_rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/clk_rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd. */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c index c471a4c9fb7..0d9dca8173c 100644 --- a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c index af6c5d1f59b..fb4c0891d0d 100644 --- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index d1170f7e23d..70cf5002912 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <command.h> #include <dm.h> #include <env.h> diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c index 6413d0a88a1..8b2c2f323a7 100644 --- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <dt-structs.h> #include <log.h> diff --git a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c index 557e21f8199..201bf661f9b 100644 --- a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c @@ -3,6 +3,7 @@ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index 6f88638d156..a0915c72bfa 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -2,6 +2,7 @@ /* *Copyright (c) 2018 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <init.h> #include <malloc.h> #include <asm/arch-rockchip/bootrom.h> diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c index 2d7e9711015..b380ff57233 100644 --- a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c @@ -3,6 +3,7 @@ * (C) Copyright 2018 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c index b0c5af53da6..70c0eb6f98e 100644 --- a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3328.h> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index c86d11943d6..ca3fa81e127 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <init.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c index 02ed366d8b6..d2f267e6353 100644 --- a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <asm/arch-rockchip/clock.h> #include <dm.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/rk3368/clk_rk3368.c b/arch/arm/mach-rockchip/rk3368/clk_rk3368.c index c4d41e52af0..b075319720d 100644 --- a/arch/arm/mach-rockchip/rk3368/clk_rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/clk_rk3368.c @@ -4,6 +4,7 @@ * Author: Andy Yan <andy.yan@rock-chips.org> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index f589bf67328..8f5ca1dfa7c 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -4,6 +4,7 @@ * Copyright (c) 2016 Andreas Färber */ +#include <common.h> #include <init.h> #include <syscon.h> #include <asm/armv8/mmu.h> diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c index 7389c028364..dc2d831dd84 100644 --- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ +#include <common.h> #include <dm.h> #include <log.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c index de552b5903b..9d9a837fc74 100644 --- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c @@ -4,6 +4,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 2d7d0f82a2f..7fa1d7c7b7a 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -3,6 +3,7 @@ * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <fdt_support.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index b92ad54ede5..2b5746cb31b 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <log.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c index 1c6b2ece602..8917edcbd30 100644 --- a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index 1b3e40074e3..b30ea04f737 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c index 255259eabfd..5407e7827f5 100644 --- a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c index 250ec423bd2..3df0bf223e3 100644 --- a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c @@ -3,6 +3,7 @@ * (C) Copyright 2020 Rockchip Electronics Co., Ltd. */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index d3162d3447e..eb65dafe3a2 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include <common.h> #include <spl.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c index f86567fcaf4..7b2cf37d9da 100644 --- a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c @@ -3,6 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c index 5659ae03d71..44b53c407a7 100644 --- a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c @@ -4,6 +4,7 @@ * Author: Andy Yan <andy.yan@rock-chips.com> */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c index d68fbf1bd25..babdf5720b2 100644 --- a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c @@ -3,6 +3,7 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c index 3d64fcd4594..bd8902718f2 100644 --- a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include <common.h> #include <dm.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c index 1c10e9b9f23..40eb9eb7b19 100644 --- a/arch/arm/mach-rockchip/rv1126/rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/rv1126.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include <common.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rv1126.h> diff --git a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c index 67d2f18a8d0..599ea66e3d6 100644 --- a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c @@ -4,6 +4,7 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#include <common.h> #include <dm.h> #include <log.h> #include <syscon.h> diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 1fb01e1c4b1..f2a3d6b1400 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -3,7 +3,7 @@ * Copyright (C) 2017 Rockchip Electronics Co., Ltd. */ -#include <config.h> +#include <common.h> #include <dm.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c index 3dce9b30898..3543267aa57 100644 --- a/arch/arm/mach-rockchip/spl-boot-order.c +++ b/arch/arm/mach-rockchip/spl-boot-order.c @@ -3,6 +3,7 @@ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ +#include <common.h> #include <dm.h> #include <fdt_support.h> #include <log.h> diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 50f04f9474a..2c3e9789cc8 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -3,6 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <bootstage.h> #include <debug_uart.h> #include <dm.h> diff --git a/arch/arm/mach-s5pc1xx/cache.c b/arch/arm/mach-s5pc1xx/cache.c index f0aec7c0fe0..b390bdf8278 100644 --- a/arch/arm/mach-s5pc1xx/cache.c +++ b/arch/arm/mach-s5pc1xx/cache.c @@ -7,6 +7,7 @@ * based on arch/arm/cpu/armv7/omap3/cache.S */ +#include <common.h> #include <cpu_func.h> #include <asm/cache.h> diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c index b92ce1152f6..c90c341b508 100644 --- a/arch/arm/mach-s5pc1xx/clock.c +++ b/arch/arm/mach-s5pc1xx/clock.c @@ -5,7 +5,7 @@ * Heungjun Kim <riverful.kim@samsung.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-s5pc1xx/pinmux.c b/arch/arm/mach-s5pc1xx/pinmux.c index 23b9252827a..818d75164de 100644 --- a/arch/arm/mach-s5pc1xx/pinmux.c +++ b/arch/arm/mach-s5pc1xx/pinmux.c @@ -6,6 +6,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <common.h> #include <asm/arch/pinmux.h> int exynos_pinmux_config(int peripheral, int flags) diff --git a/arch/arm/mach-sc5xx/Kconfig b/arch/arm/mach-sc5xx/Kconfig deleted file mode 100644 index 3846b4fd5b6..00000000000 --- a/arch/arm/mach-sc5xx/Kconfig +++ /dev/null @@ -1,475 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> -# Contact: Greg Malysa <greg.malysa@timesys.com> -# - -# All 32-bit platforms require SYS_ARM_CACHE_WRITETHROUGH -# But it is ignored if selected here, so it must be in the defconfig - -if ARCH_SC5XX - -config SC57X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG - select COMMON_CLK_ADI_SC57X - select TIMER - select ADI_SC5XX_TIMER - -config SC58X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG - select COMMON_CLK_ADI_SC58X - select TIMER - select ADI_SC5XX_TIMER - -config SC59X - bool - select SUPPORT_SPL - select CPU_V7A - select PANIC_HANG - select COMMON_CLK_ADI_SC594 - select TIMER - select ADI_SC5XX_TIMER - select NOP_PHY - -config SC59X_64 - bool - select SUPPORT_SPL - select PANIC_HANG - select MMC_SDHCI_ADMA_FORCE_32BIT - select ARM64 - select DM - select DM_SERIAL - select COMMON_CLK_ADI_SC598 - select GICV3 - select GIC_600_CLEAR_RDPD - select NOP_PHY - -config SC_BOOT_MODE - int "SC5XX boot mode select" - default 1 - range 0 7 - help - Mode 0: do nothing, just idle - Mode 1: boot ldr out of serial flash - Mode 7: boot ldr over uart - -config SC_BOOT_SPI_BUS - int "sc5xx spi boot bus" - default 2 - range 0 4 - help - This is the SPI peripheral number to use for booting, X in the - expression `sf probe X:Y` - -config SC_BOOT_SPI_SSEL - int "sc5xx spi boot chipselect" - default 1 - range 0 6 - help - This is the SPI chip select number to use for booting, Y in the - expression `sf probe X:Y` - -config SC_BOOT_OSPI_BUS - int "sc5xx ospi boot bus" - default 0 - help - This is the OSPI peripheral number to use for booting, X in the - expression `sf probe X:Y` - -config SC_BOOT_OSPI_SSEL - int "sc5xx ospi boot chipselect" - default 0 - help - This is the OSPI chip select number to use for booting, Y in the - expression `sf probe X:Y` - -config SYS_FLASH_BASE - hex - default 0x60000000 - -config UART_CONSOLE - int - default 0 - -config UART4_SERIAL - bool - depends on DM_SERIAL - default y - -config WDT_ADI - bool - default y - -config WATCHDOG_TIMEOUT_MSECS - int - default 30000 - -config DW_PORTS - int - default 1 - -config ADI_BUG_EZKHW21 - bool "SC584 EZKIT phy bug workaround" - depends on SC58X - help - This workaround affects the SC584 EZKIT and addresses bug EZKHW21. - It disables gigabit ethernet mode and limits the board to 100 Mbps - -config ADI_CARRIER_SOMCRR_EZKIT - bool "Support the EV-SOMCRR-EZKIT" - depends on (SC59X || SC59X_64) - help - Say y to include support for the EV-SOMCRR-EZKIT carrier board, - which is compatible with the SC594 and SC598 SOMs. The EZKIT is - mutually incompatible with the EZLITE. - -config ADI_CARRIER_SOMCRR_EZLITE - bool "Support the EV-SOMCRR-EZLITE" - depends on (SC59X || SC59X_64) - help - Say y to include support for the EV-SOMCRR-EZLITE carrier board, - which is compatible with the SC594 and SC598 SOMs. The EZLITE is - mutually incompatible with the EZKIT. - -config ADI_SPL_FORCE_BMODE - int "Force the SPL to use this BMODE device during next boot stage" - default 0 - range 0 9 - depends on SPL - help - Force the SPL to use this BMODE device during next boot stage. - For example, if booting via QSPI, we can force the second stage - Of the boot process to use other peripherals via: - 1 = QSPI -> QSPI - 5 = QSPI -> OSPI - 6 = QSPI -> eMMC - -config ADI_USE_DMC0 - bool "Configure DMC0" - default y - help - During hardware initialization, channel 0 of the DMC will be - initialized. Select this if you have DMC0 connected to external - DDR memory. This is expected to be true for every board using - an SC5xx SoC. - -config ADI_USE_DMC1 - bool "Configure DMC1" - help - During hardware initialization, channel 1 of the DMC will be - initialized. Not all processors have a DMC1. Select this if your - SoC has DMC1 and you have it connected to external DDR memory. - -config ADI_USE_DDR2 - bool "Configure DMC for DDR2 mode" - help - Configure the DMC in DDR2 mode. The default is DDR3 and not all - parts may actually support DDR2. Please consult the manual for - the SoC that you are using to determine if DDR2 mode is supported. - This also requires that DDR2 memory is present on the board or it - will probably cause strange failure. - -menu "Clock configuration" - -config CGU0_DF_DIV - int "CGU0_DF_DIV" - range 0 1 - help - Select 0 to pass CLKIN to PLL - Select 1 to pass CLKIN/2 to PLL - -config CGU0_VCO_MULT - int "CGU0_VCO_MULT" - range 0 127 - help - VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL - A value of 0 means 128 - -config CGU0_CCLK_DIV - int "CGU0_CCLK_DIV" - range 0 31 - help - CCLK_DIV controls the core clock divider - A value of 0 means 32 - CCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / CCLK_DIV - -config CGU0_SCLK_DIV - int "CGU0_SCLK_DIV" - range 0 31 - help - SCLK_DIV controls the system clock divider - A value of 0 means 32 - SCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / SYSCLK_DIV - -config CGU0_SCLK0_DIV - int "CGU0_SCLK0_DIV" - range 0 7 - help - A value of 0 means 8 - SCLK0 = SCLK / SCLK0_DIV - -config CGU0_SCLK1_DIV - int "CGU0_SCLK1_DIV" - depends on (SC57X || SC58X) - range 0 7 - help - A value of 0 means 8 - SCLK1 = SCLK / SCLK1_DIV - -config CGU0_DCLK_DIV - int "CGU0_DCLK_DIV" - range 0 31 - help - DCLK_DIV controls the DDR clock divider - A value of 0 means 32 - DCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / DCLK_DIV - -config CGU0_OCLK_DIV - int "CGU0_OCLK_DIV" - range 0 127 - help - OCLK_DIV controls the output clock divider - A value of 0 means 128 - OCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / OCLK_DIV - -config CGU0_DIV_S1SELEX - int "CGU0_DIV_S1SELEX" - depends on !SC57X && !SC58X - range 0 255 - help - CGU0 SCLK1 Extended divisor register. - A value of 0 means 256. - SCLK1 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S1SELEX - -config CGU0_CLKOUTSEL - int "CGU0_CLKOUTSEL" - default 0 - range 0 31 - help - Select signal driven through CLKOUT pin multiplexer. - This value varies on each SOC. Refer to - CGU_CLKOUTSEL.CLKOUTSEL in the Hardware Reference Manual - for values applicable to each SOC. - Commonly, values 0 and 1 select CLKIN0 or CLKIN1 respectively. - -config CGU1_PLL3_DDRCLK - bool "DDRCLK From 3rd PLL" - depends on SC59X_64 - help - 3rd PLL output is connected to DMC block when set. - When cleared, DDR clock is CLKO3 output of CDU. - -config CGU1_PLL3_VCO_MSEL - int "CGU0_PLL3_VCO_MSEL" - depends on CGU1_PLL3_DDRCLK - range 1 128 - help - PLL multiplier value for the 3rd PLL. - DCLK = (CLKIN * PLL3_VCO_MSEL) / PLL3_DCLK_DIV - -config CGU1_PLL3_DCLK_DIV - int "CGU0_PLL3_DCLK_DIV" - depends on CGU1_PLL3_DDRCLK - range 1 32 - help - PLL divider value for the 3rd PLL. - DCLK = (CLKIN * PLL3_VCO_MSEL) / PLL3_DCLK_DIV - -config CGU1_DF_DIV - int "CGU1_DF_DIV" - range 0 1 - help - Select 0 to pass CLKIN to PLL - Select 1 to pass CLKIN/2 to PLL - -config CGU1_VCO_MULT - int "CGU1_VCO_MULT" - range 0 127 - help - VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL - A value of 0 means 128 - -config CGU1_CCLK_DIV - int "CGU1_CCLK_DIV" - range 0 31 - help - CCLK_DIV controls the core clock divider - A value of 0 means 32 - CCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / CCLK_DIV - -config CGU1_SCLK_DIV - int "CGU1_SCLK_DIV" - range 0 31 - help - SCLK_DIV controls the system clock divider - A value of 0 means 32 - SCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / SYSCLK_DIV - -config CGU1_SCLK0_DIV - int "CGU1_SCLK0_DIV" - depends on (SC57X || SC58X || SC59X) - range 0 7 - help - A value of 0 means 8 - SCLK0 = SCLK / SCLK0_DIV - -config CGU1_SCLK1_DIV - int "CGU1_SCLK1_DIV" - depends on (SC57X || SC58X) - range 0 7 - help - A value of 0 means 8 - SCLK1 = SCLK / SCLK1_DIV - -config CGU1_DCLK_DIV - int "CGU1_DCLK_DIV" - range 0 31 - help - DCLK_DIV controls the DDR clock divider - A value of 0 means 32 - DCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / DCLK_DIV - -config CGU1_OCLK_DIV - int "CGU1_OCLK_DIV" - range 0 127 - help - OCLK_DIV controls the output clock divider - A value of 0 means 128 - OCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / OCLK_DIV - -config CGU1_DIV_S0SELEX - int "CGU1_DIV_S0SELEX" - depends on !SC57X && !SC58X && !SC59X - range 0 255 - help - CGU1 SCLK0 Extended divisor register. - A value of 0 means 256. - SCLK0 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S0SELEX - -config CGU1_DIV_S1SELEX - int "CGU1_DIV_S1SELEX" - depends on !SC57X && !SC58X - range 0 255 - help - CGU1 SCLK1 Extended divisor register. - A value of 0 means 256. - SCLK1 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S1SELEX - -config CDU0_CGU1_CLKIN - int "CDU0 CGU1 CLKINn Select" - default 0 - range 0 1 - help - Selects source clock for CGU1. - 0 for CLKIN0 - 1 for CLKIN1 - -config CDU0_CLKO0 - int "CDU0_CLKO0" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO1 - int "CDU0_CLKO1" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO2 - int "CDU0_CLKO2" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO3 - int "CDU0_CLKO3" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO4 - int "CDU0_CLKO4" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO5 - int "CDU0_CLKO5" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO6 - int "CDU0_CLKO6" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO7 - int "CDU0_CLKO7" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO8 - int "CDU0_CLKO8" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO9 - int "CDU0_CLKO9" - range 1 7 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO10 - int "CDU0_CLKO10" - range 1 7 - depends on (SC59X || SC59X_64) - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO12 - int "CDU0_CLKO12" - range 1 7 - depends on (SC59X || SC59X_64) - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO13 - int "CDU0_CLKO13" - range 1 7 - depends on SC59X_64 - help - Clock source select. Refer to SOC Hardware Reference Manual - -config CDU0_CLKO14 - int "CDU0_CLKO14" - range 1 7 - depends on SC59X_64 - help - Clock source select. Refer to SOC Hardware Reference Manual - -endmenu - -config ADI_GPIO - bool - default y - -config PINCTRL_ADI - bool - default y - -endif diff --git a/arch/arm/mach-sc5xx/Makefile b/arch/arm/mach-sc5xx/Makefile deleted file mode 100644 index eeb56c078b3..00000000000 --- a/arch/arm/mach-sc5xx/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> -# Contact: Greg Malysa <greg.malysa@timesys.com> -# - -obj-y += soc.o init/ - -obj-$(CONFIG_SC57X) += sc57x.o -obj-$(CONFIG_SC58X) += sc58x.o -obj-$(CONFIG_SC59X) += sc59x.o -obj-$(CONFIG_SC59X_64) += sc59x_64.o - -obj-$(CONFIG_SPL_BUILD) += spl.o -obj-$(CONFIG_SYSCON) += rcu.o diff --git a/arch/arm/mach-sc5xx/config.mk b/arch/arm/mach-sc5xx/config.mk deleted file mode 100644 index 580964e559c..00000000000 --- a/arch/arm/mach-sc5xx/config.mk +++ /dev/null @@ -1,16 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> -# Contact: Greg Malysa <greg.malysa@timesys.com> -# - -ifdef CONFIG_SPL_BUILD -INPUTS-y += $(obj)/u-boot-spl.ldr -endif - -LDR_FLAGS += --bcode=$(CONFIG_SC_BOOT_MODE) -LDR_FLAGS += --use-vmas diff --git a/arch/arm/mach-sc5xx/init/Makefile b/arch/arm/mach-sc5xx/init/Makefile deleted file mode 100644 index 9d4920fe076..00000000000 --- a/arch/arm/mach-sc5xx/init/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-or-later -# -# (C) Copyright 2022 - Analog Devices, Inc. -# -# Written and/or maintained by Timesys Corporation -# -# Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> -# Contact: Greg Malysa <greg.malysa@timesys.com> -# - -obj-y += dmcinit.o clkinit.o diff --git a/arch/arm/mach-sc5xx/init/clkinit.c b/arch/arm/mach-sc5xx/init/clkinit.c deleted file mode 100644 index ae53cd61efd..00000000000 --- a/arch/arm/mach-sc5xx/init/clkinit.c +++ /dev/null @@ -1,558 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/io.h> -#include <linux/types.h> -#include "clkinit.h" -#include "dmcinit.h" - -#ifdef CONFIG_CGU0_SCLK0_DIV - #define VAL_CGU0_SCLK0_DIV CONFIG_CGU0_SCLK0_DIV -#else - #define VAL_CGU0_SCLK0_DIV 1 -#endif -#ifdef CONFIG_CGU0_SCLK1_DIV - #define VAL_CGU0_SCLK1_DIV CONFIG_CGU0_SCLK1_DIV -#else - #define VAL_CGU0_SCLK1_DIV 1 -#endif -#ifdef CONFIG_CGU0_DIV_S0SELEX - #define VAL_CGU0_DIV_S0SELEX CONFIG_CGU0_DIV_S0SELEX -#else - #define VAL_CGU0_DIV_S0SELEX -1 -#endif -#ifdef CONFIG_CGU0_DIV_S1SELEX - #define VAL_CGU0_DIV_S1SELEX CONFIG_CGU0_DIV_S1SELEX -#else - #define VAL_CGU0_DIV_S1SELEX -1 -#endif -#ifdef CONFIG_CGU0_CLKOUTSEL - #define VAL_CGU0_CLKOUTSEL CONFIG_CGU0_CLKOUTSEL -#else - #define VAL_CGU0_CLKOUTSEL -1 -#endif -#ifdef CONFIG_CGU1_SCLK0_DIV - #define VAL_CGU1_SCLK0_DIV CONFIG_CGU1_SCLK0_DIV -#else - #define VAL_CGU1_SCLK0_DIV 1 -#endif -#ifdef CONFIG_CGU1_SCLK1_DIV - #define VAL_CGU1_SCLK1_DIV CONFIG_CGU1_SCLK1_DIV -#else - #define VAL_CGU1_SCLK1_DIV 1 -#endif -#ifdef CONFIG_CGU1_DIV_S0SELEX - #define VAL_CGU1_DIV_S0SELEX CONFIG_CGU1_DIV_S0SELEX -#else - #define VAL_CGU1_DIV_S0SELEX -1 -#endif -#ifdef CONFIG_CGU1_DIV_S1SELEX - #define VAL_CGU1_DIV_S1SELEX CONFIG_CGU1_DIV_S1SELEX -#else - #define VAL_CGU1_DIV_S1SELEX -1 -#endif -#ifdef CONFIG_CGU1_CLKOUTSEL - #define VAL_CGU1_CLKOUTSEL CONFIG_CGU1_CLKOUTSEL -#else - #define VAL_CGU1_CLKOUTSEL -1 -#endif - -#define REG_MISC_REG10_tst_addr 0x310A902C - -#define CGU0_REGBASE 0x3108D000 -#define CGU1_REGBASE 0x3108E000 - -#define CGU_CTL 0x00 // CGU0 Control Register -#define CGU_PLLCTL 0x04 // CGU0 PLL Control Register -#define CGU_STAT 0x08 // CGU0 Status Register -#define CGU_DIV 0x0C // CGU0 Clocks Divisor Register -#define CGU_CLKOUTSEL 0x10 // CGU0 CLKOUT Select Register -#define CGU_DIVEX 0x40 // CGU0 DIV Register Extension - -#define BITP_CGU_DIV_OSEL 22 // OUTCLK Divisor -#define BITP_CGU_DIV_DSEL 16 // DCLK Divisor -#define BITP_CGU_DIV_S1SEL 13 // SCLK 1 Divisor -#define BITP_CGU_DIV_SYSSEL 8 // SYSCLK Divisor -#define BITP_CGU_DIV_S0SEL 5 // SCLK 0 Divisor -#define BITP_CGU_DIV_CSEL 0 // CCLK Divisor - -#define BITP_CGU_CTL_MSEL 8 // Multiplier Select -#define BITP_CGU_CTL_DF 0 // Divide Frequency - -#define BITM_CGU_STAT_CLKSALGN 0x00000008 -#define BITM_CGU_STAT_PLOCK 0x00000004 -#define BITM_CGU_STAT_PLLBP 0x00000002 -#define BITM_CGU_STAT_PLLEN 0x00000001 - -/* PLL Multiplier and Divisor Selections (Required Value, Bit Position) */ -/* PLL Multiplier Select */ -#define MSEL(X) (((X) << BITP_CGU_CTL_MSEL) & \ - BITM_CGU_CTL_MSEL) -/* Divide frequency[true or false] */ -#define DF(X) (((X) << BITP_CGU_CTL_DF) & \ - BITM_CGU_CTL_DF) -/* Core Clock Divisor Select */ -#define CSEL(X) (((X) << BITP_CGU_DIV_CSEL) & \ - BITM_CGU_DIV_CSEL) -/* System Clock Divisor Select */ -#define SYSSEL(X) (((X) << BITP_CGU_DIV_SYSSEL) & \ - BITM_CGU_DIV_SYSSEL) -/* SCLK0 Divisor Select */ -#define S0SEL(X) (((X) << BITP_CGU_DIV_S0SEL) & \ - BITM_CGU_DIV_S0SEL) -/* SCLK1 Divisor Select */ -#define S1SEL(X) (((X) << BITP_CGU_DIV_S1SEL) & \ - BITM_CGU_DIV_S1SEL) -/* DDR Clock Divisor Select */ -#define DSEL(X) (((X) << BITP_CGU_DIV_DSEL) & \ - BITM_CGU_DIV_DSEL) -/* OUTCLK Divisor Select */ -#define OSEL(X) (((X) << BITP_CGU_DIV_OSEL) & \ - BITM_CGU_DIV_OSEL) -/* CLKOUT select */ -#define CLKOUTSEL(X) (((X) << BITP_CGU_CLKOUTSEL_CLKOUTSEL) & \ - BITM_CGU_CLKOUTSEL_CLKOUTSEL) -#define S0SELEX(X) (((X) << BITP_CGU_DIVEX_S0SELEX) & \ - BITM_CGU_DIVEX_S0SELEX) -#define S1SELEX(X) (((X) << BITP_CGU_DIVEX_S1SELEX) & \ - BITM_CGU_DIVEX_S1SELEX) - -struct CGU_Settings { - phys_addr_t rbase; - u32 ctl_MSEL:7; - u32 ctl_DF:1; - u32 div_CSEL:5; - u32 div_SYSSEL:5; - u32 div_S0SEL:3; - u32 div_S1SEL:3; - u32 div_DSEL:5; - u32 div_OSEL:7; - s16 divex_S0SELEX; - s16 divex_S1SELEX; - s8 clkoutsel; -}; - -/* CGU Registers */ -#define BITM_CGU_CTL_LOCK 0x80000000 /* Lock */ - -#define BITM_CGU_CTL_MSEL 0x00007F00 /* Multiplier Select */ -#define BITM_CGU_CTL_DF 0x00000001 /* Divide Frequency */ -#define BITM_CGU_CTL_S1SELEXEN 0x00020000 /* SCLK1 Extension Divider Enable */ -#define BITM_CGU_CTL_S0SELEXEN 0x00010000 /* SCLK0 Extension Divider Enable */ - -#define BITM_CGU_DIV_LOCK 0x80000000 /* Lock */ -#define BITM_CGU_DIV_UPDT 0x40000000 /* Update Clock Divisors */ -#define BITM_CGU_DIV_ALGN 0x20000000 /* Align */ -#define BITM_CGU_DIV_OSEL 0x1FC00000 /* OUTCLK Divisor */ -#define BITM_CGU_DIV_DSEL 0x001F0000 /* DCLK Divisor */ -#define BITM_CGU_DIV_S1SEL 0x0000E000 /* SCLK 1 Divisor */ -#define BITM_CGU_DIV_SYSSEL 0x00001F00 /* SYSCLK Divisor */ -#define BITM_CGU_DIV_S0SEL 0x000000E0 /* SCLK 0 Divisor */ -#define BITM_CGU_DIV_CSEL 0x0000001F /* CCLK Divisor */ - -#define BITP_CGU_DIVEX_S0SELEX 0 -#define BITM_CGU_DIVEX_S0SELEX 0x000000FF /* SCLK 0 Extension Divisor */ - -#define BITP_CGU_DIVEX_S1SELEX 16 -#define BITM_CGU_DIVEX_S1SELEX 0x00FF0000 /* SCLK 1 Extension Divisor */ - -#define BITM_CGU_PLLCTL_PLLEN 0x00000008 /* PLL Enable */ -#define BITM_CGU_PLLCTL_PLLBPCL 0x00000002 /* PLL Bypass Clear */ -#define BITM_CGU_PLLCTL_PLLBPST 0x00000001 /* PLL Bypass Set */ - -#define BITP_CGU_CLKOUTSEL_CLKOUTSEL 0 /* CLKOUT Select */ -#define BITM_CGU_CLKOUTSEL_CLKOUTSEL 0x0000001F /* CLKOUT Select */ - -#define CGU_STAT_MASK (BITM_CGU_STAT_PLLEN | BITM_CGU_STAT_PLOCK | \ - BITM_CGU_STAT_CLKSALGN) -#define CGU_STAT_ALGN_LOCK (BITM_CGU_STAT_PLLEN | BITM_CGU_STAT_PLOCK) - -/* Clock Distribution Unit Registers */ -#define REG_CDU0_CFG0 0x3108F000 -#define REG_CDU0_CFG1 0x3108F004 -#define REG_CDU0_CFG2 0x3108F008 -#define REG_CDU0_CFG3 0x3108F00C -#define REG_CDU0_CFG4 0x3108F010 -#define REG_CDU0_CFG5 0x3108F014 -#define REG_CDU0_CFG6 0x3108F018 -#define REG_CDU0_CFG7 0x3108F01C -#define REG_CDU0_CFG8 0x3108F020 -#define REG_CDU0_CFG9 0x3108F024 -#define REG_CDU0_CFG10 0x3108F028 -#define REG_CDU0_CFG11 0x3108F02C -#define REG_CDU0_CFG12 0x3108F030 -#define REG_CDU0_CFG13 0x3108F034 -#define REG_CDU0_CFG14 0x3108F038 -#define REG_CDU0_STAT 0x3108F040 -#define REG_CDU0_CLKINSEL 0x3108F044 -#define REG_CDU0_REVID 0x3108F048 - -#define BITM_REG10_MSEL3 0x000007F0 -#define BITP_REG10_MSEL3 4 - -#define BITM_REG10_DSEL3 0x0001F000 -#define BITP_REG10_DSEL3 12 - -/* Selected clock macros */ -#define CGUn_MULT(cgu) ((CONFIG_CGU##cgu##_VCO_MULT == 0) ? \ - 128 : CONFIG_CGU##cgu##_VCO_MULT) -#define CGUn_DIV(clkname, cgu) ((CONFIG_CGU##cgu##_##clkname##_DIV == 0) ? \ - 32 : CONFIG_CGU##cgu##_##clkname##_DIV) -#define CCLK1_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ - CGUn_DIV(CCLK, cgu)) -#define CCLK2_n_RATIO(cgu) (((CGUn_MULT(cgu) * 2) / 3) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) -#define DCLK_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ - CGUn_DIV(DCLK, cgu)) -#define SYSCLK_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ - (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ - CGUn_DIV(SCLK, cgu)) -#define PLL3_RATIO ((CONFIG_CGU1_PLL3_VCO_MSEL) / \ - (CONFIG_CGU1_PLL3_DCLK_DIV)) - -#if (1 == CONFIG_CDU0_CLKO2) - #define ARMCLK_IN 0 - #define ARMCLK_RATIO CCLK1_n_RATIO(0) -#elif (3 == CONFIG_CDU0_CLKO2) && \ - (defined(CONFIG_SC57X) || defined(CONFIG_SC58X)) - #define ARMCLK_IN 0 - #define ARMCLK_RATIO SYSCLK_n_RATIO(0) -#elif (5 == CONFIG_CDU0_CLKO2) && defined(CONFIG_SC59X_64) - #define ARMCLK_IN 0 - #define ARMCLK_RATIO CCLK2_n_RATIO(0) -#elif (7 == CONFIG_CDU0_CLKO2) && defined(CONFIG_SC59X_64) - #define ARMCLK_IN CDU0_CGU1_CLKIN - #define ARMCLK_RATIO CCLK2_n_RATIO(1) -#endif - -#ifdef CONFIG_CGU1_PLL3_DDRCLK - #define DDRCLK_IN CDU0_CGU1_CLKIN - #define DDRCLK_RATIO PLL3_RATIO -#elif (1 == CONFIG_CDU0_CLKO3) - #define DDRCLK_IN 0 - #define DDRCLK_RATIO DCLK_n_RATIO(0) -#elif (3 == CONFIG_CDU0_CLKO3) - #define DDRCLK_IN CDU0_CGU1_CLKIN - #define DDRCLK_RATIO DCLK_n_RATIO(1) -#endif - -#ifndef ARMCLK_RATIO - #error Invalid/unknown ARMCLK selection! -#endif -#ifndef DDRCLK_RATIO - #error Invalid/unknown DDRCLK selection! -#endif - -#define ARMDDR_CLK_RATIO_FPERCISION 1000 - -#if ARMCLK_IN != DDRCLK_IN - #ifndef CUSTOM_ARMDDR_CLK_RATIO - /** - * SYS_CLKINx are defined within the device tree, not configs. - * Thus, we can only determine cross-CGU clock ratios if they - * use the same SYS_CLKINx. - */ - #error Define CUSTOM_ARMDDR_CLK_RATIO for different SYS_CLKINs - #else - #define ARMDDR_CLK_RATIO CUSTOM_ARMDDR_CLK_RATIO - #endif -#else - #define ARMDDR_CLK_RATIO (ARMDDR_CLK_RATIO_FPERCISION *\ - ARMCLK_RATIO / DDRCLK_RATIO) -#endif - -void dmcdelay(uint32_t delay) -{ - /* There is no zero-overhead loop on ARM, so assume each iteration - * takes 4 processor cycles (based on examination of -O3 and -Ofast - * output). - */ - u32 i, remainder; - - /* Convert DDR cycles to core clock cycles */ - u32 f = delay * ARMDDR_CLK_RATIO; - - delay = f + 500; - delay /= ARMDDR_CLK_RATIO_FPERCISION; - - /* Round up to multiple of 4 */ - remainder = delay % 4; - if (remainder != 0u) - delay += (4u - remainder); - - for (i = 0; i < delay; i += 4) - asm("nop"); -} - -static void program_cgu(const struct CGU_Settings *cgu) -{ - const uintptr_t b = cgu->rbase; - const bool use_extension0 = cgu->divex_S0SELEX >= 0; - const bool use_extension1 = cgu->divex_S1SELEX >= 0; - u32 temp; - - temp = OSEL(cgu->div_OSEL); - temp |= SYSSEL(cgu->div_SYSSEL); - temp |= CSEL(cgu->div_CSEL); - temp |= DSEL(cgu->div_DSEL); - temp |= (S0SEL(cgu->div_S0SEL)); - temp |= (S1SEL(cgu->div_S1SEL)); - temp &= ~BITM_CGU_DIV_LOCK; - - //Put PLL in to Bypass Mode - writel(BITM_CGU_PLLCTL_PLLEN | BITM_CGU_PLLCTL_PLLBPST, - b + CGU_PLLCTL); - while (!(readl(b + CGU_STAT) & BITM_CGU_STAT_PLLBP)) - ; - - while (!((readl(b + CGU_STAT) & CGU_STAT_MASK) == CGU_STAT_ALGN_LOCK)) - ; - - dmcdelay(1000); - - writel(temp & (~BITM_CGU_DIV_ALGN) & (~BITM_CGU_DIV_UPDT), - b + CGU_DIV); - - dmcdelay(1000); - - temp = MSEL(cgu->ctl_MSEL) | DF(cgu->ctl_DF); - if (use_extension0) - temp |= BITM_CGU_CTL_S0SELEXEN; - if (use_extension1) - temp |= BITM_CGU_CTL_S1SELEXEN; - - writel(temp & (~BITM_CGU_CTL_LOCK), b + CGU_CTL); - - if (use_extension0 || use_extension1) { - u32 mask = BITM_CGU_CTL_S1SELEXEN | BITM_CGU_CTL_S0SELEXEN; - - while (!(readl(b + CGU_CTL) & mask)) - ; - - temp = readl(b + CGU_DIVEX); - - if (use_extension0) { - temp &= ~BITM_CGU_DIVEX_S0SELEX; - temp |= S0SELEX(cgu->divex_S0SELEX); - } - - if (use_extension1) { - temp &= ~BITM_CGU_DIVEX_S1SELEX; - temp |= S1SELEX(cgu->divex_S1SELEX); - } - - writel(temp, b + CGU_DIVEX); - } - - dmcdelay(1000); - - //Take PLL out of Bypass Mode - writel(BITM_CGU_PLLCTL_PLLEN | BITM_CGU_PLLCTL_PLLBPCL, - b + CGU_PLLCTL); - while ((readl(b + CGU_STAT) & - (BITM_CGU_STAT_PLLBP | BITM_CGU_STAT_CLKSALGN))) - ; - - dmcdelay(1000); - - if (cgu->clkoutsel >= 0) { - temp = readl(b + CGU_CLKOUTSEL); - temp &= ~BITM_CGU_CLKOUTSEL_CLKOUTSEL; - temp |= CLKOUTSEL(cgu->clkoutsel); - writel(temp, b + CGU_CLKOUTSEL); - } -} - -void adi_config_third_pll(void) -{ -#if defined(CONFIG_CGU1_PLL3_VCO_MSEL) && defined(CONFIG_CGU1_PLL3_DCLK_DIV) - u32 temp; - - u32 msel = CONFIG_CGU1_PLL3_VCO_MSEL - 1; - u32 dsel = CONFIG_CGU1_PLL3_DCLK_DIV - 1; - - temp = readl(REG_MISC_REG10_tst_addr); - temp &= 0xFFFE0000; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(4000u); - - //update MSEL [10:4] - temp = readl(REG_MISC_REG10_tst_addr); - temp |= ((msel << BITP_REG10_MSEL3) & BITM_REG10_MSEL3); - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x2; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(100000u); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x1; - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x800; - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp &= 0xFFFFF7F8; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(4000u); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= ((dsel << BITP_REG10_DSEL3) & BITM_REG10_DSEL3); - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x4; - writel(temp, REG_MISC_REG10_tst_addr); - - dmcdelay(100000u); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x1; - writel(temp, REG_MISC_REG10_tst_addr); - - temp = readl(REG_MISC_REG10_tst_addr); - temp |= 0x800; - writel(temp, REG_MISC_REG10_tst_addr); -#endif -} - -static void Active_To_Fullon(const struct CGU_Settings *pCGU) -{ - u32 tmp; - - while (1) { - tmp = readl(pCGU->rbase + CGU_STAT); - if ((tmp & BITM_CGU_STAT_PLLEN) && - (tmp & BITM_CGU_STAT_PLLBP)) - break; - } - - writel(BITM_CGU_PLLCTL_PLLBPCL, pCGU->rbase + CGU_PLLCTL); - - while (1) { - tmp = readl(pCGU->rbase + CGU_STAT); - if ((tmp & BITM_CGU_STAT_PLLEN) && - ~(tmp & BITM_CGU_STAT_PLLBP) && - ~(tmp & BITM_CGU_STAT_CLKSALGN)) - break; - } -} - -static void CGU_Init(const struct CGU_Settings *pCGU) -{ - const uintptr_t b = pCGU->rbase; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - if (readl(b + CGU_STAT) & BITM_CGU_STAT_PLLEN) - writel(BITM_CGU_PLLCTL_PLLEN, b + CGU_PLLCTL); - - dmcdelay(1000); -#endif - - /* Check if processor is in Active mode */ - if (readl(b + CGU_STAT) & BITM_CGU_STAT_PLLBP) - Active_To_Fullon(pCGU); - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmcdelay(1000); -#endif - - program_cgu(pCGU); -} - -void cgu_init(void) -{ - const struct CGU_Settings dividers0 = { - .rbase = CGU0_REGBASE, - .ctl_MSEL = CONFIG_CGU0_VCO_MULT, - .ctl_DF = CONFIG_CGU0_DF_DIV, - .div_CSEL = CONFIG_CGU0_CCLK_DIV, - .div_SYSSEL = CONFIG_CGU0_SCLK_DIV, - .div_S0SEL = VAL_CGU0_SCLK0_DIV, - .div_S1SEL = VAL_CGU0_SCLK1_DIV, - .div_DSEL = CONFIG_CGU0_DCLK_DIV, - .div_OSEL = CONFIG_CGU0_OCLK_DIV, - .divex_S0SELEX = VAL_CGU0_DIV_S0SELEX, - .divex_S1SELEX = VAL_CGU0_DIV_S1SELEX, - .clkoutsel = VAL_CGU0_CLKOUTSEL, - }; - const struct CGU_Settings dividers1 = { - .rbase = CGU1_REGBASE, - .ctl_MSEL = CONFIG_CGU1_VCO_MULT, - .ctl_DF = CONFIG_CGU1_DF_DIV, - .div_CSEL = CONFIG_CGU1_CCLK_DIV, - .div_SYSSEL = CONFIG_CGU1_SCLK_DIV, - .div_S0SEL = VAL_CGU1_SCLK0_DIV, - .div_S1SEL = VAL_CGU1_SCLK1_DIV, - .div_DSEL = CONFIG_CGU1_DCLK_DIV, - .div_OSEL = CONFIG_CGU1_OCLK_DIV, - .divex_S0SELEX = VAL_CGU1_DIV_S0SELEX, - .divex_S1SELEX = VAL_CGU1_DIV_S1SELEX, - .clkoutsel = VAL_CGU1_CLKOUTSEL, - }; - - CGU_Init(÷rs0); - CGU_Init(÷rs1); -} - -#define CONFIGURE_CDU0(a, b, c) \ - writel(a, b); \ - while (readl(REG_CDU0_STAT) & (1 << (c))) - -void cdu_init(void) -{ - while (readl(REG_CDU0_STAT) & 0xffff) - ; - writel((CONFIG_CDU0_CGU1_CLKIN & 0x1), REG_CDU0_CLKINSEL); - - CONFIGURE_CDU0(CONFIG_CDU0_CLKO0, REG_CDU0_CFG0, 0); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO1, REG_CDU0_CFG1, 1); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO2, REG_CDU0_CFG2, 2); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO3, REG_CDU0_CFG3, 3); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO4, REG_CDU0_CFG4, 4); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO5, REG_CDU0_CFG5, 5); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO6, REG_CDU0_CFG6, 6); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO7, REG_CDU0_CFG7, 7); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO8, REG_CDU0_CFG8, 8); - CONFIGURE_CDU0(CONFIG_CDU0_CLKO9, REG_CDU0_CFG9, 9); -#ifdef CONFIG_CDU0_CLKO10 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO10, REG_CDU0_CFG10, 10); -#endif -#ifdef CONFIG_CDU0_CLKO12 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO12, REG_CDU0_CFG12, 12); -#endif -#ifdef CONFIG_CDU0_CLKO13 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO13, REG_CDU0_CFG13, 13); -#endif -#ifdef CONFIG_CDU0_CLKO14 - CONFIGURE_CDU0(CONFIG_CDU0_CLKO14, REG_CDU0_CFG14, 14); -#endif -} - -void clks_init(void) -{ - adi_dmc_reset_lanes(true); - - cdu_init(); - cgu_init(); - - adi_config_third_pll(); - - adi_dmc_reset_lanes(false); -} diff --git a/arch/arm/mach-sc5xx/init/clkinit.h b/arch/arm/mach-sc5xx/init/clkinit.h deleted file mode 100644 index b05f4325bfc..00000000000 --- a/arch/arm/mach-sc5xx/init/clkinit.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef CLKINIT_H_ -#define CLKINIT_H_ - -void clks_init(void); - -void dmcdelay(uint32_t delay); - -#endif diff --git a/arch/arm/mach-sc5xx/init/dmcinit.c b/arch/arm/mach-sc5xx/init/dmcinit.c deleted file mode 100644 index e375b5c9dfa..00000000000 --- a/arch/arm/mach-sc5xx/init/dmcinit.c +++ /dev/null @@ -1,954 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/io.h> -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <linux/types.h> -#include "clkinit.h" -#include "dmcinit.h" - -#define REG_DMC0_BASE 0x31070000 -#define REG_DMC1_BASE 0x31073000 - -#define REG_DMC_CTL 0x0004 // Control Register -#define REG_DMC_STAT 0x0008 // Status Register -#define REG_DMC_CFG 0x0040 // Configuration Register -#define REG_DMC_TR0 0x0044 // Timing 0 Register -#define REG_DMC_TR1 0x0048 // Timing 1 Register -#define REG_DMC_TR2 0x004C // Timing 2 Register -#define REG_DMC_MR 0x0060 // Shadow MR Register (DDR3) -#define REG_DMC_EMR1 0x0064 // Shadow EMR1 Register -#define REG_DMC_EMR2 0x0068 // Shadow EMR2 Register -#define REG_DMC_EMR3 0x006C -#define REG_DMC_DLLCTL 0x0080 // DLL Control Register -#define REG_DMC_DT_CALIB_ADDR 0x0090 // Data Calibration Address Register -#define REG_DMC_CPHY_CTL 0x01C0 // Controller to PHY Interface Register - -/* SC57x && SC58x DMC REGs */ -#define REG_DMC_PHY_CTL0 0x1000 // PHY Control 0 Register -#define REG_DMC_PHY_CTL1 0x1004 // PHY Control 1 Register -#define REG_DMC_PHY_CTL2 0x1008 // PHY Control 2 Register -#define REG_DMC_PHY_CTL3 0x100c // PHY Control 3 Register -#define REG_DMC_PHY_CTL4 0x1010 // PHY Control 4 Register -#define REG_DMC_CAL_PADCTL0 0x1034 // CALIBRATION PAD CTL 0 Register -#define REG_DMC_CAL_PADCTL2 0x103C // CALIBRATION PAD CTL2 Register -/* END */ - -/* SC59x DMC REGs */ -#define REG_DMC_DDR_LANE0_CTL0 0x1000 // Data Lane 0 Control Register 0 -#define REG_DMC_DDR_LANE0_CTL1 0x1004 // Data Lane 0 Control Register 1 -#define REG_DMC_DDR_LANE1_CTL0 0x100C // Data Lane 1 Control Register 0 -#define REG_DMC_DDR_LANE1_CTL1 0x1010 // Data Lane 1 Control Register 1 -#define REG_DMC_DDR_ROOT_CTL 0x1018 // DDR ROOT Module Control Register -#define REG_DMC_DDR_ZQ_CTL0 0x1034 // DDR Calibration Control Register 0 -#define REG_DMC_DDR_ZQ_CTL1 0x1038 // DDR Calibration Control Register 1 -#define REG_DMC_DDR_ZQ_CTL2 0x103C // DDR Calibration Control Register 2 -#define REG_DMC_DDR_CA_CTL 0x1068 // DDR CA Lane Control Register -/* END */ - -#define REG_DMC_DDR_SCRATCH_2 0x1074 -#define REG_DMC_DDR_SCRATCH_3 0x1078 -#define REG_DMC_DDR_SCRATCH_6 0x1084 -#define REG_DMC_DDR_SCRATCH_7 0x1088 - -#define REG_DMC_DDR_SCRATCH_STAT0 0x107C -#define REG_DMC_DDR_SCRATCH_STAT1 0x1080 - -#define DMC0_DATA_CALIB_ADD 0x80000000 -#define DMC1_DATA_CALIB_ADD 0xC0000000 - -#define BITM_DMC_CFG_EXTBANK 0x0000F000 /* External Banks */ -#define ENUM_DMC_CFG_EXTBANK1 0x00000000 /* EXTBANK: 1 External Bank */ -#define BITM_DMC_CFG_SDRSIZE 0x00000F00 /* SDRAM Size */ -#define ENUM_DMC_CFG_SDRSIZE64 0x00000000 /* SDRSIZE: 64M Bit SDRAM (LPDDR Only) */ -#define ENUM_DMC_CFG_SDRSIZE128 0x00000100 /* SDRSIZE: 128M Bit SDRAM (LPDDR Only) */ -#define ENUM_DMC_CFG_SDRSIZE256 0x00000200 /* SDRSIZE: 256M Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE512 0x00000300 /* SDRSIZE: 512M Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE1G 0x00000400 /* SDRSIZE: 1G Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE2G 0x00000500 /* SDRSIZE: 2G Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE4G 0x00000600 /* SDRSIZE: 4G Bit SDRAM */ -#define ENUM_DMC_CFG_SDRSIZE8G 0x00000700 /* SDRSIZE: 8G Bit SDRAM */ -#define BITM_DMC_CFG_SDRWID 0x000000F0 /* SDRAM Width */ -#define ENUM_DMC_CFG_SDRWID16 0x00000020 /* SDRWID: 16-Bit Wide SDRAM */ -#define BITM_DMC_CFG_IFWID 0x0000000F /* Interface Width */ -#define ENUM_DMC_CFG_IFWID16 0x00000002 /* IFWID: 16-Bit Wide Interface */ - -#define BITM_DMC_CTL_DDR3EN 0x00000001 -#define BITM_DMC_CTL_INIT 0x00000004 -#define BITP_DMC_STAT_INITDONE 2 /* Initialization Done */ -#define BITM_DMC_STAT_INITDONE 0x00000004 - -#define BITP_DMC_CTL_AL_EN 27 -#define BITP_DMC_CTL_ZQCL 25 /* ZQ Calibration Long */ -#define BITP_DMC_CTL_ZQCS 24 /* ZQ Calibration Short */ -#define BITP_DMC_CTL_DLLCAL 13 /* DLL Calibration Start */ -#define BITP_DMC_CTL_PPREF 12 /* Postpone Refresh */ -#define BITP_DMC_CTL_RDTOWR 9 /* Read-to-Write Cycle */ -#define BITP_DMC_CTL_ADDRMODE 8 /* Addressing (Page/Bank) Mode */ -#define BITP_DMC_CTL_RESET 7 /* Reset SDRAM */ -#define BITP_DMC_CTL_PREC 6 /* Precharge */ -#define BITP_DMC_CTL_DPDREQ 5 /* Deep Power Down Request */ -#define BITP_DMC_CTL_PDREQ 4 /* Power Down Request */ -#define BITP_DMC_CTL_SRREQ 3 /* Self Refresh Request */ -#define BITP_DMC_CTL_INIT 2 /* Initialize DRAM Start */ -#define BITP_DMC_CTL_LPDDR 1 /* Low Power DDR Mode */ -#define BITP_DMC_CTL_DDR3EN 0 /* DDR3 Mode */ - -#ifdef CONFIG_TARGET_SC584_EZKIT - #define DMC_PADCTL2_VALUE 0x0078283C -#elif CONFIG_TARGET_SC573_EZKIT - #define DMC_PADCTL2_VALUE 0x00782828 -#elif CONFIG_TARGET_SC589_MINI || CONFIG_TARGET_SC589_EZKIT - #define DMC_PADCTL2_VALUE 0x00783C3C -#elif defined(CONFIG_SC57X) || defined(CONFIG_SC58X) - #error "PADCTL2 not specified for custom board!" -#else - //Newer DMC. Legacy calibration obsolete - #define DMC_PADCTL2_VALUE 0x0 -#endif - -#define DMC_CPHYCTL_VALUE 0x0000001A - -#define BITP_DMC_MR1_QOFF 12 /* Output Buffer Enable */ -#define BITP_DMC_MR1_TDQS 11 /* Termination Data Strobe */ -#define BITP_DMC_MR1_RTT2 9 /* Rtt_nom */ -#define BITP_DMC_MR1_WL 7 /* Write Leveling Enable. */ -#define BITP_DMC_MR1_RTT1 6 /* Rtt_nom */ -#define BITP_DMC_MR1_DIC1 5 /* Output Driver Impedance Control */ -#define BITP_DMC_MR1_AL 3 /* Additive Latency */ -#define BITP_DMC_MR1_RTT0 2 /* Rtt_nom */ -#define BITP_DMC_MR1_DIC0 1 /* Output Driver Impedance control */ -#define BITP_DMC_MR1_DLLEN 0 /* DLL Enable */ - -#define BITP_DMC_MR2_CWL 3 /* CAS write Latency */ - -#define BITP_DMC_TR0_TMRD 28 /* Timing Mode Register Delay */ -#define BITP_DMC_TR0_TRC 20 /* Timing Row Cycle */ -#define BITP_DMC_TR0_TRAS 12 /* Timing Row Active Time */ -#define BITP_DMC_TR0_TRP 8 /* Timing RAS Precharge. */ -#define BITP_DMC_TR0_TWTR 4 /* Timing Write to Read */ -#define BITP_DMC_TR0_TRCD 0 /* Timing RAS to CAS Delay */ - -#define BITP_DMC_TR1_TRRD 28 /* Timing Read-Read Delay */ -#define BITP_DMC_TR1_TRFC 16 /* Timing Refresh-to-Command */ -#define BITP_DMC_TR1_TREF 0 /* Timing Refresh Interval */ - -#define BITP_DMC_TR2_TCKE 20 /* Timing Clock Enable */ -#define BITP_DMC_TR2_TXP 16 /* Timing Exit Powerdown */ -#define BITP_DMC_TR2_TWR 12 /* Timing Write Recovery */ -#define BITP_DMC_TR2_TRTP 8 /* Timing Read-to-Precharge */ -#define BITP_DMC_TR2_TFAW 0 /* Timing Four-Activated-Window */ - -#define BITP_DMC_MR_PD 12 /* Active Powerdown Mode */ -#define BITP_DMC_MR_WRRECOV 9 /* Write Recovery */ -#define BITP_DMC_MR_DLLRST 8 /* DLL Reset */ -#define BITP_DMC_MR_CL 4 /* CAS Latency */ -#define BITP_DMC_MR_CL0 2 /* CAS Latency */ -#define BITP_DMC_MR_BLEN 0 /* Burst Length */ - -#define BITP_DMC_DLLCTL_DATACYC 8 /* Data Cycles */ -#define BITP_DMC_DLLCTL_DLLCALRDCNT 0 /* DLL Calibration RD Count */ - -#define BITM_DMC_DLLCTL_DATACYC 0x00000F00 /* Data Cycles */ -#define BITM_DMC_DLLCTL_DLLCALRDCNT 0x000000FF /* DLL Calib RD Count */ - -#define BITP_DMC_STAT_PHYRDPHASE 20 /* PHY Read Phase */ - -#define BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT 0x08000000 /* Rst Data Pads */ -#define BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT 0x08000000 /* Rst Data Pads */ -#define BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE 0x00000002 /* Compute Dcycle */ -#define BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE 0x00000002 /* Compute Dcycle */ -#define BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL 0x00000100 /* Rst Lane DLL */ -#define BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL 0x00000100 /* Rst Lane DLL */ -#define BITP_DMC_DDR_ROOT_CTL_PIPE_OFSTDCYCLE 10 /* Pipeline offset for PHYC_DATACYCLE */ -#define BITM_DMC_DDR_ROOT_CTL_SW_REFRESH 0x00002000 /* Refresh Lane DLL Code */ -#define BITM_DMC_DDR_CA_CTL_SW_REFRESH 0x00004000 /* Refresh Lane DLL Code */ - -#define BITP_DMC_CTL_RL_DQS 26 /* RL_DQS */ -#define BITM_DMC_CTL_RL_DQS 0x04000000 /* RL_DQS */ -#define BITP_DMC_EMR3_MPR 2 /* Multi Purpose Read Enable (Read Leveling)*/ -#define BITM_DMC_EMR3_MPR 0x00000004 /* Multi Purpose Read Enable (Read Leveling)*/ -#define BITM_DMC_MR1_WL 0x00000080 /* Write Leveling Enable.*/ -#define BITM_DMC_STAT_PHYRDPHASE 0x00F00000 /* PHY Read Phase */ - -#define BITP_DMC_DDR_LANE0_CTL1_BYPCODE 10 -#define BITM_DMC_DDR_LANE0_CTL1_BYPCODE 0x00007C00 -#define BITP_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN 15 -#define BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN 0x00008000 - -#define DMC_ZQCTL0_VALUE 0x00785A64 -#define DMC_ZQCTL1_VALUE 0 -#define DMC_ZQCTL2_VALUE 0x70000000 - -#define DMC_TRIG_CALIB 0 -#define DMC_OFSTDCYCLE 2 - -#define BITP_DMC_CAL_PADCTL0_RTTCALEN 31 /* RTT Calibration Enable */ -#define BITP_DMC_CAL_PADCTL0_PDCALEN 30 /* PULLDOWN Calib Enable */ -#define BITP_DMC_CAL_PADCTL0_PUCALEN 29 /* PULLUP Calib Enable */ -#define BITP_DMC_CAL_PADCTL0_CALSTRT 28 /* Start New Calib ( Hardware Cleared) */ -#define BITM_DMC_CAL_PADCTL0_RTTCALEN 0x80000000 /* RTT Calibration Enable */ -#define BITM_DMC_CAL_PADCTL0_PDCALEN 0x40000000 /* PULLDOWN Calib Enable */ -#define BITM_DMC_CAL_PADCTL0_PUCALEN 0x20000000 /* PULLUP Calib Enable */ -#define BITM_DMC_CAL_PADCTL0_CALSTRT 0x10000000 /* Start New Calib ( Hardware Cleared) */ -#define ENUM_DMC_PHY_CTL4_DDR3 0x00000000 /* DDRMODE: DDR3 Mode */ -#define ENUM_DMC_PHY_CTL4_DDR2 0x00000001 /* DDRMODE: DDR2 Mode */ -#define ENUM_DMC_PHY_CTL4_LPDDR 0x00000003 /* DDRMODE: LPDDR Mode */ - -#define BITP_DMC_DDR_ZQ_CTL0_IMPRTT 16 /* Data/DQS ODT */ -#define BITP_DMC_DDR_ZQ_CTL0_IMPWRDQ 8 /* Data/DQS/DM/CLK Drive Strength */ -#define BITP_DMC_DDR_ZQ_CTL0_IMPWRADD 0 /* Address/Command Drive Strength */ -#define BITM_DMC_DDR_ZQ_CTL0_IMPRTT 0x00FF0000 /* Data/DQS ODT */ -#define BITM_DMC_DDR_ZQ_CTL0_IMPWRDQ 0x0000FF00 /* Data/DQS/DM/CLK Drive Strength */ -#define BITM_DMC_DDR_ZQ_CTL0_IMPWRADD 0x000000FF /* Address/Command Drive Strength */ - -#define BITM_DMC_DDR_ROOT_CTL_TRIG_RD_XFER_ALL 0x00200000 /* All Lane Read Status */ - -#if defined(CONFIG_ADI_USE_DDR2) - #define DMC_MR0_VALUE \ - ((DMC_BL / 4 + 1) << BITP_DMC_MR_BLEN) | \ - (DMC_CL << BITP_DMC_MR_CL) | \ - (DMC_WRRECOV << BITP_DMC_MR_WRRECOV) - - #define DMC_MR1_VALUE \ - (DMC_MR1_AL << BITP_DMC_MR1_AL | 0x04) \ - - #define DMC_MR2_VALUE 0 - #define DMC_MR3_VALUE 0 - - #define DMC_CTL_VALUE \ - (DMC_RDTOWR << BITP_DMC_CTL_RDTOWR) | \ - (1 << BITP_DMC_CTL_DLLCAL) | \ - (BITM_DMC_CTL_INIT) -#else - #define DMC_MR0_VALUE \ - (0 << BITP_DMC_MR_BLEN) | \ - (DMC_CL0 << BITP_DMC_MR_CL0) | \ - (DMC_CL123 << BITP_DMC_MR_CL) | \ - (DMC_WRRECOV << BITP_DMC_MR_WRRECOV) | \ - (1 << BITP_DMC_MR_DLLRST) - - #define DMC_MR1_VALUE \ - (DMC_MR1_DLLEN << BITP_DMC_MR1_DLLEN) | \ - (DMC_MR1_DIC0 << BITP_DMC_MR1_DIC0) | \ - (DMC_MR1_RTT0 << BITP_DMC_MR1_RTT0) | \ - (DMC_MR1_AL << BITP_DMC_MR1_AL) | \ - (DMC_MR1_DIC1 << BITP_DMC_MR1_DIC1) | \ - (DMC_MR1_RTT1 << BITP_DMC_MR1_RTT1) | \ - (DMC_MR1_RTT2 << BITP_DMC_MR1_RTT2) | \ - (DMC_MR1_WL << BITP_DMC_MR1_WL) | \ - (DMC_MR1_TDQS << BITP_DMC_MR1_TDQS) | \ - (DMC_MR1_QOFF << BITP_DMC_MR1_QOFF) - - #define DMC_MR2_VALUE \ - ((DMC_WL) << BITP_DMC_MR2_CWL) - - #define DMC_MR3_VALUE \ - ((DMC_WL) << BITP_DMC_MR2_CWL) - - #define DMC_CTL_VALUE \ - (DMC_RDTOWR << BITP_DMC_CTL_RDTOWR) | \ - (BITM_DMC_CTL_INIT) | \ - (BITM_DMC_CTL_DDR3EN) | \ - (DMC_CTL_AL_EN << BITP_DMC_CTL_AL_EN) -#endif - -#define DMC_DLLCTL_VALUE \ - (DMC_DATACYC << BITP_DMC_DLLCTL_DATACYC) | \ - (DMC_DLLCALRDCNT << BITP_DMC_DLLCTL_DLLCALRDCNT) - -#define DMC_CFG_VALUE \ - ENUM_DMC_CFG_IFWID16 | \ - ENUM_DMC_CFG_SDRWID16 | \ - SDR_CHIP_SIZE | \ - ENUM_DMC_CFG_EXTBANK1 - -#define DMC_TR0_VALUE \ - (DMC_TRCD << BITP_DMC_TR0_TRCD) | \ - (DMC_TWTR << BITP_DMC_TR0_TWTR) | \ - (DMC_TRP << BITP_DMC_TR0_TRP) | \ - (DMC_TRAS << BITP_DMC_TR0_TRAS) | \ - (DMC_TRC << BITP_DMC_TR0_TRC) | \ - (DMC_TMRD << BITP_DMC_TR0_TMRD) - -#define DMC_TR1_VALUE \ - (DMC_TREF << BITP_DMC_TR1_TREF) | \ - (DMC_TRFC << BITP_DMC_TR1_TRFC) | \ - (DMC_TRRD << BITP_DMC_TR1_TRRD) - -#define DMC_TR2_VALUE \ - (DMC_TFAW << BITP_DMC_TR2_TFAW) | \ - (DMC_TRTP << BITP_DMC_TR2_TRTP) | \ - (DMC_TWR << BITP_DMC_TR2_TWR) | \ - (DMC_TXP << BITP_DMC_TR2_TXP) | \ - (DMC_TCKE << BITP_DMC_TR2_TCKE) - -enum DDR_MODE { - DDR3_MODE, - DDR2_MODE, - LPDDR_MODE, -}; - -enum CALIBRATION_MODE { - CALIBRATION_LEGACY, - CALIBRATION_METHOD1, - CALIBRATION_METHOD2, -}; - -static struct dmc_param { - phys_addr_t reg; - u32 ddr_mode; - u32 padctl2_value; - u32 dmc_cphyctl_value; - u32 dmc_cfg_value; - u32 dmc_dllctl_value; - u32 dmc_ctl_value; - u32 dmc_tr0_value; - u32 dmc_tr1_value; - u32 dmc_tr2_value; - u32 dmc_mr0_value; - u32 dmc_mr1_value; - u32 dmc_mr2_value; - u32 dmc_mr3_value; - u32 dmc_zqctl0_value; - u32 dmc_zqctl1_value; - u32 dmc_zqctl2_value; - u32 dmc_data_calib_add_value; - bool phy_init_required; - bool anomaly_20000037_applicable; - enum CALIBRATION_MODE calib_mode; -} dmc; - -#ifdef CONFIG_SC59X_64 -#define DQS_DEFAULT_DELAY 3ul - -#define DELAYTRIM 1 -#define LANE0_DQS_DELAY 1 -#define LANE1_DQS_DELAY 1 - -#define CLKDIR 0ul - -#define DQSTRIM 0 -#define DQSCODE 0ul - -#define CLKTRIM 0 -#define CLKCODE 0ul -#endif - -static inline void calibration_legacy(void) -{ - u32 temp; - - /* 1. Set DDR mode to DDR3/DDR2/LPDDR in DMCx_PHY_CTL4 register */ - if (dmc.ddr_mode == DDR3_MODE) - writel(ENUM_DMC_PHY_CTL4_DDR3, dmc.reg + REG_DMC_PHY_CTL4); - else if (dmc.ddr_mode == DDR2_MODE) - writel(ENUM_DMC_PHY_CTL4_DDR2, dmc.reg + REG_DMC_PHY_CTL4); - else if (dmc.ddr_mode == LPDDR_MODE) - writel(ENUM_DMC_PHY_CTL4_LPDDR, dmc.reg + REG_DMC_PHY_CTL4); - - /* - * 2. Make sure that the bits 6, 7, 25, and 27 of the DMC_PHY_ - * CTL3 register are set - */ - writel(0x0A0000C0, dmc.reg + REG_DMC_PHY_CTL3); - - /* - * 3. For DDR2/DDR3 mode, make sure that the bits 0, 1, 2, 3 of - * the DMC_PHY_CTL0 register and the bits 26, 27, 28, 29, 30, 31 - * of the DMC_PHY_CTL2 are set. - */ - if (dmc.ddr_mode == DDR3_MODE || - dmc.ddr_mode == DDR2_MODE) { - writel(0XFC000000, dmc.reg + REG_DMC_PHY_CTL2); - writel(0x0000000f, dmc.reg + REG_DMC_PHY_CTL0); - } - - writel(0x00000000, dmc.reg + REG_DMC_PHY_CTL1); - - /* 4. For DDR3 mode, set bit 1 and configure bits [5:2] of the - * DMC_CPHY_CTL register with WL=CWL+AL in DCLK cycles. - */ - if (dmc.ddr_mode == DDR3_MODE) - writel(dmc.dmc_cphyctl_value, dmc.reg + REG_DMC_CPHY_CTL); - /* 5. Perform On Die Termination(ODT) & Driver Impedance Calibration */ - if (dmc.ddr_mode == LPDDR_MODE) { - /* Bypass processor ODT */ - writel(0x80000, dmc.reg + REG_DMC_PHY_CTL1); - } else { - /* Set bits RTTCALEN, PDCALEN, PUCALEN of register */ - temp = BITM_DMC_CAL_PADCTL0_RTTCALEN | - BITM_DMC_CAL_PADCTL0_PDCALEN | - BITM_DMC_CAL_PADCTL0_PUCALEN; - writel(temp, dmc.reg + REG_DMC_CAL_PADCTL0); - /* Configure ODT and drive impedance values in the - * DMCx_CAL_PADCTL2 register - */ - writel(dmc.padctl2_value, dmc.reg + REG_DMC_CAL_PADCTL2); - /* start calibration */ - temp |= BITM_DMC_CAL_PADCTL0_CALSTRT; - writel(temp, dmc.reg + REG_DMC_CAL_PADCTL0); - /* Wait for PAD calibration to complete - 300 DCLK cycle. - * Worst case: CCLK=450 MHz, DCLK=125 MHz - */ - dmcdelay(300); - } -} - -static inline void calibration_method1(void) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - writel(dmc.dmc_zqctl0_value, dmc.reg + REG_DMC_DDR_ZQ_CTL0); - writel(dmc.dmc_zqctl1_value, dmc.reg + REG_DMC_DDR_ZQ_CTL1); - writel(dmc.dmc_zqctl2_value, dmc.reg + REG_DMC_DDR_ZQ_CTL2); - - /* Generate the trigger */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x00010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(8000u); - - /* The [31:26] bits may change if pad ring changes */ - writel(0x0C000001ul | DMC_TRIG_CALIB, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(8000u); - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); -#endif -} - -static inline void calibration_method2(void) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - u32 stat_value = 0x0u; - u32 drv_pu, drv_pd, odt_pu, odt_pd; - u32 ro_dt, clk_dqs_drv_impedance; - u32 temp; - - /* Reset trigger */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - - /* Writing internal registers in calib pad to zero. Calib mode set - * to 1 [26], trig M1 S1 write [16], this enables usage of scratch - * registers instead of ZQCTL registers - */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - /* TRIGGER FOR M2-S2 WRITE -> slave id 31:26 trig m2,s2 write - * bit 1->1 slave1 address is 4 - */ - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - /* reset Trigger */ - writel(0x0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - - /* write to slave 1, make the power down bit high */ - writel(0x1ul << 12, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - dmcdelay(2500u); - - /* Calib mode set to 1 [26], trig M1 S1 write [16] */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0, dmc.reg + REG_DMC_DDR_SCRATCH_3); - - /* for slave 0 */ - writel(dmc.dmc_zqctl0_value, dmc.reg + REG_DMC_DDR_SCRATCH_2); - - /* Calib mode set to 1 [26], trig M1 S1 write [16] */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - writel(0x0C000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - - /* writing to slave 1 - * calstrt is 0, but other programming is done - * - * make power down LOW again, to kickstart BIAS circuit - */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x30000000ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - - /* write to ca_ctl lane, calib mode set to 1 [26], - * trig M1 S1 write [16] - */ - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - - /* copies data to lane controller slave - * TRIGGER FOR M2-S2 WRITE -> slave id 31:26 - * trig m2,s2 write bit 1->1 - * slave1 address is 4 - */ - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - - /* reset Trigger */ - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); - writel(0x50000000ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x0C000004u, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(BITM_DMC_DDR_ROOT_CTL_TRIG_RD_XFER_ALL, - dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - // calculate ODT PU and PD values - stat_value = ((readl(dmc.reg + REG_DMC_DDR_SCRATCH_7) & 0x0000FFFFu) << - 16); - stat_value |= ((readl(dmc.reg + REG_DMC_DDR_SCRATCH_6) & 0xFFFF0000u) >> - 16); - clk_dqs_drv_impedance = ((dmc.dmc_zqctl0_value) & - BITM_DMC_DDR_ZQ_CTL0_IMPWRDQ) >> BITP_DMC_DDR_ZQ_CTL0_IMPWRDQ; - ro_dt = ((dmc.dmc_zqctl0_value) & BITM_DMC_DDR_ZQ_CTL0_IMPRTT) >> - BITP_DMC_DDR_ZQ_CTL0_IMPRTT; - drv_pu = stat_value & 0x0000003Fu; - drv_pd = (stat_value >> 12) & 0x0000003Fu; - odt_pu = (drv_pu * clk_dqs_drv_impedance) / ro_dt; - odt_pd = (drv_pd * clk_dqs_drv_impedance) / ro_dt; - temp = ((1uL << 24) | - ((drv_pd & 0x0000003Fu)) | - ((odt_pd & 0x0000003Fu) << 6) | - ((drv_pu & 0x0000003Fu) << 12) | - ((odt_pu & 0x0000003Fu) << 18)); - temp |= readl(dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(temp, dmc.reg + REG_DMC_DDR_SCRATCH_2); - writel(0x0C010000u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x08000002u, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - writel(0x04010000u, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x80000002u, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(2500u); - writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); - writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); -#endif -} - -static inline void adi_dmc_lane_reset(bool reset, uint32_t dmc_no) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - u32 temp; - phys_addr_t base = (dmc_no == 0) ? REG_DMC0_BASE : REG_DMC1_BASE; - phys_addr_t ln0 = base + REG_DMC_DDR_LANE0_CTL0; - phys_addr_t ln1 = base + REG_DMC_DDR_LANE1_CTL0; - - if (reset) { - temp = readl(ln0); - temp |= BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL; - writel(temp, ln0); - - temp = readl(ln1); - temp |= BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL; - writel(temp, ln1); - } else { - temp = readl(ln0); - temp &= ~BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL; - writel(temp, ln0); - - temp = readl(ln1); - temp &= ~BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL; - writel(temp, ln1); - } - dmcdelay(9000u); -#endif -} - -void adi_dmc_reset_lanes(bool reset) -{ - if (!IS_ENABLED(CONFIG_ADI_USE_DDR2)) { - if (IS_ENABLED(CONFIG_SC59X) || IS_ENABLED(CONFIG_SC59X_64)) { - if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) - adi_dmc_lane_reset(reset, 0); - if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) - adi_dmc_lane_reset(reset, 1); - } - else { - u32 temp = reset ? 0x800 : 0x0; - - if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) - writel(temp, REG_DMC0_BASE + REG_DMC_PHY_CTL0); - if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) - writel(temp, REG_DMC1_BASE + REG_DMC_PHY_CTL0); - } - } -} - -static inline void dmc_controller_init(void) -{ -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - u32 phyphase, rd_cnt, t_EMR1, t_EMR3, t_CTL, data_cyc, temp; -#endif - - /* 1. Program the DMC controller registers: DMCx_CFG, DMCx_TR0, - * DMCx_TR1, DMCx_TR2, DMCx_MR(DDR2/LPDDR)/DMCx_MR0(DDR3), - * DMCx_EMR1(DDR2)/DMCx_MR1(DDR3), - * DMCx_EMR2(DDR2)/DMCx_EMR(LPDDR)/DMCx_MR2(DDR3) - */ - writel(dmc.dmc_cfg_value, dmc.reg + REG_DMC_CFG); - writel(dmc.dmc_tr0_value, dmc.reg + REG_DMC_TR0); - writel(dmc.dmc_tr1_value, dmc.reg + REG_DMC_TR1); - writel(dmc.dmc_tr2_value, dmc.reg + REG_DMC_TR2); - writel(dmc.dmc_mr0_value, dmc.reg + REG_DMC_MR); - writel(dmc.dmc_mr1_value, dmc.reg + REG_DMC_EMR1); - writel(dmc.dmc_mr2_value, dmc.reg + REG_DMC_EMR2); - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - writel(dmc.dmc_mr3_value, dmc.reg + REG_DMC_EMR3); - writel(dmc.dmc_dllctl_value, dmc.reg + REG_DMC_DLLCTL); - dmcdelay(2000u); - - temp = readl(dmc.reg + REG_DMC_DDR_CA_CTL); - temp |= BITM_DMC_DDR_CA_CTL_SW_REFRESH; - writel(temp, dmc.reg + REG_DMC_DDR_CA_CTL); - dmcdelay(5u); - - temp = readl(dmc.reg + REG_DMC_DDR_ROOT_CTL); - temp |= BITM_DMC_DDR_ROOT_CTL_SW_REFRESH | - (DMC_OFSTDCYCLE << BITP_DMC_DDR_ROOT_CTL_PIPE_OFSTDCYCLE); - writel(temp, dmc.reg + REG_DMC_DDR_ROOT_CTL); -#endif - - /* 2. Make sure that the REG_DMC_DT_CALIB_ADDR register is programmed - * to an unused DMC location corresponding to a burst of 16 bytes - * (by default it is the starting address of the DMC address range). - */ -#ifndef CONFIG_SC59X - writel(dmc.dmc_data_calib_add_value, dmc.reg + REG_DMC_DT_CALIB_ADDR); -#endif - /* 3. Program the DMCx_CTL register with INIT bit set to start - * the DMC initialization sequence - */ - writel(dmc.dmc_ctl_value, dmc.reg + REG_DMC_CTL); - /* 4. Wait for the DMC initialization to complete by polling - * DMCx_STAT.INITDONE bit. - */ - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmcdelay(722000u); - - /* Add necessary delay depending on the configuration */ - t_EMR1 = (dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL; - - dmcdelay(600u); - if (t_EMR1 != 0u) - while ((readl(dmc.reg + REG_DMC_EMR1) & BITM_DMC_MR1_WL) != 0) - ; - - t_EMR3 = (dmc.dmc_mr3_value & BITM_DMC_EMR3_MPR) >> - BITP_DMC_EMR3_MPR; - dmcdelay(2000u); - if (t_EMR3 != 0u) - while ((readl(dmc.reg + REG_DMC_EMR3) & BITM_DMC_EMR3_MPR) != 0) - ; - - t_CTL = (dmc.dmc_ctl_value & BITM_DMC_CTL_RL_DQS) >> BITP_DMC_CTL_RL_DQS; - dmcdelay(600u); - if (t_CTL != 0u) - while ((readl(dmc.reg + REG_DMC_CTL) & BITM_DMC_CTL_RL_DQS) != 0) - ; -#endif - - /* check if DMC initialization finished*/ - while ((readl(dmc.reg + REG_DMC_STAT) & BITM_DMC_STAT_INITDONE) == 0) - ; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - /* toggle DCYCLE */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp |= BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp |= BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - - dmcdelay(10u); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp &= (~BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp &= (~BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - - /* toggle RSTDAT */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); - temp |= BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); - temp &= (~BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); - temp |= BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); - temp &= (~BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); - - dmcdelay(2500u); - - /* Program phyphase*/ - phyphase = (readl(dmc.reg + REG_DMC_STAT) & - BITM_DMC_STAT_PHYRDPHASE) >> BITP_DMC_STAT_PHYRDPHASE; - data_cyc = (phyphase << BITP_DMC_DLLCTL_DATACYC) & - BITM_DMC_DLLCTL_DATACYC; - rd_cnt = dmc.dmc_dllctl_value; - rd_cnt <<= BITP_DMC_DLLCTL_DLLCALRDCNT; - rd_cnt &= BITM_DMC_DLLCTL_DLLCALRDCNT; - writel(rd_cnt | data_cyc, dmc.reg + REG_DMC_DLLCTL); - writel((dmc.dmc_ctl_value & (~BITM_DMC_CTL_INIT) & - (~BITM_DMC_CTL_RL_DQS)), dmc.reg + REG_DMC_CTL); - -#if DELAYTRIM - /* DQS delay trim*/ - u32 stat_value, WL_code_LDQS, WL_code_UDQS; - - /* For LDQS */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1) | (0x000000D0); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - dmcdelay(2500u); - writel(0x00400000, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x0, dmc.reg + REG_DMC_DDR_ROOT_CTL); - stat_value = (readl(dmc.reg + REG_DMC_DDR_SCRATCH_STAT0) & - (0xFFFF0000)) >> 16; - WL_code_LDQS = (stat_value) & (0x0000001F); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp &= ~(BITM_DMC_DDR_LANE0_CTL1_BYPCODE | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - - /* If write leveling is enabled */ - if ((dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL) { - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp |= (((WL_code_LDQS + LANE0_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - } else { - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); - temp |= (((DQS_DEFAULT_DELAY + LANE0_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); - } - dmcdelay(2500u); - - /* For UDQS */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1) | (0x000000D0); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - dmcdelay(2500u); - writel(0x00800000, dmc.reg + REG_DMC_DDR_ROOT_CTL); - dmcdelay(2500u); - writel(0x0, dmc.reg + REG_DMC_DDR_ROOT_CTL); - stat_value = (readl(dmc.reg + REG_DMC_DDR_SCRATCH_STAT1) & - (0xFFFF0000)) >> 16; - WL_code_UDQS = (stat_value) & (0x0000001F); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp &= ~(BITM_DMC_DDR_LANE0_CTL1_BYPCODE | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - - /* If write leveling is enabled */ - if ((dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL) { - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp |= (((WL_code_UDQS + LANE1_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - } else { - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); - temp |= (((DQS_DEFAULT_DELAY + LANE1_DQS_DELAY) << - BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & - BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | - BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); - } - dmcdelay(2500u); -#endif - -#else - /* 5. Program the DMCx_CTL.DLLCTL register with 0x948 value - * (DATACYC=9, DLLCALRDCNT=72). - */ - writel(0x00000948, dmc.reg + REG_DMC_DLLCTL); -#endif - - /* 6. Workaround for anomaly#20000037 */ - if (dmc.anomaly_20000037_applicable) { - /* Perform dummy read to any DMC location */ - readl(0x80000000); - - writel(readl(dmc.reg + REG_DMC_PHY_CTL0) | 0x1000, - dmc.reg + REG_DMC_PHY_CTL0); - /* Clear DMCx_PHY_CTL0.RESETDAT bit */ - writel(readl(dmc.reg + REG_DMC_PHY_CTL0) & (~0x1000), - dmc.reg + REG_DMC_PHY_CTL0); - } -} - -static inline void dmc_init(void) -{ - /* PHY Calibration+Initialization */ - if (!dmc.phy_init_required) - goto out; - - switch (dmc.calib_mode) { - case CALIBRATION_LEGACY: - calibration_legacy(); - break; - case CALIBRATION_METHOD1: - calibration_method1(); - break; - case CALIBRATION_METHOD2: - calibration_method2(); - break; - } - -#if DQSTRIM - /* DQS duty trim */ - temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); - temp |= ((DQSCODE) << BITP_DMC_DDR_LANE0_CTL0_BYPENB) & - (BITM_DMC_DDR_LANE1_CTL0_BYPENB | - BITM_DMC_DDR_LANE0_CTL0_BYPSELP | - BITM_DMC_DDR_LANE0_CTL0_BYPCODE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); - - temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); - temp |= ((DQSCODE) << BITP_DMC_DDR_LANE1_CTL0_BYPENB) & - (BITM_DMC_DDR_LANE1_CTL1_BYPCODE | - BITM_DMC_DDR_LANE1_CTL0_BYPSELP | - BITM_DMC_DDR_LANE1_CTL0_BYPCODE); - writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); -#endif - -#if CLKTRIM - /* Clock duty trim */ - temp = readl(dmc.reg + REG_DMC_DDR_CA_CTL); - temp |= (((CLKCODE << BITP_DMC_DDR_CA_CTL_BYPCODE1) & - BITM_DMC_DDR_CA_CTL_BYPCODE1) | - BITM_DMC_DDR_CA_CTL_BYPENB | - ((CLKDIR << BITP_DMC_DDR_CA_CTL_BYPSELP) & - BITM_DMC_DDR_CA_CTL_BYPSELP)); - writel(temp, dmc.reg + REG_DMC_DDR_CA_CTL); -#endif - -out: - /* Controller Initialization */ - dmc_controller_init(); -} - -static inline void __dmc_config(uint32_t dmc_no) -{ - if (dmc_no == 0) { - dmc.reg = REG_DMC0_BASE; - dmc.dmc_data_calib_add_value = DMC0_DATA_CALIB_ADD; - } else if (dmc_no == 1) { - dmc.reg = REG_DMC1_BASE; - dmc.dmc_data_calib_add_value = DMC1_DATA_CALIB_ADD; - } else { - return; - } - - if (IS_ENABLED(CONFIG_ADI_USE_DDR2)) - dmc.ddr_mode = DDR2_MODE; - else - dmc.ddr_mode = DDR3_MODE; - - dmc.phy_init_required = true; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmc.anomaly_20000037_applicable = false; - dmc.dmc_dllctl_value = DMC_DLLCTL_VALUE; - dmc.calib_mode = CALIBRATION_METHOD2; -#else - dmc.anomaly_20000037_applicable = true; - dmc.calib_mode = CALIBRATION_LEGACY; -#endif - - dmc.dmc_ctl_value = DMC_CTL_VALUE; - dmc.dmc_cfg_value = DMC_CFG_VALUE; - dmc.dmc_tr0_value = DMC_TR0_VALUE; - dmc.dmc_tr1_value = DMC_TR1_VALUE; - dmc.dmc_tr2_value = DMC_TR2_VALUE; - dmc.dmc_mr0_value = DMC_MR0_VALUE; - dmc.dmc_mr1_value = DMC_MR1_VALUE; - dmc.dmc_mr2_value = DMC_MR2_VALUE; - -#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - dmc.dmc_mr3_value = DMC_MR3_VALUE; - dmc.dmc_zqctl0_value = DMC_ZQCTL0_VALUE; - dmc.dmc_zqctl1_value = DMC_ZQCTL1_VALUE; - dmc.dmc_zqctl2_value = DMC_ZQCTL2_VALUE; -#endif - - dmc.padctl2_value = DMC_PADCTL2_VALUE; - dmc.dmc_cphyctl_value = DMC_CPHYCTL_VALUE; - - /* Initialize DMC now */ - dmc_init(); -} - -void DMC_Config(void) -{ - if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) - __dmc_config(0); - - if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) - __dmc_config(1); -} diff --git a/arch/arm/mach-sc5xx/init/dmcinit.h b/arch/arm/mach-sc5xx/init/dmcinit.h deleted file mode 100644 index 46ff729282d..00000000000 --- a/arch/arm/mach-sc5xx/init/dmcinit.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef DMCINIT_H_ -#define DMCINIT_H_ - -#include <config.h> - -#ifdef MEM_MT41K512M16HA - #include "mem/mt41k512m16ha.h" -#elif defined(MEM_MT41K128M16JT) - #include "mem/mt41k128m16jt.h" -#elif defined(MEM_MT47H128M16RT) - #include "mem/mt47h128m16rt.h" -#elif defined(MEM_IS43TR16512BL) - #include "mem/is43tr16512bl.h" -#else - #error "No DDR part name is defined for this board." -#endif - -void DMC_Config(void); -void adi_dmc_reset_lanes(bool reset); - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h b/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h deleted file mode 100644 index a5838370555..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef IS43TR16512BL_H -#define IS43TR16512BL_H - -/* DMC0 setup for the EV-21593-SOM and EV-SC594-SOM : - * - uses a single 8GB IS43TR16512BL-125KBL DDR3 chip configured for - * 800 MHz DCLK. - * DMC0 setup for the EV-SC594-SOMS : - * - uses a single 4GB IS43TR16256BL-093NBL DDR3 chip configured for - * 800 MHz DCLK. - */ -#define DMC_DLLCALRDCNT 240 -#define DMC_DATACYC 12 -#define DMC_TRCD 11 -#define DMC_TWTR 6 -#define DMC_TRP 11 -#define DMC_TRAS 28 -#define DMC_TRC 39 -#define DMC_TMRD 4 -#define DMC_TREF 6240 -#define DMC_TRRD 6 -#define DMC_TFAW 32 -#define DMC_TRTP 6 -#define DMC_TWR 12 -#define DMC_TXP 5 -#define DMC_TCKE 4 -#define DMC_CL0 0 -#define DMC_CL123 7 -#define DMC_WRRECOV 6 -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 0 -#define DMC_MR1_RTT0 0 -#define DMC_MR1_AL 0 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 1 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_WL 3 -#define DMC_RDTOWR 5 -#define DMC_CTL_AL_EN 1 -#if defined(MEM_ISSI_4Gb_DDR3_800MHZ) - #define SDR_CHIP_SIZE (ENUM_DMC_CFG_SDRSIZE4G) - #define DMC_TRFC 208ul -#elif defined(MEM_ISSI_8Gb_DDR3_800MHZ) - #define SDR_CHIP_SIZE (ENUM_DMC_CFG_SDRSIZE8G) - #define DMC_TRFC 280ul -#else - #error "Need to select MEM_ISSI_4Gb_DDR3_800MHZ or MEM_ISSI_8Gb_DDR3_800MHZ" -#endif - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h b/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h deleted file mode 100644 index 882777521b8..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef MT41K128M16JT_H -#define MT41K128M16JT_H - -/* Default DDR3 part assumed: MT41K128M16JT-125, 2Gb part */ -/* For DCLK= 450 MHz */ -#define DMC_DLLCALRDCNT 72 -#define DMC_DATACYC 9 -#define DMC_TRCD 6 -#define DMC_TWTR 4 -#define DMC_TRP 6 -#define DMC_TRAS 17 -#define DMC_TRC 23 -#define DMC_TMRD 4 -#define DMC_TREF 3510 -#define DMC_TRFC 72 -#define DMC_TRRD 4 -#define DMC_TFAW 17 -#define DMC_TRTP 4 -#define DMC_TWR 7 -#define DMC_TXP 4 -#define DMC_TCKE 3 -#define DMC_CL0 0 -#define DMC_CL123 3 -#define DMC_WRRECOV (DMC_TWR - 1) -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 1 -#define DMC_MR1_RTT0 1 -#define DMC_MR1_AL 0 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 0 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_WL 1 -#define DMC_RDTOWR 2 -#define DMC_CTL_AL_EN 0 -#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE2G - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h b/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h deleted file mode 100644 index 5735b87871c..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef MT41K512M16HA_H -#define MT41K512M16HA_H - -/* Default DDR3 part assumed: MT41K512M16HA-107, 8Gb part */ -/* For DCLK= 450 MHz */ -#define DMC_DLLCALRDCNT 72 -#define DMC_DATACYC 9 -#define DMC_TRCD 7 -#define DMC_TWTR 4 -#define DMC_TRP 7 -#define DMC_TRAS 10 -#define DMC_TRC 16 -#define DMC_TMRD 4 -#define DMC_TREF 3510 -#define DMC_TRFC 158 -#define DMC_TRRD 6 -#define DMC_TFAW 16 -#define DMC_TRTP 4 -#define DMC_TWR 7 -#define DMC_TXP 3 -#define DMC_TCKE 3 -#define DMC_CL0 0 -#define DMC_CL123 3 -#define DMC_WRRECOV (DMC_TWR - 1) -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 1 -#define DMC_MR1_RTT0 1 -#define DMC_MR1_AL 0 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 0 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_WL 1 -#define DMC_RDTOWR 2 -#define DMC_CTL_AL_EN 0 -#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE8G - -#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h b/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h deleted file mode 100644 index 5ada7f2985b..00000000000 --- a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#ifndef MT47H128M16RT_H -#define MT47H128M16RT_H - -/* Default DDR2 part: MT47H128M16RT-25E XIT:C, 2 Gb part */ -/* For DCLK= 400 MHz */ -#define DMC_DLLCALRDCNT 72 -#define DMC_DATACYC 9 -#define DMC_TRCD 5 -#define DMC_TWTR 3 -#define DMC_TRP 5 -#define DMC_TRAS 16 -#define DMC_TRC 22 -#define DMC_TMRD 2 -#define DMC_TREF 3120 -#define DMC_TRFC 78 -#define DMC_TRRD 4 -#define DMC_TFAW 18 -#define DMC_TRTP 3 -#define DMC_TWR 6 -#define DMC_TXP 2 -#define DMC_TCKE 3 -#define DMC_CL 5 -#define DMC_WRRECOV (DMC_TWR - 1) -#define DMC_MR1_DLLEN 0 -#define DMC_MR1_DIC0 1 -#define DMC_MR1_RTT0 1 -#define DMC_MR1_AL 4 -#define DMC_MR1_DIC1 0 -#define DMC_MR1_RTT1 0 -#define DMC_MR1_WL 0 -#define DMC_MR1_RTT2 0 -#define DMC_MR1_TDQS 0 -#define DMC_MR1_QOFF 0 -#define DMC_BL 4 -#define DMC_RDTOWR 2 -#define DMC_CTL_AL_EN 0 -#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE2G - -#endif diff --git a/arch/arm/mach-sc5xx/rcu.c b/arch/arm/mach-sc5xx/rcu.c deleted file mode 100644 index 49357501a93..00000000000 --- a/arch/arm/mach-sc5xx/rcu.c +++ /dev/null @@ -1,22 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Ian Roberts <ian.roberts@timesys.com> - */ - -#include <dm.h> -#include <syscon.h> - -static const struct udevice_id adi_syscon_ids[] = { - { .compatible = "adi,reset-controller" }, - { } -}; - -U_BOOT_DRIVER(syscon_sc5xx_rcu) = { - .name = "sc5xx_rcu", - .id = UCLASS_SYSCON, - .of_match = adi_syscon_ids, -}; diff --git a/arch/arm/mach-sc5xx/sc57x.c b/arch/arm/mach-sc5xx/sc57x.c deleted file mode 100644 index b0587686d73..00000000000 --- a/arch/arm/mach-sc5xx/sc57x.c +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/io.h> -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/arch-adi/sc5xx/spl.h> - -#define REG_SPU0_SECUREC0 0x3108B980 -#define REG_PADS0_PCFG0 0x31004404 -#define REG_SPU0_SECUREP_START 0x3108BA00 -#define REG_SPU0_SECUREP_END 0x3108BD24 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e1; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); -} - -void sc5xx_soc_init(void) -{ - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); - sc5xx_enable_pmu(); -} diff --git a/arch/arm/mach-sc5xx/sc58x.c b/arch/arm/mach-sc5xx/sc58x.c deleted file mode 100644 index 0f892774309..00000000000 --- a/arch/arm/mach-sc5xx/sc58x.c +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/io.h> -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/arch-adi/sc5xx/spl.h> - -#define REG_SPU0_SECUREC0 0x3108C980 -#define REG_PADS0_PCFG0 0x31004404 -#define REG_SPU0_SECUREP_START 0x3108CA00 -#define REG_SPU0_SECUREP_END 0x3108CCF0 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e1; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); -} - -void sc5xx_soc_init(void) -{ - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); - sc5xx_enable_pmu(); -} diff --git a/arch/arm/mach-sc5xx/sc59x.c b/arch/arm/mach-sc5xx/sc59x.c deleted file mode 100644 index 174c6f5c445..00000000000 --- a/arch/arm/mach-sc5xx/sc59x.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/io.h> -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/arch-adi/sc5xx/spl.h> - -#define REG_SPU0_SECUREC0 0x3108B980 -#define REG_PADS0_PCFG0 0x31004604 -#define REG_SPU0_SECUREP_START 0x3108BA00 -#define REG_SPU0_SECUREP_END 0x3108BD24 - -#define REG_SCB5_SPI2_OSPI_REMAP 0x30400000 -#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 -#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e9; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); -} - -void sc59x_remap_ospi(void) -{ - clrsetbits_le32(REG_SCB5_SPI2_OSPI_REMAP, - BITM_SCB5_SPI2_OSPI_REMAP_REMAP, - ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0); -} - -void sc5xx_soc_init(void) -{ - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); - sc5xx_enable_pmu(); -} diff --git a/arch/arm/mach-sc5xx/sc59x_64.c b/arch/arm/mach-sc5xx/sc59x_64.c deleted file mode 100644 index 82537bf1965..00000000000 --- a/arch/arm/mach-sc5xx/sc59x_64.c +++ /dev/null @@ -1,97 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/io.h> -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/arch-adi/sc5xx/spl.h> - -#define REG_TSGENWR0_CNTCR 0x310AE000 -#define REG_PADS0_PCFG0 0x31004604 -#define REG_RCU0_BCODE 0x3108C028 - -#define REG_SPU0_SECUREP_START 0x3108BA00 -#define REG_SPU0_WP_START 0x3108B400 -#define REG_SPU0_SECUREC0 0x3108B980 - -#define REG_SCB5_SPI2_OSPI_REMAP 0x30400000 -#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 -#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 - -adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e4; - -void sc5xx_enable_rgmii(void) -{ - writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); - - // Set dw for little endian operation as well - writel(readl(REG_PADS0_PCFG0) & ~(1 << 19), REG_PADS0_PCFG0); - writel(readl(REG_PADS0_PCFG0) & ~(1 << 20), REG_PADS0_PCFG0); -} - -void sc59x_remap_ospi(void) -{ - clrsetbits_le32(REG_SCB5_SPI2_OSPI_REMAP, - BITM_SCB5_SPI2_OSPI_REMAP_REMAP, - ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0); -} - -/** - * SPU/SMPU configuration is the default for permissive access from non-secure - * EL1. If TFA and OPTEE are configured, they run *after* this code, as the - * current boot flow is SPL -> TFA -> OPTEE -> Proper -> Linux, and will - * be expected to configure peripheral security correctly. If they are not - * configured, then this permissive setting will allow Linux (which always - * runs in NS EL1) to control all access to these peripherals. Without it, - * the peripherals would simply be unavailable in a non-security build, - * which is not OK. - */ -void sc5xx_soc_init(void) -{ - phys_addr_t smpus[] = { - 0x31007800, //SMPU0 - 0x31083800, //SMPU2 - 0x31084800, //SMPU3 - 0x31085800, //SMPU4 - 0x31086800, //SMPU5 - 0x31087800, //SMPU6 - 0x310A0800, //SMPU9 - 0x310A1800, //SMPU11 - 0x31012800, //SMPU12 - }; - size_t i; - - // Enable coresight timer - writel(1, REG_TSGENWR0_CNTCR); - - //Do not rerun preboot routine -- - // Without this, hardware resets triggered by RCU0_CTL:SYSRST - // lead to a deadlock somewhere in the boot ROM - writel(0x200, REG_RCU0_BCODE); - - /* Alter outstanding transactions property of A55*/ - writel(0x1, 0x30643108); /* SCB6 A55 M0 Ib.fn Mod */ - isb(); - - /* configure DDR prefetch behavior, per ADI */ - writel(0x1, 0x31076000); - - /* configure smart mode, per ADI */ - writel(0x1307, 0x31076004); - - // Disable SPU and SPU WP registers - sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_START + 4*213); - sc5xx_disable_spu0(REG_SPU0_WP_START, REG_SPU0_WP_START + 4*213); - - /* configure smpus permissively */ - for (i = 0; i < ARRAY_SIZE(smpus); ++i) - writel(0x500, smpus[i]); - - sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); -} diff --git a/arch/arm/mach-sc5xx/soc.c b/arch/arm/mach-sc5xx/soc.c deleted file mode 100644 index 8f13127a660..00000000000 --- a/arch/arm/mach-sc5xx/soc.c +++ /dev/null @@ -1,179 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/arch-adi/sc5xx/soc.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <cpu_func.h> - -#ifdef CONFIG_SC58X - #define RCU0_CTL 0x3108B000 - #define RCU0_STAT 0x3108B004 - #define RCU0_CRCTL 0x3108B008 - #define RCU0_CRSTAT 0x3108B00C - #define RCU0_SIDIS 0x3108B010 - #define RCU0_MSG_SET 0x3108B064 -#elif defined(CONFIG_SC57X) || defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) - #define RCU0_CTL 0x3108C000 - #define RCU0_STAT 0x3108C004 - #define RCU0_CRCTL 0x3108C008 - #define RCU0_CRSTAT 0x3108C00C - #define RCU0_SIDIS 0x3108C01C - #define RCU0_MSG_SET 0x3108C070 -#else - #error "No SC5xx SoC CONFIG_ enabled" -#endif - -#define BITP_RCU_STAT_BMODE 8 -#define BITM_RCU_STAT_BMODE 0x00000F00 - -#define REG_ARMPMU0_PMCR 0x31121E04 -#define REG_ARMPMU0_PMUSERENR 0x31121E08 -#define REG_ARMPMU0_PMLAR 0x31121FB0 - -DECLARE_GLOBAL_DATA_PTR; - -void reset_cpu(void) -{ - u32 val = readl(RCU0_CTL); - writel(val | 1, RCU0_CTL); -} - -void enable_caches(void) -{ - if (!IS_ENABLED(CONFIG_SYS_DCACHE_OFF)) - dcache_enable(); -} - -void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base) -{ - writel(0, securec0_base); - writel(0, securec0_base + 0x4); - writel(0, securec0_base + 0x8); -} - -void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end) -{ - for (uintptr_t i = spu0_start; i <= spu0_end; i += 4) - writel(0, i); -} - -/** - * PMU is only available on armv7 platforms and all share the same location - */ -void sc5xx_enable_pmu(void) -{ - if (!IS_ENABLED(CONFIG_SC59X_64)) { - writel(readl(REG_ARMPMU0_PMUSERENR) | 0x01, REG_ARMPMU0_PMUSERENR); - writel(0xc5acce55, REG_ARMPMU0_PMLAR); - writel(readl(REG_ARMPMU0_PMCR) | (1 << 1), REG_ARMPMU0_PMCR); - } -} - -const char *sc5xx_get_boot_mode(u32 *bmode) -{ - static const char * const bmodes[] = { - "JTAG/BOOTROM", - "QSPI Master", - "QSPI Slave", - "UART", - "LP0 Slave", - "OSPI", -#ifdef CONFIG_SC59X_64 - "eMMC" -#endif - }; - u32 local_mode; - - local_mode = (readl(RCU0_STAT) & BITM_RCU_STAT_BMODE) >> BITP_RCU_STAT_BMODE; - -#if CONFIG_ADI_SPL_FORCE_BMODE != 0 - /* - * In case we want to force boot sequences such as: - * QSPI -> OSPI - * QSPI -> eMMC - * If this is not set, then we will always try to use the BMODE setting - * for both stages... i.e. - * QSPI -> QSPI - */ - - // (Don't allow skipping JTAG/UART BMODE settings) - if (local_mode != 0 && local_mode != 3) - local_mode = CONFIG_ADI_SPL_FORCE_BMODE; -#endif - - *bmode = local_mode; - - if (local_mode >= 0 && local_mode <= ARRAY_SIZE(bmodes)) - return bmodes[local_mode]; - return "unknown"; -} - -void print_cpu_id(void) -{ - if (!IS_ENABLED(CONFIG_ARM64)) { - u32 cpuid = 0; - - __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid)); - - printf("Detected Revision: %d.%d\n", cpuid & 0xf00000 >> 20, cpuid & 0xf); - } -} - -int print_cpuinfo(void) -{ - u32 bmode; - - printf("CPU: ADSP %s (%s boot)\n", CONFIG_LDR_CPU, sc5xx_get_boot_mode(&bmode)); - print_cpu_id(); - - return 0; -} - -void fixup_dp83867_phy(struct phy_device *phydev) -{ - int phy_data = 0; - - phy_data = phy_read(phydev, MDIO_DEVAD_NONE, 0x32); - phy_write(phydev, MDIO_DEVAD_NONE, 0x32, (1 << 7) | phy_data); - int cfg3 = 0; - #define MII_DP83867_CFG3 (0x1e) - /* - * Pin INT/PWDN on DP83867 should be configured as an Interrupt Output - * instead of a Power-Down Input on ADI SC5XX boards in order to - * prevent the signal interference from other peripherals during they - * are running at the same time. - */ - cfg3 = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG3); - cfg3 |= (1 << 7); - phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG3, cfg3); - - // Mystery second port fixup on ezkits with two PHYs - if (CONFIG_DW_PORTS & 2) - phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 3); - - if (IS_ENABLED(CONFIG_ADI_BUG_EZKHW21)) { - phydev->advertising &= PHY_BASIC_FEATURES; - phydev->speed = SPEED_100; - } - - if (phydev->drv->config) - phydev->drv->config(phydev); - - if (IS_ENABLED(CONFIG_ADI_BUG_EZKHW21)) - phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x3100); -} - -int dram_init(void) -{ - gd->ram_size = CFG_SYS_SDRAM_SIZE; - return 0; -} diff --git a/arch/arm/mach-sc5xx/spl.c b/arch/arm/mach-sc5xx/spl.c deleted file mode 100644 index 68e0310f5af..00000000000 --- a/arch/arm/mach-sc5xx/spl.c +++ /dev/null @@ -1,102 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2022 - Analog Devices, Inc. - * - * Written and/or maintained by Timesys Corporation - * - * Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com> - * Contact: Greg Malysa <greg.malysa@timesys.com> - */ - -#include <spl.h> -#include <asm/arch-adi/sc5xx/sc5xx.h> -#include <asm/arch-adi/sc5xx/spl.h> -#include "init/clkinit.h" -#include "init/dmcinit.h" - -static bool adi_start_uboot_proper; - -static int adi_sf_default_bus = CONFIG_SF_DEFAULT_BUS; -static int adi_sf_default_cs = CONFIG_SF_DEFAULT_CS; -static int adi_sf_default_speed = CONFIG_SF_DEFAULT_SPEED; - -u32 bmode; - -int spl_start_uboot(void) -{ - return adi_start_uboot_proper; -} - -unsigned int spl_spi_get_default_speed(void) -{ - return adi_sf_default_speed; -} - -unsigned int spl_spi_get_default_bus(void) -{ - return adi_sf_default_bus; -} - -unsigned int spl_spi_get_default_cs(void) -{ - return adi_sf_default_cs; -} - -void board_boot_order(u32 *spl_boot_list) -{ - const char *bmodestring = sc5xx_get_boot_mode(&bmode); - - printf("ADI Boot Mode: 0x%x (%s)\n", bmode, bmodestring); - - /* - * By default everything goes back to the bootrom, where we'll read table - * parameters and ask for another image to be loaded - */ - spl_boot_list[0] = BOOT_DEVICE_BOOTROM; - - if (bmode == 0) { - printf("SPL execution has completed. Please load U-Boot Proper via JTAG"); - while (1) - ; - } -} - -int32_t __weak adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *config, int32_t cause) -{ - return 0; -} - -int board_return_to_bootrom(struct spl_image_info *spl_image, - struct spl_boot_device *bootdev) -{ -#if CONFIG_ADI_SPL_FORCE_BMODE != 0 - // see above - if (bmode != 0 && bmode != 3) - bmode = CONFIG_ADI_SPL_FORCE_BMODE; -#endif - - if (bmode >= (ARRAY_SIZE(adi_rom_boot_args))) - bmode = 0; - - adi_rom_boot((void *)adi_rom_boot_args[bmode].addr, - adi_rom_boot_args[bmode].flags, - 0, &adi_rom_boot_hook, - adi_rom_boot_args[bmode].cmd); - return 0; -}; - -void board_init_f(ulong dummy) -{ - int ret; - - clks_init(); - DMC_Config(); - sc5xx_soc_init(); - - ret = spl_early_init(); - if (ret) - panic("spl_early_init() failed\n"); - - preloader_console_init(); -} - diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index feaf5ce4596..616e1afe5de 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -5,7 +5,7 @@ * Copyright (C) 2015 Marek Vasut <marex@denx.de> */ -#include <config.h> +#include <common.h> #include <asm/arch/clock_manager.h> #include <asm/arch/mailbox_s10.h> #include <asm/arch/misc.h> diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c index 160f6e73ca9..9e645a42531 100644 --- a/arch/arm/mach-socfpga/clock_manager.c +++ b/arch/arm/mach-socfpga/clock_manager.c @@ -3,6 +3,7 @@ * Copyright (C) 2013-2017 Altera Corporation <www.altera.com> */ +#include <common.h> #include <asm/arch/clock_manager.h> #include <asm/arch/system_manager.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c index 9987d5bcee6..28f593b60e6 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex.c @@ -5,6 +5,7 @@ */ #include <clk.h> +#include <common.h> #include <dm.h> #include <log.h> #include <malloc.h> diff --git a/arch/arm/mach-socfpga/clock_manager_agilex5.c b/arch/arm/mach-socfpga/clock_manager_agilex5.c index 7ec28d91ef3..b92f0b3af80 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex5.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex5.c @@ -16,6 +16,7 @@ #include <vsprintf.h> #include <asm/global_data.h> #include <asm/io.h> +#include <asm/u-boot.h> #include <linux/kernel.h> #include <linux/string.h> #include <linux/types.h> diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c index 58b9321131a..8ab18f6b725 100644 --- a/arch/arm/mach-socfpga/clock_manager_arria10.c +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c @@ -3,6 +3,7 @@ * Copyright (C) 2016-2017 Intel Corporation */ +#include <common.h> #include <fdtdec.h> #include <malloc.h> #include <asm/io.h> diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c index 154ad2154ae..8fa2760798b 100644 --- a/arch/arm/mach-socfpga/clock_manager_gen5.c +++ b/arch/arm/mach-socfpga/clock_manager_gen5.c @@ -3,6 +3,7 @@ * Copyright (C) 2013-2017 Altera Corporation <www.altera.com> */ +#include <common.h> #include <time.h> #include <asm/io.h> #include <dm.h> diff --git a/arch/arm/mach-socfpga/clock_manager_n5x.c b/arch/arm/mach-socfpga/clock_manager_n5x.c index c4c071330fc..0ed480de670 100644 --- a/arch/arm/mach-socfpga/clock_manager_n5x.c +++ b/arch/arm/mach-socfpga/clock_manager_n5x.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <asm/arch/clock_manager.h> #include <asm/arch/system_manager.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c index 1e148947a33..45300336d52 100644 --- a/arch/arm/mach-socfpga/clock_manager_s10.c +++ b/arch/arm/mach-socfpga/clock_manager_s10.c @@ -4,7 +4,7 @@ * */ -#include <linux/errno.h> +#include <common.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch/clock_manager.h> diff --git a/arch/arm/mach-socfpga/firewall.c b/arch/arm/mach-socfpga/firewall.c index 4dec47b8e96..69229dc651e 100644 --- a/arch/arm/mach-socfpga/firewall.c +++ b/arch/arm/mach-socfpga/firewall.c @@ -4,8 +4,8 @@ * */ -#include <mach/base_addr_soc64.h> #include <asm/io.h> +#include <common.h> #include <asm/arch/firewall.h> #include <asm/arch/system_manager.h> diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c index c946d4c38d9..18d692c6314 100644 --- a/arch/arm/mach-socfpga/fpga_manager.c +++ b/arch/arm/mach-socfpga/fpga_manager.c @@ -7,7 +7,7 @@ * platform code, the real meat is located in drivers/fpga/socfpga.c . */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/fpga_manager.h> diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c index 7c86350d5ea..561d3408cd8 100644 --- a/arch/arm/mach-socfpga/freeze_controller.c +++ b/arch/arm/mach-socfpga/freeze_controller.c @@ -4,7 +4,7 @@ */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/clock_manager.h> #include <asm/arch/freeze_controller.h> diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h index 49f3fb2e705..6c9d32b9dd8 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h @@ -6,8 +6,6 @@ #ifndef _CLOCK_MANAGER_H_ #define _CLOCK_MANAGER_H_ -#include <linux/types.h> - phys_addr_t socfpga_get_clkmgr_addr(void); #ifndef __ASSEMBLY__ diff --git a/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h b/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h index 01335dc9310..d5a11122c72 100644 --- a/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h +++ b/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h @@ -7,8 +7,6 @@ #ifndef _SECURE_REG_HELPER_H_ #define _SECURE_REG_HELPER_H_ -#include <linux/types.h> - #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC 1 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 2 #define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1 3 diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga/mailbox_s10.c index 4c86f1e9917..101af238552 100644 --- a/arch/arm/mach-socfpga/mailbox_s10.c +++ b/arch/arm/mach-socfpga/mailbox_s10.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <asm/arch/clock_manager.h> #include <asm/arch/mailbox_s10.h> #include <asm/arch/system_manager.h> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 495ba2a0d41..80ad0870341 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -3,7 +3,7 @@ * Copyright (C) 2012-2017 Altera Corporation <www.altera.com> */ -#include <config.h> +#include <common.h> #include <command.h> #include <cpu_func.h> #include <hang.h> diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 34c21317894..93c9e8b0fb4 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -4,7 +4,7 @@ */ #include <altera.h> -#include <config.h> +#include <common.h> #include <errno.h> #include <fdtdec.h> #include <init.h> diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index b898b6f8f22..e7500c16f72 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -3,7 +3,7 @@ * Copyright (C) 2012-2017 Altera Corporation <www.altera.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <init.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c index ad1ef0db186..2acdfad07b3 100644 --- a/arch/arm/mach-socfpga/misc_soc64.c +++ b/arch/arm/mach-socfpga/misc_soc64.c @@ -5,6 +5,7 @@ */ #include <altera.h> +#include <common.h> #include <asm/arch/mailbox_s10.h> #include <asm/arch/misc.h> #include <asm/arch/reset_manager.h> diff --git a/arch/arm/mach-socfpga/mmu-arm64_s10.c b/arch/arm/mach-socfpga/mmu-arm64_s10.c index b8e40d9a788..91c6d7c55f1 100644 --- a/arch/arm/mach-socfpga/mmu-arm64_s10.c +++ b/arch/arm/mach-socfpga/mmu-arm64_s10.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <asm/armv8/mmu.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c index c8074f47e76..f378fce7f02 100644 --- a/arch/arm/mach-socfpga/pinmux_arria10.c +++ b/arch/arm/mach-socfpga/pinmux_arria10.c @@ -4,9 +4,9 @@ */ #include <log.h> -#include <linux/errno.h> #include <asm/arch/pinmux.h> #include <asm/io.h> +#include <common.h> #include <fdtdec.h> static int do_pinctr_pin(const void *blob, int child, const char *node_name) diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c index da335f4292c..27c03080113 100644 --- a/arch/arm/mach-socfpga/reset_manager_arria10.c +++ b/arch/arm/mach-socfpga/reset_manager_arria10.c @@ -9,6 +9,7 @@ #include <asm/arch/misc.h> #include <asm/arch/reset_manager.h> #include <asm/arch/system_manager.h> +#include <common.h> #include <errno.h> #include <fdtdec.h> #include <wait_bit.h> diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 9395122dae1..a65860ef021 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -4,7 +4,7 @@ */ -#include <mach/base_addr_ac5.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/fpga_manager.h> #include <asm/arch/reset_manager.h> diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c index dd0383c7c76..f47fec10a0c 100644 --- a/arch/arm/mach-socfpga/reset_manager_s10.c +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <hang.h> #include <asm/global_data.h> #include <asm/io.h> diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c index f8811525da4..36d6880141e 100644 --- a/arch/arm/mach-socfpga/scan_manager.c +++ b/arch/arm/mach-socfpga/scan_manager.c @@ -3,7 +3,7 @@ * Copyright (C) 2013 Altera Corporation <www.altera.com> */ -#include <config.h> +#include <common.h> #include <errno.h> #include <asm/io.h> #include <asm/arch/freeze_controller.h> diff --git a/arch/arm/mach-socfpga/secure_reg_helper.c b/arch/arm/mach-socfpga/secure_reg_helper.c index 802a966ce87..0d4f45f33da 100644 --- a/arch/arm/mach-socfpga/secure_reg_helper.c +++ b/arch/arm/mach-socfpga/secure_reg_helper.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <hang.h> #include <asm/io.h> #include <asm/system.h> diff --git a/arch/arm/mach-socfpga/secure_vab.c b/arch/arm/mach-socfpga/secure_vab.c index 4347bf6e792..e2db5885064 100644 --- a/arch/arm/mach-socfpga/secure_vab.c +++ b/arch/arm/mach-socfpga/secure_vab.c @@ -8,6 +8,7 @@ #include <asm/arch/secure_vab.h> #include <asm/arch/smc_api.h> #include <asm/unaligned.h> +#include <common.h> #include <exports.h> #include <linux/errno.h> #include <linux/intel-smc.h> diff --git a/arch/arm/mach-socfpga/smc_api.c b/arch/arm/mach-socfpga/smc_api.c index ebaa0b8fa17..8ffc7a472b5 100644 --- a/arch/arm/mach-socfpga/smc_api.c +++ b/arch/arm/mach-socfpga/smc_api.c @@ -4,11 +4,10 @@ * */ +#include <common.h> #include <asm/ptrace.h> #include <asm/system.h> -#include <linux/errno.h> #include <linux/intel-smc.h> -#include <linux/string.h> int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len) { diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index c20376f7f8e..3981d2d4f14 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -3,13 +3,14 @@ * Copyright (C) 2012-2021 Altera Corporation <www.altera.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <hang.h> #include <init.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/pl310.h> +#include <asm/u-boot.h> #include <asm/utils.h> #include <image.h> #include <asm/arch/reset_manager.h> diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c index 52617a39cca..ee5a9dc1e2f 100644 --- a/arch/arm/mach-socfpga/spl_agilex.c +++ b/arch/arm/mach-socfpga/spl_agilex.c @@ -8,7 +8,9 @@ #include <log.h> #include <asm/global_data.h> #include <asm/io.h> +#include <asm/u-boot.h> #include <asm/utils.h> +#include <common.h> #include <hang.h> #include <image.h> #include <spl.h> diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index df79cfe0f7f..287fbd1713c 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -3,11 +3,13 @@ * Copyright (C) 2012 Altera Corporation <www.altera.com> */ +#include <common.h> #include <hang.h> #include <init.h> #include <log.h> #include <asm/global_data.h> #include <asm/io.h> +#include <asm/u-boot.h> #include <asm/utils.h> #include <image.h> #include <asm/arch/reset_manager.h> diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c index 5ff137e5c6f..d056871d292 100644 --- a/arch/arm/mach-socfpga/spl_n5x.c +++ b/arch/arm/mach-socfpga/spl_n5x.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <asm/arch/clock_manager.h> #include <asm/arch/firewall.h> #include <asm/arch/mailbox_s10.h> @@ -12,6 +13,7 @@ #include <asm/arch/system_manager.h> #include <asm/global_data.h> #include <asm/io.h> +#include <asm/u-boot.h> #include <asm/utils.h> #include <dm/uclass.h> #include <hang.h> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index 53852cb7443..c20e87cdbef 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -9,7 +9,9 @@ #include <log.h> #include <asm/global_data.h> #include <asm/io.h> +#include <asm/u-boot.h> #include <asm/utils.h> +#include <common.h> #include <debug_uart.h> #include <image.h> #include <spl.h> diff --git a/arch/arm/mach-socfpga/spl_soc64.c b/arch/arm/mach-socfpga/spl_soc64.c index 4fe67ea0811..ba6efc1d864 100644 --- a/arch/arm/mach-socfpga/spl_soc64.c +++ b/arch/arm/mach-socfpga/spl_soc64.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <spl.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-socfpga/system_manager_gen5.c b/arch/arm/mach-socfpga/system_manager_gen5.c index c377d1c32c7..09caebb3c88 100644 --- a/arch/arm/mach-socfpga/system_manager_gen5.c +++ b/arch/arm/mach-socfpga/system_manager_gen5.c @@ -3,6 +3,7 @@ * Copyright (C) 2013-2017 Altera Corporation <www.altera.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/system_manager.h> #include <asm/arch/fpga_manager.h> diff --git a/arch/arm/mach-socfpga/system_manager_soc64.c b/arch/arm/mach-socfpga/system_manager_soc64.c index 4b42158be9d..958bb5107b5 100644 --- a/arch/arm/mach-socfpga/system_manager_soc64.c +++ b/arch/arm/mach-socfpga/system_manager_soc64.c @@ -8,6 +8,7 @@ #include <asm/arch/system_manager.h> #include <asm/global_data.h> #include <asm/io.h> +#include <common.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-socfpga/timer.c b/arch/arm/mach-socfpga/timer.c index 99de5744c48..d9e8c84bfcf 100644 --- a/arch/arm/mach-socfpga/timer.c +++ b/arch/arm/mach-socfpga/timer.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Altera Corporation <www.altera.com> */ -#include <config.h> +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/arch/timer.h> diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c index 80933586319..84b13ce9d3a 100644 --- a/arch/arm/mach-socfpga/timer_s10.c +++ b/arch/arm/mach-socfpga/timer_s10.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <init.h> #include <div64.h> #include <asm/io.h> diff --git a/arch/arm/mach-socfpga/vab.c b/arch/arm/mach-socfpga/vab.c index e74c71cfbb4..e146f2c5290 100644 --- a/arch/arm/mach-socfpga/vab.c +++ b/arch/arm/mach-socfpga/vab.c @@ -4,9 +4,9 @@ * */ -#include <vsprintf.h> #include <asm/arch/secure_vab.h> #include <command.h> +#include <common.h> #include <linux/ctype.h> static int do_vab(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c b/arch/arm/mach-socfpga/wrap_handoff_soc64.c index 92051d19b73..6aa9bb26b4e 100644 --- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c +++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c @@ -6,6 +6,7 @@ #include <asm/arch/handoff_soc64.h> #include <asm/io.h> +#include <common.h> #include <errno.h> #include "log.h" diff --git a/arch/arm/mach-socfpga/wrap_iocsr_config.c b/arch/arm/mach-socfpga/wrap_iocsr_config.c index 43ce329dd10..ce86f04cad1 100644 --- a/arch/arm/mach-socfpga/wrap_iocsr_config.c +++ b/arch/arm/mach-socfpga/wrap_iocsr_config.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Marek Vasut <marex@denx.de> */ -#include <config.h> +#include <common.h> #include <errno.h> #include <asm/arch/clock_manager.h> diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c index e494d2eb3f9..33ca14c9dc7 100644 --- a/arch/arm/mach-socfpga/wrap_pinmux_config.c +++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c @@ -3,9 +3,8 @@ * Copyright (C) 2015 Marek Vasut <marex@denx.de> */ +#include <common.h> #include <errno.h> -#include <linux/kernel.h> -#include <linux/types.h> /* Board-specific header. */ #include <qts/pinmux_config.h> diff --git a/arch/arm/mach-socfpga/wrap_pll_config.c b/arch/arm/mach-socfpga/wrap_pll_config.c index e0d0f8f81b7..0c40ae98761 100644 --- a/arch/arm/mach-socfpga/wrap_pll_config.c +++ b/arch/arm/mach-socfpga/wrap_pll_config.c @@ -3,7 +3,7 @@ * Copyright (C) 2015 Marek Vasut <marex@denx.de> */ -#include <config.h> +#include <common.h> #include <asm/arch/clock_manager.h> #include <qts/pll_config.h> diff --git a/arch/arm/mach-socfpga/wrap_pll_config_soc64.c b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c index f13581033e6..6a0d6b5ead7 100644 --- a/arch/arm/mach-socfpga/wrap_pll_config_soc64.c +++ b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c @@ -4,6 +4,7 @@ * */ +#include <common.h> #include <asm/arch/clock_manager.h> #include <asm/io.h> #include <asm/arch/handoff_soc64.h> diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c b/arch/arm/mach-socfpga/wrap_sdram_config.c index 8f3fbaf80c8..cd3a0f66335 100644 --- a/arch/arm/mach-socfpga/wrap_sdram_config.c +++ b/arch/arm/mach-socfpga/wrap_sdram_config.c @@ -3,10 +3,8 @@ * Copyright (C) 2015 Marek Vasut <marex@denx.de> */ -#include <config.h> +#include <common.h> #include <errno.h> -#include <linux/types.h> -#include <linux/kernel.h> #include <asm/arch/sdram.h> /* Board-specific header. */ diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c index 737e6809f8d..0bd8d7b22c4 100644 --- a/arch/arm/mach-stm32/soc.c +++ b/arch/arm/mach-stm32/soc.c @@ -4,6 +4,7 @@ * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics. */ +#include <common.h> #include <init.h> #include <asm/io.h> #include <asm/armv7_mpu.h> diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c index ebddf6a7dbc..158bf40cb97 100644 --- a/arch/arm/mach-stm32mp/boot_params.c +++ b/arch/arm/mach-stm32mp/boot_params.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH -#include <config.h> +#include <common.h> #include <log.h> #include <linux/libfdt.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 9ba7a6c9a89..5b869017ec1 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_MISC +#include <common.h> #include <clk.h> #include <dm.h> #include <log.h> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index 0cb3c7a9fa4..c7fe232f86e 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -3,6 +3,7 @@ * Copyright (C) 2019, STMicroelectronics - All Rights Reserved */ +#include <common.h> #include <command.h> #include <console.h> #include <log.h> diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index 967fa4e06c0..adee6e05b63 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -3,6 +3,7 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include <common.h> #include <bootm.h> #include <command.h> #include <dfu.h> diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c index 07c5e0456f8..35bed319942 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c @@ -3,12 +3,12 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include <common.h> #include <console.h> #include <dm.h> #include <dfu.h> #include <malloc.h> #include <serial.h> -#include <time.h> #include <watchdog.h> #include <asm/arch/sys_proto.h> #include <dm/lists.h> diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c index 4b1ed50e9fe..d18455bf36f 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c @@ -3,6 +3,7 @@ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved */ +#include <common.h> #include <dfu.h> #include <g_dnl.h> #include <usb.h> diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c index 78b12fcbb6a..fb1208fc5d5 100644 --- a/arch/arm/mach-stm32mp/dram_init.c +++ b/arch/arm/mach-stm32mp/dram_init.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include <common.h> #include <dm.h> #include <image.h> #include <init.h> diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index 478c3efae73..524778f00c6 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include <common.h> #include <clk.h> #include <cpu_func.h> #include <debug_uart.h> diff --git a/arch/arm/mach-stm32mp/stm32mp1/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c index e1e4dc04e01..d0b6c3cc5a5 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/fdt.c +++ b/arch/arm/mach-stm32mp/stm32mp1/fdt.c @@ -5,11 +5,11 @@ #define LOG_CATEGORY LOGC_ARCH +#include <common.h> #include <fdtdec.h> #include <fdt_support.h> #include <log.h> #include <tee.h> -#include <mach/stm32.h> #include <asm/arch/sys_proto.h> #include <dt-bindings/pinctrl/stm32-pinfunc.h> #include <linux/io.h> diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c index 7772546b2fe..4f2379df45f 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/psci.c +++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c @@ -4,6 +4,7 @@ */ #include <config.h> +#include <common.h> #include <asm/armv7.h> #include <asm/cache.h> #include <asm/gic.h> @@ -12,7 +13,6 @@ #include <asm/secure.h> #include <hang.h> #include <linux/bitops.h> -#include <linux/errno.h> /* PWR */ #define PWR_CR3 0x0c diff --git a/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c index 79c44188cc5..846637ab162 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c +++ b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c @@ -5,10 +5,10 @@ #define LOG_CATEGORY UCLASS_REGULATOR +#include <common.h> #include <dm.h> #include <errno.h> #include <syscon.h> -#include <time.h> #include <asm/io.h> #include <dm/device_compat.h> #include <dm/device-internal.h> diff --git a/arch/arm/mach-stm32mp/stm32mp1/spl.c b/arch/arm/mach-stm32mp/stm32mp1/spl.c index 7a8fd3178ad..6c79259b2c8 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/spl.c +++ b/arch/arm/mach-stm32mp/stm32mp1/spl.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <hang.h> diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c index 4a811065fc3..845d973ad1b 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c @@ -5,7 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH -#include <config.h> +#include <common.h> #include <log.h> #include <syscon.h> #include <asm/io.h> diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c index f096fe538d8..d75ec99d6a1 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY LOGC_ARCH +#include <common.h> #include <env.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-stm32mp/syscon.c b/arch/arm/mach-stm32mp/syscon.c index 8bcbd979340..a2e351d74a7 100644 --- a/arch/arm/mach-stm32mp/syscon.c +++ b/arch/arm/mach-stm32mp/syscon.c @@ -3,6 +3,7 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ +#include <common.h> #include <clk.h> #include <dm.h> #include <syscon.h> diff --git a/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c b/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c index 3666dddca15..9077f86a8b4 100644 --- a/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c +++ b/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c @@ -1,3 +1,4 @@ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c index ceaafd6ec6f..0471e8a49e5 100644 --- a/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c +++ b/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c @@ -1,3 +1,4 @@ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c index 3faf8d5bd97..232b4fe2df7 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c index ce2ffa7a020..b6d6a687468 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c @@ -11,6 +11,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c index e6446b9180d..c11cb8678f6 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c @@ -9,6 +9,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c index afe8e25c7f5..2136ca3a4cb 100644 --- a/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c +++ b/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c @@ -19,6 +19,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c index c243b574406..10008601134 100644 --- a/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c +++ b/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c @@ -6,6 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c b/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c index bc47a463853..bd57e2f6aac 100644 --- a/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c +++ b/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c @@ -1,3 +1,4 @@ +#include <common.h> #include <asm/arch/dram.h> #include <asm/arch/cpu.h> diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c index 1ea620e4ab5..532730fe727 100644 --- a/arch/arm/mach-tegra/ap.c +++ b/arch/arm/mach-tegra/ap.c @@ -6,7 +6,7 @@ /* Tegra AP (Application Processor) code */ -#include <config.h> +#include <common.h> #include <log.h> #include <linux/bug.h> #include <asm/io.h> diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c index 4fbe47a91e1..ea4eac392d9 100644 --- a/arch/arm/mach-tegra/arm64-mmu.c +++ b/arch/arm/mach-tegra/arm64-mmu.c @@ -7,6 +7,7 @@ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <asm/system.h> #include <asm/armv8/mmu.h> diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index c382e042860..327d70bd4cc 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -4,7 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <dm.h> #include <init.h> diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 479137e457c..adea12c9b7f 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -4,7 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ -#include <config.h> +#include <common.h> #include <dm.h> #include <env.h> #include <errno.h> diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c index 462364abf03..d7063490e22 100644 --- a/arch/arm/mach-tegra/cache.c +++ b/arch/arm/mach-tegra/cache.c @@ -5,6 +5,7 @@ /* Tegra cache routines */ +#include <common.h> #include <asm/io.h> #include <asm/arch-tegra/ap.h> #if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL) diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c index c12543d71ac..8f5bb2f261a 100644 --- a/arch/arm/mach-tegra/cboot.c +++ b/arch/arm/mach-tegra/cboot.c @@ -3,6 +3,7 @@ * Copyright (c) 2016-2018, NVIDIA CORPORATION. */ +#include <common.h> #include <env.h> #include <fdt_support.h> #include <fdtdec.h> diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 157e6c4911a..575da2bdb5a 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -5,6 +5,7 @@ /* Tegra SoC common clock control functions */ +#include <common.h> #include <div64.h> #include <dm.h> #include <errno.h> diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c index 8fa1207e97a..92ff6cb1bf8 100644 --- a/arch/arm/mach-tegra/cmd_enterrcm.c +++ b/arch/arm/mach-tegra/cmd_enterrcm.c @@ -24,6 +24,7 @@ * (C) Copyright 2004 Texas Insturments */ +#include <common.h> #include <command.h> #include <cpu_func.h> #include <irq_func.h> diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c index 5f2a5917102..59ca8aeabac 100644 --- a/arch/arm/mach-tegra/cpu.c +++ b/arch/arm/mach-tegra/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-tegra/crypto.c b/arch/arm/mach-tegra/crypto.c index 49e6a45243a..893da35e0b9 100644 --- a/arch/arm/mach-tegra/crypto.c +++ b/arch/arm/mach-tegra/crypto.c @@ -4,6 +4,7 @@ * (C) Copyright 2010 - 2011 NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <log.h> #include <linux/errno.h> #include <asm/arch-tegra/crypto.h> diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c index f4ae602d523..c11494722bc 100644 --- a/arch/arm/mach-tegra/dt-setup.c +++ b/arch/arm/mach-tegra/dt-setup.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2016, NVIDIA CORPORATION. */ +#include <common.h> #include <fdtdec.h> #include <stdlib.h> #include <asm/arch-tegra/cboot.h> diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c index 83fad35d4dc..2eea14b5a74 100644 --- a/arch/arm/mach-tegra/emc.c +++ b/arch/arm/mach-tegra/emc.c @@ -3,6 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ +#include <common.h> #include <asm/global_data.h> #include "emc.h" #include <asm/io.h> diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index e9b5259ac70..83bd5055384 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -7,6 +7,7 @@ * Svyatoslav Ryhel <clamor95@gmail.com> */ +#include <common.h> #include <linux/delay.h> #include <asm/io.h> diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c index 23381759b79..36538e7f96a 100644 --- a/arch/arm/mach-tegra/gpu.c +++ b/arch/arm/mach-tegra/gpu.c @@ -5,6 +5,7 @@ /* Tegra vpr routines */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/tegra.h> diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c index 0445d5d48e5..66c1276f4b8 100644 --- a/arch/arm/mach-tegra/ivc.c +++ b/arch/arm/mach-tegra/ivc.c @@ -3,11 +3,11 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ +#include <common.h> #include <cpu_func.h> #include <asm/io.h> #include <asm/arch-tegra/ivc.h> #include <linux/bug.h> -#include <linux/errno.h> #include <linux/printk.h> #define TEGRA_IVC_ALIGN 64 diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c index 3f968d4aeae..c4f5106750b 100644 --- a/arch/arm/mach-tegra/pmc.c +++ b/arch/arm/mach-tegra/pmc.c @@ -3,6 +3,7 @@ * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <cpu_func.h> #include <log.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 2a2f8467216..631bc04e950 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -3,8 +3,8 @@ * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <errno.h> -#include <time.h> #include <linux/delay.h> #include <asm/io.h> diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c index 5df0eb28c96..ed897efc5f0 100644 --- a/arch/arm/mach-tegra/spl.c +++ b/arch/arm/mach-tegra/spl.c @@ -5,6 +5,7 @@ * * Allen Martin <amartin@nvidia.com> */ +#include <common.h> #include <debug_uart.h> #include <log.h> #include <spl.h> diff --git a/arch/arm/mach-tegra/sys_info.c b/arch/arm/mach-tegra/sys_info.c index 11b40480246..5ad586ac17f 100644 --- a/arch/arm/mach-tegra/sys_info.c +++ b/arch/arm/mach-tegra/sys_info.c @@ -4,6 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <init.h> #include <linux/ctype.h> #if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30) diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index d5cc8ac44dd..2ee755bc649 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -6,6 +6,7 @@ /* Tegra114 Clock control functions */ +#include <common.h> #include <init.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-tegra/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c index 3fe2d2d7324..7d8f080c310 100644 --- a/arch/arm/mach-tegra/tegra114/cpu.c +++ b/arch/arm/mach-tegra/tegra114/cpu.c @@ -4,6 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 4ac0c10c597..ed8b6d96381 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -6,7 +6,7 @@ /* Tegra124 Clock control functions */ -#include <config.h> +#include <common.h> #include <init.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c index 07892aedd3c..b1bfe8fb5e1 100644 --- a/arch/arm/mach-tegra/tegra124/cpu.c +++ b/arch/arm/mach-tegra/tegra124/cpu.c @@ -4,6 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/ahb.h> diff --git a/arch/arm/mach-tegra/tegra124/pmc.c b/arch/arm/mach-tegra/tegra124/pmc.c index 2294911501e..3921ffb52af 100644 --- a/arch/arm/mach-tegra/tegra124/pmc.c +++ b/arch/arm/mach-tegra/tegra124/pmc.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 Google, Inc */ +#include <common.h> #include <dm.h> #include <syscon.h> diff --git a/arch/arm/mach-tegra/tegra124/psci.c b/arch/arm/mach-tegra/tegra124/psci.c index a50b681935a..ab102a62261 100644 --- a/arch/arm/mach-tegra/tegra124/psci.c +++ b/arch/arm/mach-tegra/tegra124/psci.c @@ -4,6 +4,7 @@ * Author: Jan Kiszka <jan.kiszka@siemens.com> */ +#include <common.h> #include <asm/io.h> #include <asm/psci.h> #include <asm/arch/flow.h> diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c index 1153444267d..69736aa3925 100644 --- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c @@ -5,9 +5,9 @@ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt +#include <common.h> #include <errno.h> #include <log.h> -#include <time.h> #include <dm/of_access.h> #include <dm/ofnode.h> #include <linux/delay.h> diff --git a/arch/arm/mach-tegra/tegra20/bct.c b/arch/arm/mach-tegra/tegra20/bct.c index e155b98cf65..b2c44f3d237 100644 --- a/arch/arm/mach-tegra/tegra20/bct.c +++ b/arch/arm/mach-tegra/tegra20/bct.c @@ -4,6 +4,7 @@ * Copyright (c) 2022, Svyatoslav Ryhel <clamor95@gmail.com> */ +#include <common.h> #include <command.h> #include <log.h> #include <asm/arch-tegra/crypto.h> diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index 6af20e9c782..109b73bfbe7 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -7,6 +7,7 @@ /* Tegra20 Clock control functions */ +#include <common.h> #include <errno.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-tegra/tegra20/cpu.c b/arch/arm/mach-tegra/tegra20/cpu.c index 1ba3930b5e6..e5b60598f7f 100644 --- a/arch/arm/mach-tegra/tegra20/cpu.c +++ b/arch/arm/mach-tegra/tegra20/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <asm/io.h> #include <asm/arch/tegra.h> #include <asm/arch-tegra/pmc.h> diff --git a/arch/arm/mach-tegra/tegra20/display.c b/arch/arm/mach-tegra/tegra20/display.c index 207e50aac90..4ba3fb23fd6 100644 --- a/arch/arm/mach-tegra/tegra20/display.c +++ b/arch/arm/mach-tegra/tegra20/display.c @@ -4,6 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/tegra.h> diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c index e2ee8f124ac..fb5e699c940 100644 --- a/arch/arm/mach-tegra/tegra20/emc.c +++ b/arch/arm/mach-tegra/tegra20/emc.c @@ -3,7 +3,7 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include <config.h> +#include <common.h> #include <fdtdec.h> #include <log.h> #include <asm/io.h> diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c index f2fe5d0fa9d..05d0668cdba 100644 --- a/arch/arm/mach-tegra/tegra20/pmu.c +++ b/arch/arm/mach-tegra/tegra20/pmu.c @@ -4,6 +4,7 @@ * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <i2c.h> #include <log.h> #include <tps6586x.h> diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c index 18034c83a1c..5e3a9ebaceb 100644 --- a/arch/arm/mach-tegra/tegra20/warmboot.c +++ b/arch/arm/mach-tegra/tegra20/warmboot.c @@ -4,6 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ +#include <common.h> #include <asm/global_data.h> #include <asm/io.h> #include <linux/errno.h> diff --git a/arch/arm/mach-tegra/tegra20/warmboot_avp.c b/arch/arm/mach-tegra/tegra20/warmboot_avp.c index 65bbe182535..94ce762e01f 100644 --- a/arch/arm/mach-tegra/tegra20/warmboot_avp.c +++ b/arch/arm/mach-tegra/tegra20/warmboot_avp.c @@ -4,7 +4,7 @@ * NVIDIA Corporation <www.nvidia.com> */ -#include <config.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/flow.h> diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index 57ff0b2a19a..74817e0440b 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -6,10 +6,10 @@ /* Tegra210 Clock control functions */ +#include <common.h> #include <errno.h> #include <init.h> #include <log.h> -#include <time.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c index e409c2842e2..30d0395bb0e 100644 --- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c @@ -5,9 +5,9 @@ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt +#include <common.h> #include <errno.h> #include <log.h> -#include <time.h> #include <asm/global_data.h> #include <dm/of_access.h> #include <dm/ofnode.h> diff --git a/arch/arm/mach-tegra/tegra30/bct.c b/arch/arm/mach-tegra/tegra30/bct.c index 250009ea8d8..cff1a3e98d2 100644 --- a/arch/arm/mach-tegra/tegra30/bct.c +++ b/arch/arm/mach-tegra/tegra30/bct.c @@ -4,9 +4,9 @@ * Copyright (c) 2022, Svyatoslav Ryhel <clamor95@gmail.com> */ +#include <common.h> #include <command.h> #include <log.h> -#include <vsprintf.h> #include <asm/arch-tegra/crypto.h> #include "bct.h" #include "uboot_aes.h" diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 7d61127920b..0af8cde8c64 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -6,6 +6,7 @@ /* Tegra30 Clock control functions */ +#include <common.h> #include <errno.h> #include <init.h> #include <log.h> diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index 51a9deab1fd..60bbf13ea52 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <log.h> #include <asm/io.h> #include <asm/arch/clock.h> diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index a3515d903a6..28fdebe50a3 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -5,6 +5,7 @@ #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt +#include <common.h> #include <errno.h> #include <log.h> #include <linux/printk.h> diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c index 1345b80747e..f2d90302f6d 100644 --- a/arch/arm/mach-tegra/xusb-padctl-dummy.c +++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c @@ -3,9 +3,9 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ +#include <common.h> #include <errno.h> -#include <linux/compiler.h> #include <asm/arch-tegra/xusb-padctl.h> struct tegra_xusb_phy * __weak tegra_xusb_phy_get(unsigned int type) diff --git a/arch/arm/mach-u8500/cache.c b/arch/arm/mach-u8500/cache.c index 7541b567d0f..05a91346a89 100644 --- a/arch/arm/mach-u8500/cache.c +++ b/arch/arm/mach-u8500/cache.c @@ -3,7 +3,7 @@ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <asm/armv7.h> #include <asm/cache.h> diff --git a/arch/arm/mach-u8500/cpuinfo.c b/arch/arm/mach-u8500/cpuinfo.c index 6d4c6196c3d..ab05b8a51b2 100644 --- a/arch/arm/mach-u8500/cpuinfo.c +++ b/arch/arm/mach-u8500/cpuinfo.c @@ -3,6 +3,7 @@ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net> */ +#include <common.h> #include <init.h> #include <asm/io.h> diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 0e1164a2680..e6f1286e71f 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -12,6 +12,7 @@ #include <linux/printk.h> #include <linux/sizes.h> #include <asm/global_data.h> +#include <asm/u-boot.h> #include "init.h" #include "sg-regs.h" diff --git a/arch/arm/mach-versal-net/clk.c b/arch/arm/mach-versal-net/clk.c index 61b8fe71b1a..d097de7afa6 100644 --- a/arch/arm/mach-versal-net/clk.c +++ b/arch/arm/mach-versal-net/clk.c @@ -6,6 +6,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c index d088e440f63..a82741e70fc 100644 --- a/arch/arm/mach-versal-net/cpu.c +++ b/arch/arm/mach-versal-net/cpu.c @@ -6,6 +6,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <init.h> #include <asm/armv8/mmu.h> #include <asm/cache.h> diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c index 19943dfdd4c..5e3f44c7782 100644 --- a/arch/arm/mach-versal/clk.c +++ b/arch/arm/mach-versal/clk.c @@ -4,6 +4,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/global_data.h> diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c index 363ce3007fd..e4dc305d928 100644 --- a/arch/arm/mach-versal/cpu.c +++ b/arch/arm/mach-versal/cpu.c @@ -4,6 +4,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <init.h> #include <asm/armv8/mmu.h> #include <asm/cache.h> diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c index 921ca49c359..2487b482ddb 100644 --- a/arch/arm/mach-versal/mp.c +++ b/arch/arm/mach-versal/mp.c @@ -4,8 +4,7 @@ * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ -#include <config.h> -#include <linux/string.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile new file mode 100644 index 00000000000..858ca9414c0 --- /dev/null +++ b/arch/arm/mach-versatile/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +obj-y = timer.o +obj-y += reset.o diff --git a/arch/arm/mach-versatile/reset.S b/arch/arm/mach-versatile/reset.S new file mode 100644 index 00000000000..c7f1225fb29 --- /dev/null +++ b/arch/arm/mach-versatile/reset.S @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * armboot - Startup Code for ARM926EJS CPU-core + * + * Copyright (c) 2003 Texas Instruments + * + * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ + * + * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> + * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> + * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> + * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> + * Copyright (c) 2003 Kshitij <kshitij@ti.com> + */ + + .align 5 +.globl reset_cpu +reset_cpu: + ldr r1, rstctl1 /* get clkm1 reset ctl */ + mov r3, #0x0 + strh r3, [r1] /* clear it */ + mov r3, #0x8 + strh r3, [r1] /* force dsp+arm reset */ +_loop_forever: + b _loop_forever + +rstctl1: + .word 0xfffece10 diff --git a/arch/arm/mach-versatile/timer.c b/arch/arm/mach-versatile/timer.c new file mode 100644 index 00000000000..b471412186d --- /dev/null +++ b/arch/arm/mach-versatile/timer.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2003 + * Texas Instruments <www.ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu@sysgo.de> + * + * (C) Copyright 2002-2004 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * (C) Copyright 2004 + * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> + */ + +#include <common.h> + +#define TIMER_ENABLE (1 << 7) +#define TIMER_MODE_MSK (1 << 6) +#define TIMER_MODE_FR (0 << 6) +#define TIMER_MODE_PD (1 << 6) + +#define TIMER_INT_EN (1 << 5) +#define TIMER_PRS_MSK (3 << 2) +#define TIMER_PRS_8S (1 << 3) +#define TIMER_SIZE_MSK (1 << 2) +#define TIMER_ONE_SHT (1 << 0) + +int timer_init (void) +{ + ulong tmr_ctrl_val; + + /* 1st disable the Timer */ + tmr_ctrl_val = *(volatile ulong *)(CFG_SYS_TIMERBASE + 8); + tmr_ctrl_val &= ~TIMER_ENABLE; + *(volatile ulong *)(CFG_SYS_TIMERBASE + 8) = tmr_ctrl_val; + + /* + * The Timer Control Register has one Undefined/Shouldn't Use Bit + * So we should do read/modify/write Operation + */ + + /* + * Timer Mode : Free Running + * Interrupt : Disabled + * Prescale : 8 Stage, Clk/256 + * Tmr Siz : 16 Bit Counter + * Tmr in Wrapping Mode + */ + tmr_ctrl_val = *(volatile ulong *)(CFG_SYS_TIMERBASE + 8); + tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT ); + tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); + + *(volatile ulong *)(CFG_SYS_TIMERBASE + 8) = tmr_ctrl_val; + + return 0; +} diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c index c1b018cf22e..5e1ba8d43ed 100644 --- a/arch/arm/mach-zynq/clk.c +++ b/arch/arm/mach-zynq/clk.c @@ -4,6 +4,7 @@ * Copyright (C) 2013 Xilinx, Inc. All rights reserved. */ #include <clk.h> +#include <common.h> #include <dm.h> #include <init.h> #include <malloc.h> diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index c75e453d573..3b6518c71c9 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -3,11 +3,10 @@ * Copyright (C) 2012 Michal Simek <monstr@monstr.eu> * Copyright (C) 2012 Xilinx, Inc. All rights reserved. */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <init.h> #include <zynqpl.h> -#include <linux/errno.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c index b9a2eef5a6f..28988ef95b5 100644 --- a/arch/arm/mach-zynq/ddrc.c +++ b/arch/arm/mach-zynq/ddrc.c @@ -4,7 +4,7 @@ * Copyright (C) 2012 - 2017 Xilinx, Inc. All rights reserved. */ -#include <linux/string.h> +#include <common.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index ef877df0fe8..5d9f4d23f34 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -3,6 +3,7 @@ * Copyright (c) 2013 - 2017 Xilinx Inc. */ +#include <common.h> #include <asm/io.h> #include <malloc.h> #include <asm/arch/hardware.h> diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index 8ef12ed65ce..fea1c9b12ad 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -2,6 +2,7 @@ /* * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek */ +#include <common.h> #include <debug_uart.h> #include <hang.h> #include <image.h> diff --git a/arch/arm/mach-zynqmp-r5/cpu.c b/arch/arm/mach-zynqmp-r5/cpu.c index 9a912dd5bd7..0d368443d82 100644 --- a/arch/arm/mach-zynqmp-r5/cpu.c +++ b/arch/arm/mach-zynqmp-r5/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2018 Xilinx, Inc. (Michal Simek) */ +#include <common.h> #include <cpu_func.h> #include <init.h> #include <asm/armv7_mpu.h> diff --git a/arch/arm/mach-zynqmp/aes.c b/arch/arm/mach-zynqmp/aes.c index 9a05fbf9c11..8a2b7fdcbe9 100644 --- a/arch/arm/mach-zynqmp/aes.c +++ b/arch/arm/mach-zynqmp/aes.c @@ -7,8 +7,9 @@ * Christian Taedcke <christian.taedcke@weidmueller.com> */ +#include <common.h> #include <mach/zynqmp_aes.h> -#include <linux/errno.h> + #include <asm/arch/sys_proto.h> #include <cpu_func.h> #include <memalign.h> diff --git a/arch/arm/mach-zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c index 9b573b1746a..3b05f8455bf 100644 --- a/arch/arm/mach-zynqmp/clk.c +++ b/arch/arm/mach-zynqmp/clk.c @@ -4,6 +4,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <init.h> #include <time.h> #include <asm/arch/clk.h> diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c index 07668c94689..6ae27894ecd 100644 --- a/arch/arm/mach-zynqmp/cpu.c +++ b/arch/arm/mach-zynqmp/cpu.c @@ -4,10 +4,9 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <init.h> #include <time.h> -#include <linux/errno.h> -#include <linux/types.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/armv8/mmu.h> diff --git a/arch/arm/mach-zynqmp/ecc_spl_init.c b/arch/arm/mach-zynqmp/ecc_spl_init.c index 1eef1078951..f547d8e3a5b 100644 --- a/arch/arm/mach-zynqmp/ecc_spl_init.c +++ b/arch/arm/mach-zynqmp/ecc_spl_init.c @@ -5,6 +5,7 @@ * Jorge Ramirez-Ortiz <jorge@foundries.io> */ +#include <common.h> #include <cpu_func.h> #include <asm/arch/hardware.h> #include <asm/arch/ecc_spl_init.h> diff --git a/arch/arm/mach-zynqmp/handoff.c b/arch/arm/mach-zynqmp/handoff.c index b007307e1f3..dce92438926 100644 --- a/arch/arm/mach-zynqmp/handoff.c +++ b/arch/arm/mach-zynqmp/handoff.c @@ -5,6 +5,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h index 01a13d4c7c0..2a9cffbd0f8 100644 --- a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h +++ b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h @@ -9,8 +9,6 @@ #ifndef ZYNQMP_AES_H #define ZYNQMP_AES_H -#include <linux/types.h> - struct zynqmp_aes { u64 srcaddr; u64 ivaddr; diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 9b46a25a1cb..aff9054212c 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -4,16 +4,14 @@ * Michal Simek <michal.simek@amd.com> */ -#include <config.h> +#include <common.h> #include <cpu_func.h> #include <log.h> -#include <vsprintf.h> #include <zynqmp_firmware.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> #include <linux/delay.h> -#include <linux/string.h> #define LOCK 0 #define SPLIT 1 diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c index 5b4d66359bf..b4d7f44bbee 100644 --- a/arch/arm/mach-zynqmp/psu_spl_init.c +++ b/arch/arm/mach-zynqmp/psu_spl_init.c @@ -4,6 +4,7 @@ * * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <asm/io.h> #include <asm/arch/psu_init_gpl.h> #include <linux/delay.h> diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index 6b67245f348..979ff3aef6c 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -5,6 +5,7 @@ * Michal Simek <michal.simek@amd.com> */ +#include <common.h> #include <image.h> #include <init.h> #include <log.h> |