diff options
Diffstat (limited to 'arch')
21 files changed, 177 insertions, 109 deletions
diff --git a/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi index 39bb66c4fcb..a30adb0be98 100644 --- a/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi @@ -6,6 +6,12 @@ #include "rk3328-u-boot.dtsi" / { + leds { + led-0 { + default-state = "on"; + }; + }; + smbios { compatible = "u-boot,sysinfo-smbios"; diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi index 037cec10ce3..7438bec4ee6 100644 --- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi @@ -15,13 +15,8 @@ }; &spi1 { - status = "okay"; - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; bootph-pre-ram; bootph-some-ram; - spi-max-frequency = <10000000>; }; }; diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi index 5ec15a845c1..7a6af430a6f 100644 --- a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi @@ -1,8 +1,22 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com> * Copyright (c) 2023 Radxa Limited */ -#include "rk3399-rock-pi-4-u-boot.dtsi" +#include "rk3399-u-boot.dtsi" +#include "rk3399-sdram-lpddr4-100.dtsi" + +/ { + leds { + led-0 { + default-state = "on"; + }; + + led-1 { + default-state = "on"; + }; + }; +}; &pcfg_pull_none_18ma { bootph-pre-ram; @@ -14,6 +28,12 @@ bootph-some-ram; }; +&sdhci { + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; +}; + &spi1 { status = "okay"; @@ -25,3 +45,7 @@ spi-max-frequency = <10000000>; }; }; + +&vdd_log { + regulator-init-microvolt = <950000>; +}; diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi index b3bfc77f756..4861574636e 100644 --- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi @@ -6,6 +6,14 @@ #include "rk3399-u-boot.dtsi" #include "rk3399-sdram-lpddr4-100.dtsi" +/ { + leds { + led-0 { + default-state = "on"; + }; + }; +}; + &sdhci { cap-mmc-highspeed; mmc-ddr-1_8v; diff --git a/arch/arm/dts/rk3566-anbernic-rg353p-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rg353p-u-boot.dtsi new file mode 100644 index 00000000000..fa3fbe6c810 --- /dev/null +++ b/arch/arm/dts/rk3566-anbernic-rg353p-u-boot.dtsi @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = &sdmmc0, &sdhci; + }; + + /* + * Adding fixed regulator to work around driver regulator + * requirements. Note that the correct regulator is on by + * default at boot and that saradc regulator gets corrected + * when proper device-tree is loaded. + */ + vcc_1v8_dummy: vcc-1v8-dummy { + bootph-pre-ram; + bootph-some-ram; + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_dummy"; + status = "okay"; + }; +}; + +&saradc { + bootph-pre-ram; + bootph-some-ram; + vref-supply = <&vcc_1v8_dummy>; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi deleted file mode 100644 index c7e849816a6..00000000000 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ /dev/null @@ -1,52 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -#include "rk356x-u-boot.dtsi" - -/ { - chosen { - u-boot,spl-boot-order = &sdmmc0, &sdhci; - }; -}; - -&dsi_dphy0 { - status = "okay"; -}; - -&dsi0 { - status = "okay"; -}; - -&i2c2 { - pinctrl-0 = <&i2c2m1_xfer>; - pinctrl-names = "default"; - status = "okay"; -}; - -&pmucru { - assigned-clocks = <&pmucru SCLK_32K_IOE>; - assigned-clock-parents = <&pmucru CLK_RTC_32K>; -}; - -/* - * We don't need the clocks, but if they are present they may cause - * probing to fail so we remove them for U-Boot. - */ -&rk817 { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ clocks; - /delete-property/ clock-names; -}; - -&sdhci { - pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, - <&emmc_datastrobe>, <&emmc_rstnout>; - pinctrl-names = "default"; - bus-width = <8>; - max-frequency = <200000000>; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc_3v3>; - vqmmc-supply = <&vcc_1v8>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3.dts b/arch/arm/dts/rk3566-anbernic-rgxx3.dts deleted file mode 100644 index c393c8d07af..00000000000 --- a/arch/arm/dts/rk3566-anbernic-rgxx3.dts +++ /dev/null @@ -1,28 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/dts-v1/; - -#include "rk3566-anbernic-rgxx3.dtsi" - -/ { - -/* - * Note this is a pseudo-model that doesn't exist in mainline Linux. - * This model is used for all RGXX3 devices and the board.c file will - * set the correct dtb name for loading mainline Linux automatically. - */ - model = "RGXX3"; - compatible = "anbernic,rg-arc-d", "anbernic,rg-arc-s", - "anbernic,rg353m", "anbernic,rg353p", - "anbernic,rg353ps", "anbernic,rg353v", - "anbernic,rg353vs", "anbernic,rg503", - "powkiddy,rgb10max3", "powkiddy,rgb30", - "powkiddy,rk2023", "rockchip,rk3566"; -}; - -&cru { - assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, - <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; - assigned-clock-rates = <32768>, <1200000000>, - <200000000>, <241500000>; -}; diff --git a/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi new file mode 100644 index 00000000000..6e8307e3bdf --- /dev/null +++ b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x-u-boot.dtsi" diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi index e0e501deccf..412f9e06aff 100644 --- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi +++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi @@ -5,6 +5,14 @@ #include "rk356x-u-boot.dtsi" +/ { + leds { + led-1 { + default-state = "on"; + }; + }; +}; + &sdhci { cap-mmc-highspeed; }; diff --git a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi index 74755a44eae..efeab626d8a 100644 --- a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi +++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi @@ -2,6 +2,29 @@ #include "rk356x-u-boot.dtsi" +/ { + gpio-leds { + led-0 { + default-state = "on"; + }; + + led-red { + default-state = "on"; + gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + }; + + led-green { + default-state = "on"; + gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + }; + + led-blue { + default-state = "on"; + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + }; + }; +}; + &pcie3x1 { pinctrl-0 = <&pcie30x1_reset_h>; }; diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi index 0da3d9c56b8..29c18f5a340 100644 --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi @@ -6,6 +6,14 @@ #include "rk356x-u-boot.dtsi" +/ { + leds { + led-0 { + default-state = "on"; + }; + }; +}; + &pcie3x2 { pinctrl-0 = <&pcie3x2_reset_h>; }; diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi index 968385622fa..8465dcd4c9c 100644 --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi @@ -11,20 +11,14 @@ bootph-some-ram; }; -&sfc { - pinctrl-names = "default"; - pinctrl-0 = <&fspim1_pins>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; +&saradc { + bootph-pre-ram; + vdd-microvolts = <1800000>; +}; +&sfc { flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; bootph-pre-ram; bootph-some-ram; - spi-max-frequency = <24000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <1>; }; }; diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index b0ad1158854..d51fbf51cb8 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -6,6 +6,14 @@ #include <dt-bindings/usb/pd.h> #include "rk3588-u-boot.dtsi" +/ { + leds { + led_rgb_b { + default-state = "on"; + }; + }; +}; + &fspim2_pins { bootph-pre-ram; bootph-some-ram; @@ -44,18 +52,9 @@ }; &sfc { - pinctrl-names = "default"; - pinctrl-0 = <&fspim2_pins>; - status = "okay"; - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; bootph-pre-ram; bootph-some-ram; - spi-max-frequency = <24000000>; - spi-rx-bus-width = <4>; - spi-tx-bus-width = <1>; }; }; diff --git a/arch/arm/dts/rk3588s-odroid-m2-u-boot.dtsi b/arch/arm/dts/rk3588s-odroid-m2-u-boot.dtsi new file mode 100644 index 00000000000..853ed58cfe5 --- /dev/null +++ b/arch/arm/dts/rk3588s-odroid-m2-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi index efba0c359ba..a75ae296386 100644 --- a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi @@ -5,6 +5,14 @@ #include "rk3588s-u-boot.dtsi" +/ { + leds { + io-led { + default-state = "on"; + }; + }; +}; + &sdhci { cap-mmc-highspeed; mmc-hs200-1_8v; diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h index b66277fc7f3..504459bd93d 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_px30.h +++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h @@ -464,5 +464,12 @@ enum { UART0_CLK_SEL_UART0_FRAC, UART0_DIVNP5_SHIFT = 0, UART0_DIVNP5_MASK = 0x1f << UART0_DIVNP5_SHIFT, + + /* CRU_PMU_CLKSEL5_CON */ + CLK_UART_FRAC_NUMERATOR_SHIFT = 16, + CLK_UART_FRAC_NUMERATOR_MASK = 0xffff << CLK_UART_FRAC_NUMERATOR_SHIFT, + CLK_UART_FRAC_DENOMINATOR_SHIFT = 0, + CLK_UART_FRAC_DENOMINATOR_MASK = + 0xffff << CLK_UART_FRAC_DENOMINATOR_SHIFT, }; #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index fc1b638ff01..269c219a6f8 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -257,7 +257,6 @@ config ROCKCHIP_RK3399 select SPL_SYSCON if SPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_SEPARATE_BSS - select SPL_SERIAL select CLK select FIT select PINCTRL @@ -288,6 +287,7 @@ config ROCKCHIP_RK3399 imply SPL_DM_SEQ_ALIAS imply SPL_FIT_SIGNATURE imply SPL_ROCKCHIP_COMMON_BOARD + imply SPL_SERIAL imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT imply TPL_CLK imply TPL_DM diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 3fadf7e4122..75d6693e28a 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -472,9 +472,18 @@ __weak int misc_init_r(void) __weak int board_rng_seed(struct abuf *buf) { struct udevice *dev; - size_t len = 0x8; + ulong len = env_get_ulong("rng_seed_size", 10, 64); u64 *data; + if (len < 64) { + /* + * rng_seed_size should be at least 32 bytes for Linux 5.19+, + * or 64 for older Linux kernel versions + */ + log_warning("Value for rng_seed_size (%lu) too low, Linux kernel RNG may fail to initialize early\n", + len); + } + data = malloc(len); if (!data) { printf("Out of memory\n"); diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index 899cf909fbb..e646f714c92 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568 help Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC. +config TARGET_ODROID_M1S_RK3566 + bool "ODROID-M1S" + help + Hardkernel ODROID-M1S single board computer with a RK3566 SoC. + config TARGET_POWKIDDY_X55_RK3566 bool "Powkiddy X55" help @@ -62,6 +67,7 @@ config TEXT_BASE source "board/rockchip/evb_rk3568/Kconfig" source "board/anbernic/rgxx3_rk3566/Kconfig" source "board/hardkernel/odroid_m1/Kconfig" +source "board/hardkernel/odroid_m1s/Kconfig" source "board/pine64/quartz64_rk3566/Kconfig" source "board/powkiddy/x55/Kconfig" source "board/radxa/zero3-rk3566/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index 768a3739329..c9a32287e92 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -26,6 +26,8 @@ #define PMU_BASE_ADDR 0xfdd90000 #define PMU_NOC_AUTO_CON0 (0x70) #define PMU_NOC_AUTO_CON1 (0x74) +#define PMU_PWR_GATE_SFTCON (0xa0) +#define PMU_PD_VO_DWN_ENA BIT(7) #define EDP_PHY_GRF_BASE 0xfdcb0000 #define EDP_PHY_GRF_CON0 (EDP_PHY_GRF_BASE + 0x00) #define EDP_PHY_GRF_CON10 (EDP_PHY_GRF_BASE + 0x28) @@ -130,6 +132,10 @@ int arch_cpu_init(void) writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1); writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2); writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3); + + /* Enable VO power domain for display */ + writel((PMU_PD_VO_DWN_ENA << 16), + PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON); #endif return 0; } diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index a76a470cc98..6f28a313325 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -134,6 +134,12 @@ config TARGET_NOVA_RK3588 includes socket for eMMC storage, an SDMMC slot, and a 40-pin GPIO header for expansion. +config TARGET_ODROID_M2_RK3588S + bool "Hardkernel ODROID-M2" + select BOARD_LATE_INIT + help + Hardkernel ODROID-M2 single board computer with a RK3588S2 SoC. + config TARGET_RK3588_NEU6 bool "Edgeble Neural Compute Module 6(Neu6) SoM" select BOARD_LATE_INIT @@ -366,6 +372,7 @@ source "board/friendlyelec/cm3588-nas-rk3588/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" +source "board/hardkernel/odroid_m2/Kconfig" source "board/indiedroid/nova/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" |