diff options
Diffstat (limited to 'board/freescale/p1010rdb/tlb.c')
| -rw-r--r-- | board/freescale/p1010rdb/tlb.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index 5e1fa70bca5..265cde81a3c 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -8,19 +8,19 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR, CFG_SYS_INIT_RAM_ADDR, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 , - CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 4 * 1024 , + CFG_SYS_INIT_RAM_ADDR + 4 * 1024, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 , - CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 8 * 1024 , + CFG_SYS_INIT_RAM_ADDR + 8 * 1024, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024 , - CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + SET_TLB_ENTRY(0, CFG_SYS_INIT_RAM_ADDR + 12 * 1024 , + CFG_SYS_INIT_RAM_ADDR + 12 * 1024, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), @@ -36,17 +36,17 @@ struct fsl_e_tlb_entry tlb_table[] = { #endif /* *I*G* - CCSRBAR */ - SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + SET_TLB_ENTRY(1, CFG_SYS_CCSRBAR, CFG_SYS_CCSRBAR_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_1M, 1), #ifndef CONFIG_SPL_BUILD - SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS, + SET_TLB_ENTRY(1, CFG_SYS_FLASH_BASE, CFG_SYS_FLASH_BASE_PHYS, MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, 0, 2, BOOKE_PAGESZ_16M, 1), - SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE + 0x1000000, - CONFIG_SYS_FLASH_BASE_PHYS + 0x1000000, + SET_TLB_ENTRY(1, CFG_SYS_FLASH_BASE + 0x1000000, + CFG_SYS_FLASH_BASE_PHYS + 0x1000000, MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, 0, 3, BOOKE_PAGESZ_16M, 1), @@ -64,7 +64,7 @@ struct fsl_e_tlb_entry tlb_table[] = { #endif /* *I*G - Board CPLD */ - SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS, + SET_TLB_ENTRY(1, CFG_SYS_CPLD_BASE, CFG_SYS_CPLD_BASE_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_256K, 1), @@ -73,14 +73,14 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 7, BOOKE_PAGESZ_1M, 1), #if defined(CONFIG_SYS_RAMBOOT) || !CONFIG_IS_ENABLED(COMMON_INIT_DDR) - SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, + SET_TLB_ENTRY(1, CFG_SYS_DDR_SDRAM_BASE, CFG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, 0, 8, BOOKE_PAGESZ_1G, 1), #endif -#ifdef CONFIG_SYS_INIT_L2_ADDR +#ifdef CFG_SYS_INIT_L2_ADDR /* *I*G - L2SRAM */ - SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + SET_TLB_ENTRY(1, CFG_SYS_INIT_L2_ADDR, CFG_SYS_INIT_L2_ADDR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, 0, 11, BOOKE_PAGESZ_256K, 1) #endif |