4 files changed, 45 insertions, 11 deletions
diff --git a/board/kontron/sl28/Makefile b/board/kontron/sl28/Makefile
index 5d220f07447..147ef9872b8 100644
--- a/board/kontron/sl28/Makefile
+++ b/board/kontron/sl28/Makefile
@@ -4,7 +4,7 @@ ifndef CONFIG_SPL_BUILD
 obj-y += sl28.o cmds.o
 endif
 
-obj-y += common.o ddr.o
+obj-y += ddr.o
 
 ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
diff --git a/board/kontron/sl28/common.c b/board/kontron/sl28/common.c
deleted file mode 100644
index 14704f70514..00000000000
--- a/board/kontron/sl28/common.c
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-
-#include <common.h>
-#include <asm/arch-fsl-layerscape/soc.h>
-
-int board_early_init_f(void)
-{
-	fsl_lsch3_early_init_f();
-	return 0;
-}
diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c
index d0372accaf3..c8ed7ac81ab 100644
--- a/board/kontron/sl28/sl28.c
+++ b/board/kontron/sl28/sl28.c
@@ -20,6 +20,12 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_early_init_f(void)
+{
+	fsl_lsch3_early_init_f();
+	return 0;
+}
+
 int board_init(void)
 {
 	if (CONFIG_IS_ENABLED(FSL_CAAM))
diff --git a/board/kontron/sl28/spl.c b/board/kontron/sl28/spl.c
index fa5829eee0b..0e6ad5f37e1 100644
--- a/board/kontron/sl28/spl.c
+++ b/board/kontron/sl28/spl.c
@@ -3,10 +3,36 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/spl.h>
+#include <asm/arch-fsl-layerscape/fsl_serdes.h>
+#include <asm/arch-fsl-layerscape/soc.h>
 
 #define DCFG_RCWSR25 0x160
 #define GPINFO_HW_VARIANT_MASK 0xff
 
+#define SERDES_LNDGCR0		0x1ea08c0
+#define   LNDGCR0_PROTS_MASK	GENMASK(11, 7)
+#define   LNDGCR0_PROTS_SATA	(0x2 << 7)
+#define SERDES_LNDGCR1		0x1ea08c4
+#define   LNDGCR1_RDAT_INV	BIT(31)
+
+/*
+ * On this board the SMARC PCIe lane D might be switched to SATA mode. This
+ * makes sense if this lane is connected to a Mini PCI slot and a mSATA card
+ * is plugged in. In this case, the RX pair is swapped and we need to invert
+ * the received data.
+ */
+static void fixup_sata_rx_polarity(void)
+{
+	u32 prot = in_le32(SERDES_LNDGCR0) & LNDGCR0_PROTS_MASK;
+	u32 tmp;
+
+	if (prot == LNDGCR0_PROTS_SATA) {
+		tmp = in_le32(SERDES_LNDGCR1);
+		tmp |= LNDGCR1_RDAT_INV;
+		out_le32(SERDES_LNDGCR1, tmp);
+	}
+}
+
 int sl28_variant(void)
 {
 	return in_le32(DCFG_BASE + DCFG_RCWSR25) & GPINFO_HW_VARIANT_MASK;
@@ -17,6 +43,10 @@ int board_fit_config_name_match(const char *name)
 	int variant = sl28_variant();
 
 	switch (variant) {
+	case 1:
+		return strcmp(name, "fsl-ls1028a-kontron-sl28-var1");
+	case 2:
+		return strcmp(name, "fsl-ls1028a-kontron-sl28-var2");
 	case 3:
 		return strcmp(name, "fsl-ls1028a-kontron-sl28-var3");
 	case 4:
@@ -30,3 +60,11 @@ void board_boot_order(u32 *spl_boot_list)
 {
 	spl_boot_list[0] = BOOT_DEVICE_SPI;
 }
+
+int board_early_init_f(void)
+{
+	fixup_sata_rx_polarity();
+	fsl_lsch3_early_init_f();
+
+	return 0;
+}