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Diffstat (limited to 'include/configs/M5272C3.h')
-rw-r--r--include/configs/M5272C3.h48
1 files changed, 24 insertions, 24 deletions
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 7c3bc032bfe..847b4c2593d 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -17,7 +17,7 @@
* (easy to change)
*/
-#define CONFIG_SYS_UART_PORT (0)
+#define CFG_SYS_UART_PORT (0)
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
@@ -51,22 +51,22 @@
"save\0" \
""
-#define CONFIG_SYS_CLK 66000000
+#define CFG_SYS_CLK 66000000
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
-#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
-#define CONFIG_SYS_SCR 0x0003
-#define CONFIG_SYS_SPR 0xffff
+#define CFG_SYS_MBAR 0x10000000 /* Register Base Addrs */
+#define CFG_SYS_SCR 0x0003
+#define CFG_SYS_SPR 0xffff
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
-#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
+#define CFG_SYS_INIT_RAM_ADDR 0x20000000
+#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
@@ -75,35 +75,35 @@
*/
#define CFG_SYS_SDRAM_BASE 0x00000000
#define CFG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */
-#define CONFIG_SYS_FLASH_BASE 0xffe00000
+#define CFG_SYS_FLASH_BASE 0xffe00000
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
+#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
/*
* FLASH organization
*/
#ifdef CONFIG_SYS_FLASH_CFI
-# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
+# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
#endif
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
-#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
+#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
+ CFG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
+ CFG_SYS_INIT_RAM_SIZE - 4)
+#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
+#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
+#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
CF_CACR_DISD | CF_CACR_INVI | \
CF_CACR_CEIB | CF_CACR_DCM | \
CF_CACR_EUSP)
@@ -111,11 +111,11 @@
/*-----------------------------------------------------------------------
* Port configuration
*/
-#define CONFIG_SYS_PACNT 0x00000000
-#define CONFIG_SYS_PADDR 0x0000
-#define CONFIG_SYS_PADAT 0x0000
-#define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */
-#define CONFIG_SYS_PBDDR 0x0000
-#define CONFIG_SYS_PBDAT 0x0000
-#define CONFIG_SYS_PDCNT 0x00000000
+#define CFG_SYS_PACNT 0x00000000
+#define CFG_SYS_PADDR 0x0000
+#define CFG_SYS_PADAT 0x0000
+#define CFG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */
+#define CFG_SYS_PBDDR 0x0000
+#define CFG_SYS_PBDAT 0x0000
+#define CFG_SYS_PDCNT 0x00000000
#endif /* _M5272C3_H */