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* Merge git://git.denx.de/u-boot-marvellTom Rini2021-02-089-68/+202
|\ | | | | | | | | | | | | | | | | - Espressobin: Set default env values at runtime (Pali) - Espressobin: Set the maximum slave SPI speed to 40MHz (Pali) - theadorable: PCIe test code enhancement and early deemphasis enabling (Stefan) - pci_mvebu: Disable config access to PCI host bridge ports (Stefan) - mv_sdhci: parse device-tree entry (Baruch)
| * mmc: mv_sdhci: parse device-tree entryBaruch Siach2021-02-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Call mmc_of_parse() so that generic DT properties like 'non-removable' are taken into account. This fixes boot on Clearfog with eMMC on SOM that requires the non-removable property. Reported-by: Thorsten Spille <thorsten_spille@netcor.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
| * arm: mvebu: Espressobin: Set the maximum slave SPI speed to 40MHzKonstantin Porotchkin2021-02-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the SPI controller speed is defined by DTS, the maximum slave speed (connected devices) is limited by the pre-defined configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz This patch increases this maximum SPI slave device speed to 40MHz Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/59516 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> [pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig] Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * cmd: mvebu/bubt: Fix default options in helpPali Rohár2021-02-081-3/+3
| | | | | | | | | | | | | | Default options depends on compile time defines. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: theadorable: Set deephasis bit in PCIe configs very earlyStefan Roese2021-02-081-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | Testing has shown, that the quality of the PCIe signals and also the stability of correct link establishment on the 2 PCIe ports is better, when the deemphasis bit is set in the PCIe config register. This needs to be done very early, even before the SERDES setup code is run. This way, the first link will already be established with this setup. Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: theadorable: Enhance "pcie" test cmd to check link width/speedStefan Roese2021-02-081-21/+87
| | | | | | | | | | | | | | | | | | | | | | This patch changes the board specific "pcie" U-Boot command to not only check for PCIe device existance but also for the correct link speed and width that has been established. This cmd can be used by U-Boot scripts for automated testing, if the PCIe setup is correct. Meaning, that all PCIe devices are correctly detected and the link speed and width is corrent. Signed-off-by: Stefan Roese <sr@denx.de>
| * pci: pci_mvebu: Disable config access to PCI host bridge portsStefan Roese2021-02-081-39/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the PCI config routines in the Armada XP / 38x driver to not allow access to the PCIe root ports. While updating the Armada XP based theadorable to the latest mainline and testing it with the DM PCI driver I noticed, that the PCI root bridge was being configured incorrectly. Resulting in the PCIe Intel WiFi was not working correctly in Linux. With this patch applied, all PCIe devices work without any issues in Linux again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Behún <marek.behun@nic.cz> Cc: Phil Sutter <phil@nwl.cc> Cc: Mario Six <mario.six@gdsys.cc>
| * arm: mvebu: Espressobin: Set default value for $ethNaddr env variablePali Rohár2021-02-082-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Espressobin board are MAC addresses stored in U-Boot env area. Therefore they are not present in default_environment[] array constructed at compile time. This change puts permanent MAC addresses into default_environment[] array at board runtime. Espressobin board has enabled DEFAULT_ENV_IS_RW option and therefore can modify this array. This change ensure that 'env default -a' does not delete permanent MAC addresses from Espressobin env storage area. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Andre Heider <a.heider@gmail.com>
| * arm: mvebu: Espressobin: Set default value for $fdtfile env variablePali Rohár2021-02-082-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | On Espressobin board value for $fdtfile cannot be determined at compile time and is calculated at board runtime code. This change uses a new option DEFAULT_ENV_IS_RW to allow modifying default_environment[] array at runtime and set into it correct value. This change also ensure that 'env default -a' set correct value to $fdtfile. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Andre Heider <a.heider@gmail.com>
| * env: Allow to set default_environment[] from board code via compile option ↵Pali Rohár2021-02-082-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DEFAULT_ENV_IS_RW This change allows board code to modify default_environment[] array when compile option DEFAULT_ENV_IS_RW is specified in board config file. Some board default variables depend on runtime configuration which is not known at compile time. Therefore allow to set default_environment[] array as non-const and allow board code to modify it when it is needed. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Andre Heider <a.heider@gmail.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2021-02-08183-192/+3894
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Layerscape: Enable gpio Bug fixes & updates related to dspi, qspi, pciep, SVR mask, stream-id, env variables, mdio for LAyerscape Platforms Add SATA, network variant 1, 2 support on sl28 powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile Bug fixes and updates for keymile, Kontron
| * | configs: lx2160aqds: enable CMD_GPIOBiwen Li2021-02-082-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board lx2160aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: lx2160ardb: enable CMD_GPIOBiwen Li2021-02-083-0/+3
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board lx2160ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1088ardb: enable DM_GPIO and CMD_GPIOBiwen Li2021-02-086-0/+10
| | | | | | | | | | | | | | | | | | | | | Enable DM_GPIO and CMD_GPIO for board ls1088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1088aqds: enable DM_GPIO and CMD_GPIOBiwen Li2021-02-086-0/+11
| | | | | | | | | | | | | | | | | | | | | Enable DM_GPIO and CMD_GPIO for board ls1088aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls2088aqds: enable CMD_GPIOBiwen Li2021-02-081-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls2088aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls2088ardb: enable DM_GPIO and CMD_GPIOBiwen Li2021-02-084-0/+6
| | | | | | | | | | | | | | | | | | | | | Enable DM_GPIO and CMD_GPIO for board ls2088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1046aqds: enable CMD_GPIOBiwen Li2021-02-089-0/+9
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1046aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1046ardb: enable CMD_GPIOBiwen Li2021-02-088-0/+8
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1046ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1043ardb: enable CMD_GPIOBiwen Li2021-02-088-0/+8
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1043ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1043aqds: enable CMD_GPIOBiwen Li2021-02-089-0/+9
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1043aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1028ardb: enable CMD_GPIOBiwen Li2021-02-082-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1028ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1028aqds: enable CMD_GPIOBiwen Li2021-02-083-0/+3
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1028aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021atwr: enable CMD_GPIOBiwen Li2021-02-087-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021aqds: enable CMD_GPIOBiwen Li2021-02-089-0/+9
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1012ardb: enable CMD_GPIOBiwen Li2021-02-084-0/+4
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for ls1012ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1012afrwy: enable CMD_GPIOBiwen Li2021-02-084-0/+4
| | | | | | | | | | | | | | | | | | | | | Enable CMD_GPIO for ls1012afrwy Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1046a: enable MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable MPC8XXX_GPIO for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: lx2160a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls208xa: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1088a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1028a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1043a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: ls1012a: enable CONFIG_MPC8XXX_GPIOBiwen Li2021-02-081-0/+7
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls208xa: add gpio nodeBiwen Li2021-02-081-1/+45
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS208xA Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls1088a: add gpio nodeBiwen Li2021-02-081-1/+46
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1088A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls1046a: add gpio nodeBiwen Li2021-02-081-0/+40
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1046A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls1043a: add gpio nodeBiwen Li2021-02-081-0/+40
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1043A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls1028a: add gpio nodeBiwen Li2021-02-081-0/+33
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1028A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: dts: ls1012a: add gpio nodeBiwen Li2021-02-081-0/+20
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1012A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm: dts: ls1021a: add gpio nodeBiwen Li2021-02-081-0/+40
| | | | | | | | | | | | | | | | | | | | | Add gpio node for SoC LS1021A Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | gpio: mpc8xxx_gpio: Fix for litte endianBiwen Li2021-02-084-39/+47
| | | | | | | | | | | | | | | | | | | | | Update gpio driver to use same logic for big-endian and little-endian Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: T1042: Drop the CONFIG_VIDEOHou Zhiqiang2021-02-0810-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop the CONFIG_VIDEO to fix the following build warning. ===================== WARNING ====================== This board does not use CONFIG_DM_VIDEO Please update the board to use CONFIG_DM_VIDEO before the v2019.07 release. UPD include/generated/dt.h Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. UPD include/generated/timestamp_autogenerated.h ==================================================== Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | mpc8xxx: fsl_pamu: Update data type in config_pamuPriyanka Jain2021-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update data type of '1' to '1ull' in below assignment size = 1ull << sizebit; to fix incorrect assignment issue. e.g: when sizebit was 31, 0x80000000 got sign extended to 0xffffffff_80000000 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reported-by: Dean Saridakis <dean.saridakis@baesystems.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | armv7: ls102xa: Enable I-Cache to speed up the boot timeHou Zhiqiang2021-02-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the I-Cache to speed up the boot time, especailly for the NOR boot, currently it takes about 15 seconds from power up to the U-Boot prompt, and with the I-Cache enabled it only takes around 2.5 seconds. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/km: move km i2c deblock declarations to a km/common.hAleksandar Gerasimovski2021-02-083-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup, move the declarations to keymile/common.h instead declaring them per-board config.h Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | pci: kconfig: layerscape: Change LX2162A PCIe node compatible stringHou Zhiqiang2021-02-081-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LX2162A is not like LX2160A which has different PCIe controller in rev1 and rev2 silicon. It supports only one configuration of PCIe controller, which is same as LS2088A. So update PCIe compatible string same as LS2088A. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Tested-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | pci: layerscape: Remove the shadow SVR definitionsHou Zhiqiang2021-02-084-42/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the SVR definitions to a new svr.h for Layerscape armv7 and armv8 platforms respectively, so that the PCIe driver can reuse them. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit (git 2.34.1) at 2025-02-27 16:02:03 +0000