aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-05-2638-122/+657
|\
| * armv8: LS2080A: Adjust memory map for secure boot headers for NOR-bootUdit Agarwal2017-05-234-10/+12
| | | | | | | | | | | | | | | | | | This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-bootSantan Kumar2017-05-236-15/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046AAlison Wang2017-05-234-20/+20
| | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043AAlison Wang2017-05-234-19/+19
| | | | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1021a: Adjust memory mapping for Flash/SD card on LS1021AQDS/TWRAlison Wang2017-05-232-10/+10
| | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add LS2081ARDB board supportPriyanka Jain2017-05-2311-4/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC supportPriyanka Jain2017-05-237-5/+33
| | | | | | | | | | | | | | | | | | | | | | The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add QSPI-boot supportPriyanka Jain2017-05-239-11/+195
| | | | | | | | | | | | | | | | | | | | QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls2080ardb: Update QIXIS codePriyanka Jain2017-05-231-4/+17
| | | | | | | | | | | | | | | | | | Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS flag is enabled. In case QIXIS code is not enabled, use default sysclk value as 100MHz per board documentation. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() pathYogesh Gaur2017-05-231-7/+13
| | | | | | | | | | | | | | | | | | | | | | Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043ardb: Make NET independent of FManYork Sun2017-05-232-6/+9
| | | | | | | | | | | | | | | | This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
| * armv8: ls1046ardb: Make NET independent of FManYork Sun2017-05-232-7/+10
| | | | | | | | | | | | | | | | This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
| * armv8: ls1012a: fix the size of flash for multiple boardsSuresh Gupta2017-05-231-1/+1
| | | | | | | | | | | | | | LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
| * armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platformsSuresh Gupta2017-05-233-3/+0
| | | | | | | | | | | | | | | | ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls2080ardb: Enable SD interface for RevF boardPriyanka Jain2017-05-232-0/+22
| | | | | | | | | | | | | | | | | | | | LS2080ARDB/LS2088ARDB RevF board has smart voltage translator which needs to be programmed to enable high speed SD interface by setting GPIO4_10 output to zero. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: enable PCI command toolHou Zhiqiang2017-05-231-0/+10
| | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-2610-61/+251
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
| * | nds32: eth: Support ftmac100 DM.rick2017-05-2310-61/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2017-05-2326-803/+8307
|\ \ \ | |/ / |/| |
| * | ARM: rmobile: Move address of IICDVFS(I2C) to rcar-gen3-base.hNobuhiro Iwamatsu2017-05-222-3/+3
| | | | | | | | | | | | | | | | | | | | | The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3. This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add R8A7796 supportMarek Vasut2017-05-223-2/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add minor ifdeffery and default board config for the Salvator-XS board with R8A7796 M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Rename the defconfig to match the SoCMarek Vasut2017-05-222-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the salvator-x_defconfig to r8a7795_salvator-x_defconfig in preparation for the r8a7796 support on salvator-x board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Enable SCIF2 clockMarek Vasut2017-05-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are two UARTs on the board, so enable the clock for the second one as well. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Count all DRAM in all slotsMarek Vasut2017-05-221-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of counting only the DRAM in the first slot, count all the DRAM in all slots and report it accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add USB supportMarek Vasut2017-05-223-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the EHCI USB. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add DVFS and PMIC supportMarek Vasut2017-05-222-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC, but keep the CPU reboot option as a fallback. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add RAVB ethernet supportMarek Vasut2017-05-223-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the AVB ethernet on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add SD supportMarek Vasut2017-05-223-5/+102
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the SD card slots on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Adjust UART clockMarek Vasut2017-05-223-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Zap redefined DECLARE_GLOBAL_DATA_PTRMarek Vasut2017-05-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The macro is used twice in the salvator-x board file, drop one. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Set default device treeMarek Vasut2017-05-222-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Set default device tree file in the salvator-x_defconfig and use it in the environment. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Move OF_LIBFDT and CMD_FDT to board configMarek Vasut2017-05-222-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Move these two Kconfig symbols to the salvator-x_defconfig. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Use BIT() macro in board fileMarek Vasut2017-05-221-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Cosmetic change, replace (1 << (n)) with BIT(n) . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Allow R8A7796 Salvator-X configurationMarek Vasut2017-05-222-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Salvator-X can have both H3 and M3 CPU on it, drop the select R8A7795 to allow both configurations. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7796 supportMarek Vasut2017-05-226-5/+101
| | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig entry for the R8A7796 RCar M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Handle R8A7796 r1.1 in the PRR codeMarek Vasut2017-05-221-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | The R8A7796 r1.1 reports itself as r2.0 , add quirk into the PRR code to fix this report. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7796 into the CPU tableMarek Vasut2017-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add entry for the R8A7796 RCar M3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Add R8A7795 into the CPU tableMarek Vasut2017-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add entry for the R8A7795 RCar H3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Make the Gen3 SoC configurableMarek Vasut2017-05-221-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allow selecting the Gen3 SoC in preparation for RCar M3 . No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Update link address to match latest BL2Marek Vasut2017-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update the CONFIG_SYS_TEXT_BASE to match BL2 Rev.1.0.9 and newer, which loads the U-Boot to 0x50000000 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOTMarek Vasut2017-05-221-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | This Kconfig option is not used on any board, so drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Import R8A7796 PFC and GPIO tablesMarek Vasut2017-05-223-0/+6340
| | | | | | | | | | | | | | | | | | | | | | | | | | | Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release from Renesas . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: Update R8A7795 PFC and GPIO tablesMarek Vasut2017-05-222-750/+897
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sync the PFC and GPIO tables with the latest 3.5.3 release from Renesas . This adds ES2.0 support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | serial: sh: Add r8a7796 supportHiroyuki Yokoyama2017-05-221-1/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | net: ravb: Add Renesas Ethernet RAVB driverMarek Vasut2017-05-223-0/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for the Renesas Ethernet AVB block found in RCar H3/M3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Based on work of: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Takeshi Kihara <takeshi.kihara.df@renesas.com> Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
| * | gpio: rcar_gen3: Fix GPIO read supportKouei Abe2017-05-221-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes to read the GPIO status after confirming the INOUT setting. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
* | | mksunxi_fit_atf.sh: Allow for this to complete when bl31.bin is missingTom Rini2017-05-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In situations like an autobuilder we are likely to not have bl31.bin present and thus would fail to build and propagate the error upwards. Instead, print a big warning to stderr so that human will see that something is wrong but complete the build. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Merge git://git.denx.de/u-boot-sunxiTom Rini2017-05-2218-225/+714
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't get Kconfig errors on platforms without SPL, ie sandbox (without SPL). Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | sunxi: Move maintainership for Pine64Andre Przywara2017-05-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After speaking to Hans at FOSDEM, he is fine with transferring the maintainership of the Pine64 boards over to me. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
generated by cgit (git 2.34.1) at 2025-02-27 09:22:06 +0000