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* configs: Resync with savedefconfigWIP/20Jun2022-nextTom Rini2022-06-20130-134/+87
| | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'u-boot-stm32-20220620' of ↵Tom Rini2022-06-2069-739/+2274
|\ | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm into next - Add STM32MP13 SoCs support with associated board STM32M135F-DK - Correct livetree support in stm32mp1 boards - Activate livetree for stm32mp15 DHSOM boards
| * stm32mp1: fix reference for STMicroelectronicsPatrick Delaunay2022-06-1717-19/+19
| | | | | | | | | | | | | | | | Replace reference to the correct name STMicroelectronics Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * configs: stm32mp: cleanup the stm32mp15 filePatrick Delaunay2022-06-171-11/+0
| | | | | | | | | | | | | | | | | | | | Remove STM32_SYSRAM_END and clean the comments in stm32mp15_common.h file after moving some CONFIG to Kconfig: CONFIG_SYS_CBSIZE, CONFIG_SPL_MAX_FOOTPRINT, CONFIG_SYS_SPL_MALLOC_START and CONFIG_SYS_SPL_MALLOC_SIZE. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * stm32mp: stpmic1: remove the debug unit request by debuggerPatrick Delaunay2022-06-173-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on backup register value, U-Boot SPL maintains the debug unit powered-on for debugging purpose; only BUCK1 is required for powering the debug unit, so revert the setting for all the other power lanes, except BUCK3 that has to be always on. To be functional this patch requires a modification in the debugger ,openocd for example, to update the STM32MP15 backup register when it is required to debug SPL after reset. After deeper analysis this behavior will be never supported in tools so the associated code, will be never used and the associated code can be removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * ARM: stm32: activate OF_LIVE for DHSOMPatrick Delaunay2022-06-172-0/+2
| | | | | | | | | | | | | | | | | | Activate the live DT with CONFIG_OF_LIVE to reduce the DT parsing time. Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * board: dhelectronics: stm32mp1: convert to livetreePatrick Delaunay2022-06-171-22/+16
| | | | | | | | | | | | | | | | | | Replace call to fdt_*() functions and access to gd->fdt_blob with call to ofnode_*() functions to support a live tree. Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * board: engicam: stm32mp1: convert to livetreePatrick Delaunay2022-06-171-4/+2
| | | | | | | | | | | | | | | | Replace gd->fdt_blob access with fdt_getprop() function to the function ofnode_get_property() to support a live tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * board: stm32mp1: convert to livetreePatrick Delaunay2022-06-171-9/+4
| | | | | | | | | | | | | | | | Replace gd->fdt_blob access with fdt_getprop() function to the function ofnode_get_property() to support a live tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * misc: stm32mp13: introduce STM32MP13 RCC driverPatrick Delaunay2022-06-171-0/+6
| | | | | | | | | | | | | | | | | | | | Add the MISC RCC driver for STM32MP13, and bind it to the RCC reset driver, required for initial support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Sean Anderson <seanga2@gmail.com> Change-Id: Ida11c15462caf140f87b1e3239efa2b8a689acb9
| * clk: Add directory for STM32 clock driversPatrick Delaunay2022-06-178-20/+34
| | | | | | | | | | | | | | | | | | | | | | | | Add a directory in drivers/clk to regroup the clock drivers for all STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or CONFIG_ARCH_STM32MP (MPUs with cortex A). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl> Acked-by: Sean Anderson <seanga2@gmail.com> Change-Id: I955af307963f732167396f0157a30cf2fc91f150
| * stm32mp: fdt: update etzpc for STM32MP13xPatrick Delaunay2022-06-171-2/+151
| | | | | | | | | | | | | | | | Add support of STM32MP13x the ETZPC part of fdt.c Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Change-Id: If2777fbf66b8525a2a447056780aaa04e6b0a9a0
| * stm32mp: fdt: update etzpc for STM32MP15xPatrick Delaunay2022-06-171-59/+70
| | | | | | | | | | | | | | | | | | Introduce STM32MP15 function and defines to prepare the STM32MP13 introduction. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Change-Id: I909b205e73dcf207e0216aae5905c3c52472020e
| * doc: st: stm32mp1: add STM32MP13x supportPatrick Delaunay2022-06-171-57/+126
| | | | | | | | | | | | | | | | Add in U-Boot documentation the quick instruction to setup the STMicroelectronics STM32MP13x boards. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * configs: add stm32mp13 defconfigPatrick Delaunay2022-06-172-0/+56
| | | | | | | | | | | | | | | | Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: dts: stm32mp: add stm32mp13 device tree for U-BootPatrick Delaunay2022-06-173-0/+124
| | | | | | | | | | | | | | | | Compile the device tree of STM32MP13x boards and add the needed U-Boot add-on. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * mmc: stm32_sdmmc2: make reset property optionalPatrick Delaunay2022-06-171-7/+7
| | | | | | | | | | | | | | | | | | | | | | Although not recommended, the reset property could be made optional. This way the driver will probe even if no reset property is provided in an sdmmc node in DT. This reset is already optional in Linux. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * ram: stm32mp1: add support of STM32MP13xPatrick Delaunay2022-06-172-20/+57
| | | | | | | | | | | | | | | | | | | | | | | | Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC: - only one AXI port - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2) The STM32MP15x SOC have 2 AXI ports and 32 bits support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * board: stm32pm1: add stm32mp13 board supportPatrick Delaunay2022-06-171-9/+9
| | | | | | | | | | | | | | | | | | | | | | Add stm32mp15x prefix to all STM32MP15x board specific functions, this patch is a preliminary step for STM32MP13x support. This patch also adds the RCC probe to avoid circular access with usbphyc probe as clk provider. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * pinctrl: stm32: add support of STM32MP135Patrick Delaunay2022-06-171-0/+1
| | | | | | | | | | | | | | Add support for "st,stm32mp135-pinctrl" for STM32MP13x Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: support 2 MAC address for STM32MP13Patrick Delaunay2022-06-174-15/+52
| | | | | | | | | | | | | | | | Add support of several MAC address in OTP (3 32bits OTP word for 2 MAC address) for SOCs in STM32MP13x family: STM32MP133 and STM32MP135. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: add support of STM32MP13xPatrick Delaunay2022-06-1716-6/+378
| | | | | | | | | | | | | | | | Introduce the code in mach-stm32mp and the configuration file stm32mp13_defconfig for the new STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: add CONFIG_STM32MP15_PWRPatrick Delaunay2022-06-172-1/+17
| | | | | | | | | | | | | | | | | | | | | | Add config CONFIG_STM32MP15_PWR to handle the access to regulators managed by the PWR driver defined in pwr_regulator.c This driver is only used in U-Boot by STM32MP15x family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: add sub config Kconfig.15xPatrick Delaunay2022-06-175-123/+125
| | | | | | | | | | | | | | | | | | Add sub Kconfig for each SOC in the STM32 CPU family. It is a preliminary step to introduce a new SOC in the STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: add choice for STM32MP SOC familyPatrick Delaunay2022-06-174-16/+19
| | | | | | | | | | | | | | | | | | | | Add mandatory choice for SOC support in ARCH_STM32MP. This patch is a preliminary step for new SOC introduction in STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: move code for STM32MP15xPatrick Delaunay2022-06-176-324/+377
| | | | | | | | | | | | | | | | Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c when low level init without TFABOOT is supported. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * arm: stm32mp: move the get_otp helper function in bsecPatrick Delaunay2022-06-173-17/+20
| | | | | | | | | | | | | | | | As the get_otp() helper function in bsec are common for all STM32MP family, move this function in bsec driver Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * configs: stm32mp1: move SUPPORT_SPL in STM32MP15xPatrick Delaunay2022-06-172-1/+1
| | | | | | | | | | | | | | | | | | | | The SPL is only supported by STM32MP15x not by all the SOC with STM32MP arch. Only TFABOOT is supported in next products. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * ARM: dts: stm32: add STM32MP13 SoCs supportPatrick Delaunay2022-06-178-0/+622
| | | | | | | | | | | | | | Add initial support of STM32MP13 family based on v5.18-rc2 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | Merge tag 'fsl-qoriq-2022-6-20-v2' of ↵Tom Rini2022-06-2034-104/+894
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next Layerscape: add sfp driver Kconfig cleanup sl28 board update support hdp firmware loading powerpc: dts update for p2020 p1_p2_rdb_pc board update fsl_esdhc fallback to 1-bit mode support
| * board: sl28: rename include guard macroMichael Walle2022-06-201-3/+3
| | | | | | | | | | | | Avoid name clashes with an include file on board level. Signed-off-by: Michael Walle <michael@walle.cc>
| * board: sl28: support 8 GiB memoryMichael Walle2022-06-201-1/+7
| | | | | | | | | | | | | | | | The board supports up to 8 GiB memory. The memory is soldered on the board but the configuration is equivalent to a dual chip select, dual rank DIMM module. Signed-off-by: Michael Walle <michael@walle.cc>
| * board: sl28: remove unneeded ddr config parameterMichael Walle2022-06-201-1/+0
| | | | | | | | | | | | | | config_2 doesn't need to be set to zero because that is already the default value. Signed-off-by: Michael Walle <michael@walle.cc>
| * board: sl28: set CPO valueMichael Walle2022-06-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | With a 8GiB memory board, it seems that the "very unlikely event" of a DDR initialization with non-optimal values are not really that unlikely. It happens in about every other reboot. As described in erratum A-009942, preset the DEBUG_28 register with an optimal value. The value iself depends on the memory configuration of the board, but the used value seems to work well for all variants. Signed-off-by: Michael Walle <michael@walle.cc>
| * armv8: layerscape: add missing RCW source definesMichael Walle2022-06-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | A board might need to get the source of the RCW word, which is also the boot source in most cases. These defines are taken from the LS1028A and I expect they are the same across the SoCs with the same chassis, after all, there was already a reset source for NOR flash. Signed-off-by: Michael Walle <michael@walle.cc>
| * powerpc: bootm: Fix sizes in memory adjusting warningPali Rohár2022-06-201-1/+2
| | | | | | | | | | | | Old size is stored in size variable and new size is in bootm_size variable. Signed-off-by: Pali Rohár <pali@kernel.org>
| * board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.hPali Rohár2022-06-202-32/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Code for changing boot source is platform generic and can be used by any P1* and P2* compatible RDB board. Not only by boards which use config header file p1_p2_rdb_pc.h. So move this code from p1_p2_rdb_pc.h to p1_p2_bootsrc.h and cleanup macros for generating boot source env variables in CONFIG_EXTRA_ENV_SETTINGS. This allows to use code for resetting board and rebooting to other boot source also by other boards in future. Signed-off-by: Pali Rohár <pali@kernel.org>
| * powerpc: dts: p2020: Define PMC nodePali Rohár2022-06-201-0/+5
| | | | | | | | | | | | Copy definition of PMC node from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár <pali@kernel.org>
| * mmc: fsl_esdhc: Add new config option for default fallback modePali Rohár2022-06-202-0/+6
| | | | | | | | | | | | | | | | | | | | Currently default fallback SDHC mode is 1-bit. Add new config option CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback mode. This is useful e.g. for SPL builds which loads other parts from SD card during boot process. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: fsl_esdhc: Set fallback mode to 1-bitPali Rohár2022-06-201-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 8-bit mode is not supported by SD cards and on P2020 are four SDHC pins shared with SPI (so if P2020 board have also SPI then only 4-bit SDHC mode is provided). So 8-bit SDHC mode is really bad default. When max bus width is not provided then set mode to 1-bit. This mode is supported by all cards, so it is the best option for fallback mode. Also P2020 bootrom sets mode to 1-bit when booting from SD/MMC card. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * ls1028a: hdp: Add config support for HDP firmware loadingAlison Wang2022-06-205-1/+14
| | | | | | | | | | | | | | | | | | This patch adds config support for HDP firmware loading on LS1028A. Signed-off-by: Oliver Brown <oliver.brown@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
| * powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUsPali Rohár2022-06-201-0/+3
| | | | | | | | | | | | This reduce usage of per-board custom settings. Signed-off-by: Pali Rohár <pali@kernel.org>
| * mtd: rawnand: fsl_elbc: Fix DM support in DTS code pathPali Rohár2022-06-201-4/+5
| | | | | | | | | | | | | | For proper DM support it is required to fill also mtd->dev member. Otherwise DM would not see nand device at all. Signed-off-by: Pali Rohár <pali@kernel.org>
| * powerpc: mmu: Fix FSL_BOOKE_MAS2() macroPali Rohár2022-06-201-1/+1
| | | | | | | | | | | | | | Effective page number mask for MAS2 register is stored in macro MAS2_EPN. Fixes: 2146cf56821c ("Reworked FSL Book-E TLB macros to be more readable") Signed-off-by: Pali Rohár <pali@kernel.org>
| * powerpc: fsl_law: Add definition for first PCIe target interfacePali Rohár2022-06-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | Header file asm/fsl_law.h already provides correct definition for second and third PCIe controller (LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3). But is missing definition for the first PCIe controller (LAW_TRGT_IF_PCIE_1). Note that existing definition for LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3 are slightly complicated, but are really correct for P2020 platform. Signed-off-by: Pali Rohár <pali@kernel.org>
| * board: freescale: p1_p2_rdb_pc: Implement board_reset()Pali Rohár2022-06-201-0/+6
| | | | | | | | | | | | Do board reset via CPLD's system reset register. Signed-off-by: Pali Rohár <pali@kernel.org>
| * board: freescale: p1_p2_rdb_pc: Enable TDM function only for P1010Pali Rohár2022-06-201-0/+2
| | | | | | | | | | | | | | TDM function is supported only on P1010. P2020 does not have PMUXCR_TDM_ENA register, so do not enable it. Signed-off-by: Pali Rohár <pali@kernel.org>
| * powerpc: mpc85xx: Fix compilation with CONFIG_WDTPali Rohár2022-06-201-0/+2
| | | | | | | | | | | | | | | | When CONFIG_WDT is enabled then non-DM watchdog code cannot be used due to conflicting functions like watchdog_reset(). So disable compilation of mpc85xx watchdog_reset() function when CONFIG_WDT is enabled. Signed-off-by: Pali Rohár <pali@kernel.org>
| * powerpc: dts: p2020: Define ecm, memory and guts nodesPali Rohár2022-06-201-0/+24
| | | | | | | | | | | | Copy definition of these nodes from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár <pali@kernel.org>
| * powerpc: dts: p2020: Define DMA nodesPali Rohár2022-06-203-0/+135
| | | | | | | | | | | | Copy definition of DMA nodes from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár <pali@kernel.org>
generated by cgit (git 2.34.1) at 2025-02-27 08:20:48 +0000