aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh ↵WIP/20Mar2023-nextTom Rini2023-03-2018-296/+340
|\ | | | | | | into next
| * serial: sh: Make indent consistentMarek Vasut2023-03-181-4/+4
| | | | | | | | | | | | | | Make the indent of these macro elements consistent with the rest of this table. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * serial: sh: Add DEBUG_UART supportMarek Vasut2023-03-182-25/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for debug output very early during boot using the DEBUG_UART mechanism. This uses a static fixed UART port configuration selected via Kconfig options and dedicated print functions from debug_uart.h. This is useful e.g. when debugging problems so early during boot, that not even the DM is initialized at that point, and thus DM_SERIAL is not available either. This functionality is disabled by default. To activate it, define the following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/ CFG_HSCIF/<nothing for regular SCIF>: CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_SCIF=y CONFIG_DEBUG_UART_BASE=0xe6540000 CONFIG_DEBUG_UART_CLOCK=24000000 The later two options define the SCIF physical base address and SCIF input clock in Hz. Optionally, to validate DEBUG_UART works, enable the following as well to get early serial output message by default: CONFIG_DEBUG_UART_ANNOUNCE=y Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * serial: sh: Rename CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK to CFG_ variantsMarek Vasut2023-03-181-2/+2
| | | | | | | | | | | | | | | | | | | | Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a matching Kconfig entry because they are internal to the SCIF driver. Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI, to reflect that and avoid interferring with Kconfig symbols. Since neither of those options are defined elsewhere, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * pinctrl: renesas: Replace ifdeffery with IS_ENABLED()Marek Vasut2023-03-181-3/+3
| | | | | | | | | | | | | | | | | | Switch ifdef in sh_gpio_get_value() to IS_ENABLED() macro. The CONFIG_RCAR_GEN3 will never have SPL counterpart, so the IS_ENABLED() macro is the right one here. No functional change, except for improved build test coverage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * net: ravb: Support fixed PHY in R-CarMikhail Lappo2023-03-181-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling old U-Boot API doesn't allow to use fixed PHY. Searching by mask is the part of new function, after scanning FDT for a fixed PHY definition Fixes: e821a7bdb13 ("net: ravb: Detect PHY correctly") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Mikhail Lappo <mikhail.lappo@esrlabs.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> [Hai Pham: Drop phy_connect_dev since it's called in phy_connect] Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Use mask -1 instead of 0 to reinstate the search behavior over all PHY addresses. Add Fixes tag, sort the tag list.]
| * i2c: rcar_i2c: Sort Kconfig depends list ascendingMarek Vasut2023-03-181-1/+1
| | | | | | | | | | | | | | | | Sort the list of "depends" symbols in ascending order. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * i2c: rcar_iic: Sort Kconfig depends list ascendingMarek Vasut2023-03-181-1/+1
| | | | | | | | | | | | | | | | Sort the list of "depends" symbols in ascending order. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE cachingMarek Vasut2023-03-182-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not cache the single CPG MODE register bit 12, instead cache the entire register value, and only pick the matching bit from the cached value when core clock of type MDSEL or PE are used. Both MDSEL and PE clock type currently define .offset field as 12 on Gen3, which means this code will use bit 12 on Gen3 again, however there are additional clock on Gen4 which use different bits, and having this flexibility in place now will be useful when adding Gen4. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: rmobile: Split R-Car Gen3 into separate Kconfig from common 64bit optionsMarek Vasut2023-03-182-201/+206
| | | | | | | | | | | | | | | | | | There are multiple shared Kconfig options between R-Car Gen3 and Gen4. Keep the common options in Kconfig.64 and move the R-Car Gen3 specific options into separate Kconfig.rcar3 . The Kconfig.rcar3 contains SoC and board list, which is limited to R-Car Gen3. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: rmobile: Introduce CONFIG_RCAR_64 symbolMarek Vasut2023-03-181-12/+17
| | | | | | | | | | | | | | | | Introduce common Kconfig symbol for 64bit R-Car platforms and move common configuration options into it. This is preparatory patch to prevent duplication of Kconfig lists later on, when Gen4 is added. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: rmobile: Factor out SYS_SOC Kconfig optionMarek Vasut2023-03-184-9/+3
| | | | | | | | | | | | | | | | Pull the SYS_SOC Kconfig option to avoid duplication of this option in Kconfig.{32,64,rza1} . The default value is the same, so just set it in one location. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: rmobile: Sort R-Car Gen3 Kconfig listsMarek Vasut2023-03-182-16/+16
| | | | | | | | | | | | | | Sort the 'imply' and 'select' lists in R-Car Gen3 Kconfig options. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: rmobile: Convert ifdef in rmobile_get_prr() to IS_ENABLED()Marek Vasut2023-03-181-4/+3
| | | | | | | | | | | | | | | | | | Switch ifdef in rmobile_get_prr() to IS_ENABLED() macro. The CONFIG_RCAR_GEN3 will never have SPL counterpart, so the IS_ENABLED() macro is the right one here. No functional change, except for improved build test coverage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: renesas: falcon: Enable RWDT reset for V3U FalconHai Pham2023-03-181-5/+11
| | | | | | | | | | | | | | | | | | Enable RWDT reset on Reset Controller so that it can be used as reset trigger source for V3U Falcon. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use one current_el() in board_init
| * ARM: renesas: falcon: Initialize ARM generic timer and GICv3 if EL3Hai Pham2023-03-181-2/+5
| | | | | | | | | | | | | | | | | | | | | | U-Boot executes at EL3 is required to initalize those settings. In other cases, they will be done by prior-stage firmware instead. This fixes crash when U-Boot is at non-secure exception level. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: renesas: Enable DTO support by default on R-Car Gen3Marek Vasut2023-03-181-0/+3
| | | | | | | | | | | | | | | | All R-Car Gen3 defconfigs present in U-Boot do enable DTO support, enable it for all of R-Car Gen3 by default in Kconfig instead, so that no new boards would miss this functionality. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: renesas: Demote overlap memory nodes message to debug on Gen3Hai Pham2023-03-181-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car DTs might contains multiple /memory@* nodes from various sources, i.e. prior firmware, u-boot itself or the OS The duplicates are likely to happen so the messages are not meaningful in the default setting since we have already handled that. Reduce the message to debug level. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * ARM: renesas: Remove defines for USB on Eagle/CondorHai Pham2023-03-182-12/+0
| | | | | | | | | | | | | | | | | | | | | | The Eagle board based on R-Car V3M, which does not support any USB interfaces. The same applies for the Condor board based on R-Car V3H. Remove the defines. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* | Merge branch '2023-03-17-improve-read-command-add-write-command' into nextTom Rini2023-03-2010-31/+195
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To quote the author: The first patch simplies do_read somewhat by making use of an existing helper instead of parsing the dev_part string manually. As a bonus (and my actual motivation), it now understands dev#partname syntax - hard-coded partition numbers are so last decade. I also need the symmetrical operation, being able to write to a named raw partition, and fortunately it doesn't require that many lines of code to implement that. There's a very minor change in the error reporting due to using cmdtp->name to generate the new messages, but I don't think "Error reading blocks" offers much that "read error" doesn't. New in v2: the last three patches add documentation, ensure CMD_WRITE is set for sandbox and adds some basic test cases for the various ways of accessing the partitions (by number, name, or as raw offset within the whole disk). v3: Add Simon's R-b to patches 2, 4, 5, fixup whitespace in patch 5. I don't want to duplicate the documentation, but I can see the value in 'write' having its own entry in the TOC, so I added a stub write.rst that just refers to the read.rst, which then explicitly documents both.
| * test: add tests of 'read' and 'write' shell commandsRasmus Villemoes2023-03-172-0/+105
| | | | | | | | | | Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * sandbox: enable CMD_WRITERasmus Villemoes2023-03-172-0/+2
| | | | | | | | | | Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * doc: document read/write commandsRasmus Villemoes2023-03-173-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | The read and write commands are, deliberately, implemented in the same file, so that they stay feature-compatible (e.g. if someone implements support for "read the full partition, however large that is", that same syntax should also work for write). In order to ensure the documentation for both are similarly kept in sync, and to avoid duplication, document them both in read.rst, and add a stub write.rst referring to read.rst. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
| * cmd: introduce 'write' commandRasmus Villemoes2023-03-173-7/+28
| | | | | | | | | | | | | | | | | | | | It's almost no extra code to hook up a buddy to the 'read' command. In fact, since the command is passed its own 'struct cmd_tbl', we can use the exact same callback, and let it figure out for itself whether it was invoked as "read" or "write". Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * cmd: read: use part_get_info_by_dev_and_name_or_num() instead of open-coded ↵Rasmus Villemoes2023-03-171-24/+8
|/ | | | | | | | | | | | | | dev_part parsing Use the helper part_get_info_by_dev_and_name_or_num() for parsing a dev[:part] string and obtaining the partition info in one go, instead of open-coding all that. As a bonus, this will automatically allow using the dev#partname syntax as well, for accessing raw partitions by name. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
* Merge tag 'xilinx-for-v2023.07-rc1' of ↵WIP/16Mar2023-nextTom Rini2023-03-1632-155/+175
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2023.07-rc1 cmd: - Print results in hex instead of dec in smc command firmware: - Cover missing ZYNQMP_FIRMWARE dependencies fpga: - fix loads for unencrypted use case relocation - Add support for BE systems spi: - Fix xilinx_spi init reset sequence arasan nand: - Remove hardcoded bbt option - Set ofnode value xilinx: - Enable SMC command - Fix some sparse issues zynqmp: - Remove cdns,zynq-gem compatible string - Add optee node - Some DT cleanups zynq: - Some DT cleanups microblaze - Remove MANUAL_RELOC option
| * microblaze: drop remnants of manual relocOvidiu Panait2023-03-133-34/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Runtime relocation has been made the default for microblaze, so do the following cleanups: - drop all manual reloc codepaths in start.S - drop all STATIC_RELA ifdefs, as it is now enabled unconditionally in Kconfig Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * microblaze: drop CONFIG_NEEDS_MANUAL_RELOCOvidiu Panait2023-03-131-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze and m68k are the only remaining architectures that still enable CONFIG_NEEDS_MANUAL_RELOC by default. Microblaze has had runtime relocation support using CONFIG_STATIC_RELA for quite some time, since commit d58c007498 ("microblaze: Add support for run time relocation"). Drop support for CONFIG_NEEDS_MANUAL_RELOC and make runtime relocation the default, as the rest of the architectures do. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-4-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * tools: relocate-rela: add support for handling 32-bit big endian filesOvidiu Panait2023-03-131-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, a microblaze build with CONFIG_SYS_BIG_ENDIAN=y and CONFIG_STATIC_RELA=y fails with: tools/relocate-rela: Not supported machine type ELF decoding failed make[2]: *** [u-boot/Makefile:1306: u-boot-nodtb.bin] Error 1 To fix this, convert the 32-bit codepath to use the previously added elf{16,32}_to_cpu() functions. The aarch64 codepath is left untouched. This commit ensures that CI doesn't fail for the next patches which enable runtime relocation by default for microblaze. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-3-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * tools: relocate-rela: introduce elf16_to_cpu() and elf32_to_cpu()Ovidiu Panait2023-03-131-0/+20
| | | | | | | | | | | | | | | | | | | | Add elf16_to_cpu() and elf32_to_cpu() functions that allow to read data in both big-endian and little-endian formats. Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-2-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * tools: relocate-rela: adjust le64_to_cpu -> le32_to_cpu in decode_elf32()Ovidiu Panait2023-03-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | The sh_addr/sh_offset/sh_size fields in Elf32_Shdr are 32-bits wide, so use le32_to_cpu() instead of the 64-bit variant. Fixes: 5e0e1a86d327 ("tools: relocate-rela: Fix ELF decoding on big-endian hosts") Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20230311173838.521804-1-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * spl: Add missing prototype for board_boot_orderAlgapally Santosh Sagar2023-03-091-0/+1
| | | | | | | | | | | | | | | | | | | | Add missing prototype to fix the sparse warning, warning: no previous prototype for 'board_boot_order' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230301103334.1455-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * xilinx: zynqmp: Add missing prototype for zynqmp_mmio_writeAlgapally Santosh Sagar2023-03-094-11/+8
| | | | | | | | | | | | | | | | | | | | Add missing prototype to fix the sparse warning, warning: no previous prototype for 'zynqmp_mmio_write' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230301103334.1455-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by defaultAshok Reddy Soma2023-03-092-0/+4
| | | | | | | | | | | | | | | | | | By default enable nand-on-flash-bbt DT flag, so that driver always refers to the bad block table(bbt) present on the flash device. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-5-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: dts: zynqmp: Fix nand dt nodeAshok Reddy Soma2023-03-091-47/+70
| | | | | | | | | | | | | | | | | | | | DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * mtd: nand: arasan: Set ofnode valueAshok Reddy Soma2023-03-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | Ofnode value is not set, so all the DT properties are not being read and due to this default values are being used. Find nand node and set chip->flash_node value. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * mtd: nand: arasan: Remove hardcoded bbt optionAshok Reddy Soma2023-03-091-1/+0
| | | | | | | | | | | | | | | | | | | | Bad block table option is hardcoded to read from flash with NAND_BBT_USE_FLASH option. This decision should be done based on DT property. Remove this hardcoding, to be able to use DT property. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230224050709.30014-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * spi: xilinx_spi: Fix spi resetJiajie Chen2023-03-091-3/+2
| | | | | | | | | | | | | | | | | | It was incorrectly using an old priv->regs pointer, which was initialized to zero. SPI resets won't happen on first call. Signed-off-by: Jiajie Chen <c@jia.je> Link: https://lore.kernel.org/r/20230227150938.211820-1-c@jia.je Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: zynqmp: Remove comment about gem spec in kv260Michal Simek2023-03-094-6/+6
| | | | | | | | | | | | | | | | | | | | | | The latest SOM specification doesn't enforce certain MIO lines allocated for ethernet or ethernet controller itself. That's why remove comment about it which is likely there from early version of specification. Also removed the same comment from pinctrl node. It is clear that it has to be defined for different carrier cards. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9406377bf2c391ac0200670511bd6b0edb097c96.1676880543.git.michal.simek@amd.com
| * xilinx: Enable SMC command for arm64 targetsMichal Simek2023-03-093-0/+3
| | | | | | | | | | | | | | | | | | SMC command is very useful for TF-A testing or issuing commands which are not covered by any driver. Strongly recommend to disable this command on any product unless it is required. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/23c77a2cbd083963ca17b84de4108dbb1f28597f.1676450712.git.michal.simek@amd.com
| * cmd: smccc: Print results in hex instead of decMichal Simek2023-03-091-1/+1
| | | | | | | | | | | | | | | | | | Printing return value in HEX instead of DEC. Return values are 64 bit values which impossible to decode in DEC. For example getting CHIP ID in dec is quite long. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9a0278a7da729cb69b7a4d46c5e7eb8c3217c635.1676450712.git.michal.simek@amd.com
| * arm64: zynqmp: Add an OP-TEE node to the device treeIlias Apalodimas2023-03-091-0/+5
| | | | | | | | | | | | | | | | | | | | Since the zynqmp boards can run upstream OP-TEE, and having the DT node present doesn't cause any side effects add it in case someone tries to load OP-TEE. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Link: https://lore.kernel.org/r/20230216133921.866786-1-ilias.apalodimas@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
| * fpga: zynqmppl: fix fpga loads command for unencrypted use caseNeal Frager2023-03-091-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using the fpga loads command, the driver is passing the AES encryption key address is all cases. However, for the authenticated, but not encrypted use case, there is no AES encryption key, and this value is 0. When AES encryption is not used on the fpga bitstream, the pmufw assumes that the AES key address is a bitstream size value like what is used by the unsecure fpga load command. To fix the problem, this patch checks to see if the AES key address is zero. If the AES key address is zero, it means that AES is not being used on the bitstream and the bitstream size should be passed instead. Thus, matching the fpga load functionality. Signed-off-by: Neal Frager <neal.frager@amd.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230214131959.40298-1-neal.frager@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * ARM: zynq: Comment interrupt names IRQs for pl330Michal Simek2023-03-091-2/+4
| | | | | | | | | | | | | | | | pl330 DT yaml description doesn't define interrupt-names property that's why comment it but keep it as comment. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
| * ARM: dts: zynq-7000: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski2023-03-091-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
| * ARM: dts: xilinx: align gpio-key node names with dtschemaKrzysztof Kozlowski2023-03-092-3/+3
| | | | | | | | | | | | | | | | | | The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
| * ARM: zynq: Use recommended dma-controller name instead of dmacMichal Simek2023-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | Use standard name for dma controller. Issue is reported by dtbs_check as dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match '^dma-controller(@.*)?$' Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
| * arm64: zynqmp: Enable hs termination flag for USB dwc3 controllerMichael Grzeschik2023-03-091-0/+2
| | | | | | | | | | | | | | | | | | Since we need to support legacy phys with the dwc3 controller, we enable this quirk on the zynqmp platforms. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de Signed-off-by: Michal Simek <michal.simek@amd.com>
| * arm64: dts: xilinx: align LED node names with dtschemaKrzysztof Kozlowski2023-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | The node names should be generic and DT schema expects certain pattern: xilinx/zynqmp-zcu100-revC.dtb: leds: 'vbus-det' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221125144136.477171-1-krzysztof.kozlowski@linaro.org Signed-off-by: Michal Simek <michal.simek@amd.com>
| * xilinx: dts: Remove cdns,zynq-gemMichal Simek2023-03-092-6/+6
| | | | | | | | | | | | | | | | cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also U-Boot driver has been updated to support new compatible string that's why it is time to remove it and deprecate it. Signed-off-by: Michal Simek <michal.simek@amd.com>
generated by cgit (git 2.34.1) at 2025-02-24 07:07:44 +0000