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* binman: Rename ExpandToLimit to extend_to_limitSimon Glass2022-03-1810-31/+51
| | | | | | | | | | | | | | | The word 'expand' is used for entries which generate subentries. It is also used for entries that can have an '_expanded' version which is used to break out its contents. Rather than talking about expanding an entry's size, use the term 'extending'. It is slightly more precise and avoids the above conflicts. This change renders the old 'expand-size' property invalid, so add an error check for that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* binman: Tweak collect_contents_to_file() and docsSimon Glass2022-03-183-15/+20
| | | | | | | | | Update the return value of this function, fix the 'create' typo and update the documentation for clarity. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* elf: Rename load_segments() and module failureSimon Glass2022-03-182-12/+12
| | | | | | | | | | Rename this function to make it clear that it only reads loadable segments. Also update the error for missing module to better match the message emitted by Python. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* dtoc: Tidy up implementation of AddStringList()Simon Glass2022-03-183-3/+13
| | | | | | | | Refactor this to avoid a loop. Also add a test for an empty string. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* spl: Correct Kconfig help for TPL_BINMAN_SYMBOLSSimon Glass2022-03-181-3/+3
| | | | | | | | Fix the help which should refer to TPL, not SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* moveconfig: Use re.fullmatch() to avoid extra checkSimon Glass2022-03-181-2/+1
| | | | | | | Simplify the code by using the available function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* moveconfig: Remove remove_defconfig()Simon Glass2022-03-181-12/+1
| | | | | | | | | This is not necessary if simpler code is used. Use the split function and drop the unnecessary [] Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* dtoc: Make GetArgs() more flexibleSimon Glass2022-03-183-3/+13
| | | | | | | | | | At present it is not possible to have arguments which include spaces. Update the function to only split the args if the property is a single string. This is a bit inconsistent, but might still be useful. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Suggested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
* patman: Define Commit.path in the constructorSimon Glass2022-03-181-0/+2
| | | | | | | | It is good practice to init all variables in the constructor and pylint sometimes checks this. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Tom Rini <trini@konsulko.com>
* sandbox: test: Tidy up spl_test_load() callsSimon Glass2022-03-181-5/+1
| | | | | | | Use the new sandbox_find_next_phase() function, which does what is needed here. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Slow down the LCD sync rateSimon Glass2022-03-181-1/+1
| | | | | | | There is seldom a need to refresh at 100Hz and it uses a lot of CPU. Reduce the rate to 10Hz which seems to be adequate. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Open host file for read-only access if neededSimon Glass2022-03-181-3/+8
| | | | | | | | | | | Some files cannot be written but read-only access is still useful for tests. Add a fallback to read-only access when needed. This is useful in CI when opening a large data file provided by docker, where read/write access would result in copying the file, thus needing a lot of extra disk space. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add the handoff header for splSimon Glass2022-03-181-0/+1
| | | | | | This defines a function declared in handoff.h so add the header. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Show a message when writing out the ram bufferSimon Glass2022-03-181-1/+2
| | | | | | | If state is not being written, but RAM is, we should still show a message, so it is clear that this is happening. Signed-off-by: Simon Glass <sjg@chromium.org>
* binman: Include also subnodes in generator nodesJan Kiszka2022-03-183-0/+8
| | | | | | | | | This allows to prefill fdt and config nodes with hash and signature subnodes. It's just important to place the child nodes last so that hashes do not come before the data - would be disliked by mkimage. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* tools: binman: main.py: add build-sandbox in sys.pathPhilippe Reynes2022-03-181-0/+1
| | | | | | | | Adds build-sandbox in sys.path to look for libfdt, otherwise py_test can't use binman. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* binman: Complete elf test coverageSimon Glass2022-03-182-2/+50
| | | | | | | Add coverage for the new elf functions needed for the event_dump.py script. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'xilinx-for-v2022.07-rc1' of ↵WIP/16Mar2022-nextTom Rini2022-03-1647-124/+2410
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
| * arm64: zynqmp: Add pinctrl emmc description to SM-K26Michal Simek2022-03-161-0/+20
| | | | | | | | | | | | | | | | | | Production SOM has emmc on it and make sense to describe pin description to be able use EMMC if it is not configured via psu_init. (Still some regs are not handled but this is one step in that direction) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3545a0f08d342de98efc82b78f5725eda091555a.1647267969.git.michal.simek@xilinx.com
| * arm64: zynqmp: Fix i2c addresses for zynqmp-p-a2197Michal Simek2022-03-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After double checking some i2c addresses are not correct. It is visible from i2c dump ZynqMP> i2c bus Bus 3: i2c@ff020000 74: i2c-mux@74, offset len 1, flags 0 Bus 5: i2c@ff020000->i2c-mux@74->i2c@0 Bus 6: i2c@ff020000->i2c-mux@74->i2c@2 Bus 7: i2c@ff020000->i2c-mux@74->i2c@1 Bus 8: i2c@ff020000->i2c-mux@74->i2c@3 Bus 4: i2c@ff030000 (active 4) 74: i2c-mux@74, offset len 1, flags 0 Bus 9: i2c@ff030000->i2c-mux@74->i2c@0 Bus 10: i2c@ff030000->i2c-mux@74->i2c@3 Bus 11: i2c@ff030000->i2c-mux@74->i2c@4 Bus 12: i2c@ff030000->i2c-mux@74->i2c@5 (active 12) 51: generic_51, offset len 1, flags 0 60: generic_60, offset len 1, flags 0 74: generic_74, offset len 1, flags 0 Bus 13: i2c@ff030000->i2c-mux@74->i2c@6 (active 13) 51: generic_51, offset len 1, flags 0 5d: generic_5d, offset len 1, flags 0 74: generic_74, offset len 1, flags 0 ZynqMP> i2c dev 4 Setting bus to 4 ZynqMP> i2c mw 74 0 18 ZynqMP> i2c probe Valid chip addresses: 18 36 37 50 51 60 74 ZynqMP> i2c mw 74 0 20 ZynqMP> i2c probe Valid chip addresses: 51 60 74 where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is also at address 0x60 based on log above. i2c address 0x74 is i2c mux and 0x51 is eeprom. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0a198e9d993411e41473d130d5a5c20b6dc83458.1646639616.git.michal.simek@xilinx.com
| * pinctrl: zynqmp: Add pinctrl driverAshok Reddy Soma2022-03-145-0/+699
| | | | | | | | | | | | | | | | | | Add pinctrl driver for Xilinx ZynqMP SOC. This driver is compatible with linux device tree parameters for configuring pinmux and pinconf. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2d7eefa83c8c0129f7243a25de56a289e948f6c6.1645626183.git.michal.simek@xilinx.com
| * pinctrl: Increase length of pinmux status bufferAshok Reddy Soma2022-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | Xilinx ZynqMP SOC can set 6 parameters for its pins. pinmux status command will print the status of these parameters for each pin. But current print buffer length is only 40 characters long, increase it to 80 to print all the parameters. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3a6be84c8354f38754a9838670cc0319e84f29e8.1645626183.git.michal.simek@xilinx.com
| * cmd: test: pinmux: Do not check all empty spacesMichal Simek2022-03-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | There is really no value to check empty spaces. That's why use ut_assert_nextlinen() instead of ut_assert_nextline(). This change ensures that PINMUX_SIZE can be increased without changing tests. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/03aecf4c67ec8d72bf2a90baf1516fc5bd300fe0.1646668094.git.michal.simek@xilinx.com
| * net: phy: Add support for ethernet-phy-id with gpio resetMichal Simek2022-03-096-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ethernet phy like dp83867 is using strapping resistors to setup PHY address. On Xilinx boards strapping is setup on wires which are connected to SOC where internal pull ups/downs influnce phy address. That's why there is a need to setup pins properly (via pinctrl driver for example) and then perform phy reset. I can be workarounded by reset gpio done for mdio bus but this is not working properly when multiply phys sitting on the same bus. That's why it needs to be done via ethernet-phy-id driver where dt binding has gpio reset per phy. DT binding is available here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml The driver is are reading the vendor and device id from valid phy node using ofnode_read_eth_phy_id() and creating a phy device. Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio support. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
| * net: phy: Remove static return type for phy_device_create()Michal Simek2022-03-092-3/+16
| | | | | | | | | | | | | | | | | | Remove static return type for phy_device_create() to avoid file scope for this function. Also add required prototype in phy.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/1517f4053403fbd53e899d500e7485d068a4f0b6.1645627539.git.michal.simek@xilinx.com
| * net: phy: Add new read ethernet phy id functionMichal Simek2022-03-092-0/+49
| | | | | | | | | | | | | | | | | | Add new function to get ethernet phy id from compatible property of the mdio phy node. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Link: https://lore.kernel.org/r/16019efb3820a50330935fdaae191cec1f101b5c.1645627539.git.michal.simek@xilinx.com
| * MAINTAINERS: Remove duplicated entry for ehci-zynq.cMichal Simek2022-03-091-1/+0
| | | | | | | | | | | | | | ehci-zynq.c is assigned to Zynq and ZynqMP that's why remove one. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/d97779178fa56f1c6af40f5604b0bf349002cd36.1646639027.git.michal.simek@xilinx.com
| * arm64: zynqmp: add support for zcu106 rev1.0Neal Frager2022-03-094-1/+860
| | | | | | | | | | | | | | | | | | This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has newer x16 DDR4 memories and it is SW compatible with revA. Signed-off-by: Neal Frager <neal.frager@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
| * i2c: i2c-cdns: Prevent early termination of writeSai Pavan Boddu2022-03-091-4/+6
| | | | | | | | | | | | | | | | | | | | During sequential loading of data, hold the bus to prevent controller from sending stop signal in case no data is available in fifo. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com
| * i2c: i2c-cdns: Fix write transaction stateSai Pavan Boddu2022-03-091-0/+6
| | | | | | | | | | | | | | | | | | Start write transfer after loading data to FIFO. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com
| * i2c: i2c-cdns: Start read transaction after write to transfer_size regSai Pavan Boddu2022-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | Avoid a race condition where read transaction is started keeping expected bytes as 0. Which sometimes would result in sending STOP signal as no data is expected. Observed on QEMU platform. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/487c8026791bfd60719403a2df2c54bb0ae99232.1646122610.git.michal.simek@xilinx.com
| * dma: xilinx: Add Display Port DMA driverMichal Simek2022-03-093-0/+51
| | | | | | | | | | | | | | | | | | Display Port (DP) has own dma driver that's why add this skeleton driver only for handling power domain setting and send configuration object to PMUFW to enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/fe8bc313bcd430b04e9fa6fb770d5799ef28b350.1645627920.git.michal.simek@xilinx.com
| * video: Add skeleton driver for ZynqMP Display port driverMichal Simek2022-03-093-0/+75
| | | | | | | | | | | | | | | | | | The reason for this driver is to use call power management driver to enable it in PMUFW. There is missing functionality now but should be added in near future. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/598cb9515bbabc803f72e287464e3d107cd106a3.1645627920.git.michal.simek@xilinx.com
| * mmc: zynq_sdhci: Add support for dynamic configurationAshok Reddy Soma2022-03-091-2/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for dynamic configuration which will takes care of configuring the SD secure space configuration registers using firmware APIs, performing SD reset assert and deassert. High level sequence: - Check for the PM dynamic configuration support, if no error proceed with SD dynamic configurations(next steps) otherwise skip the dynamic configuration. - Put the SD Controller in reset. - Configure SD Fixed configurations. - Configure the SD Slot Type. - Configure the BASE_CLOCK. - Configure the 8-bit support. - Bring the SD Controller out of reset. In the above steps, apart from the Fixed configurations, remaining all configurations are dynamic and they will be read from devicetree. And also remove hardcoded secure register writes, as dynamic sd config support is added. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
| * lib: div64: Add support for round up of div64_u64Ashok Reddy Soma2022-03-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the frequencies are not rounded up to a proper number. When we need to devide these frequencies to get a number for example frequency in Mhz, we see it as one less than the actual intended value. Ex: If we want to get Mhz from frequency 199999994hz, we will calculate it using div64_u64(199999994, 1000000) and we will get 199Mhz in place of 200Mhz. Add a macro DIV64_U64_ROUND_UP for rounding up div64_u64. This is taken from linux 'commit 68600f623d69("mm: don't miss the last page because of round-off error")'. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f9fdcba76cd692ae436b1d7883b490e3dc207231.1645626962.git.michal.simek@xilinx.com
| * firmware: zynqmp: Add support for set sd config and is function supportedAshok Reddy Soma2022-03-092-0/+57
| | | | | | | | | | | | | | | | | | Add firmware API's to set SD configuration and to check if a purticular function is supported. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f64fa2f73e4775e9ad2f4d91339d6c74b43116a3.1645626962.git.michal.simek@xilinx.com
| * firmware: zynqmp: Add and update firmware enumsAshok Reddy Soma2022-03-091-0/+23
| | | | | | | | | | | | | | | | | | Update enum pm_ioctl_id with more IOCTLs. Add enum pm_sd_config_type to support dynamic sd configuration. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9aba090ec11d2591dbe6978e73e64384873c99fc.1645626962.git.michal.simek@xilinx.com
| * arm64: zynqmp: Fix level of gpio reset for usb on kv260 boardsMichal Simek2022-03-072-2/+2
| | | | | | | | | | | | | | Active level is low that's why it should be fixed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/86b3a96ce990b0ee0adab221146b5a5c751bd4a9.1645629459.git.michal.simek@xilinx.com
| * arm64: zynqmp: Enable DP driver for SOMsMichal Simek2022-03-072-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable access to DP. Overlay is sent when cls command is called and for that IP has to be enabled in carrier cards. And IP needs to be also enabled in SOM dt because with DTB reselection new DT is not parsed in pre reloc U-Boot instance. It is called from board_f via embedded_dtb_select(). That's why bind function is not able to allocate memory and it ends up with error: "Video device 'display@fd4a0000' cannot allocate frame buffer memory -ensure the device is set up before relocation" To avoid this situation DP is placed also to SOM where bind function is called and frame buffer memory is allocated and just reused after DTB reselection. Result is the same. There could be a problem in Linux with different DP configurations but that's need to be solved there because console should be on from u-boot already. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
| * arm64: zynqmp: Switch to ethernet-phy-id in kv260Michal Simek2022-03-072-4/+8
| | | | | | | | | | | | | | | | | | | | | | Use ethernet-phy-id compatible string to properly describe phy reset on kv260 boards. Previous description wasn't correct because reset was done for mdio bus to operate and it was in this case used for different purpose which was eth phy reset. With ethernet-phy-id phy reset happens only for the phy via phy framework. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/73b64f1a2b873b4e26bd2b365364bdf313794ae2.1645629459.git.michal.simek@xilinx.com
| * arm64: zynqmp: Use assigned-clock-rates for setting up clock in SOMMichal Simek2022-03-074-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With limited low level configuration done via psu-init only IPs connected on SOM are initialized and configured. All IPs connected to carrier card are not initialized. There is a need to do proper reset, pin configuration and also clock setting. The patch targets the last part which is setting up proper clock for USBs and SDs. Also setup proper bus width for SD cards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com
| * arm64: zynqmp: Setup clock for DP and DPDMAMichal Simek2022-03-073-0/+8
| | | | | | | | | | | | | | | | Clocks are coming from shared HW design where these frequencies should be aligned with PLL setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/04454c50d0d13e450976942085d763ab5aa38f98.1645629459.git.michal.simek@xilinx.com
| * arm64: zynqmp: Move usb hub from i2c to usb nodeMichal Simek2022-03-071-5/+8
| | | | | | | | | | | | | | | | | | | | Based on upstream discussion based on link below usb hub should be placed to usb node directly as child node. Based on this Linux driver was updated and the same change should be also reflected in kv260 board. Link: https://lore.kernel.org/all/CAL_JsqJZBbu+UXqUNdZwg-uv0PAsNg55026PTwhKr5wQtxCjVQ@mail.gmail.com/ Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/aa18df1978f161b933e6cdc6cd99c807b5f74398.1645629459.git.michal.simek@xilinx.com
| * microblaze: Do not place u-boot to reserved memory locationMichal Simek2022-03-072-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze can also have reserved space in DT which u-boot has to avoid to placing self to that location. The same change was done in Zynqmp by commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location"). This feature was tested with this memory description on kc705: memory { device_type = "memory"; reg = <0x80000000 0x40000000>; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; alloc@b00000000 { reg = <0xb0000000 0x10000000>; no-map; }; alloc@a8000000 { reg = <0xa8000000 0x00010000>; no-map; }; }; And in U-Boot log you can check u-boot relocation address and reserved locations. U-Boot 2022.01-03974-gb1b4c2dea9b9 (Feb 25 2022 - 11:59:48 +0100) Model: Xilinx MicroBlaze DRAM: 1 GiB Flash: 128 MiB Loading Environment from nowhere... OK In: serial Out: serial Err: serial Model: Xilinx MicroBlaze Net: AXI EMAC: 40c00000, phyaddr 7, interface gmii eth0: ethernet@40c00000 U-BOOT for microblaze-generic U-Boot-mONStR> bdi ... DRAM bank = 0x00000000 -> start = 0x80000000 -> size = 0x40000000 ... relocaddr = 0xaff69000 ... lmb_dump_all: memory.cnt = 0x1 memory[0] [0x80000000-0xbfffffff], 0x40000000 bytes flags: 0 reserved.cnt = 0x3 reserved[0] [0xa8000000-0xa800ffff], 0x00010000 bytes flags: 4 reserved[1] [0xafe87bb0-0xafffffff], 0x00178450 bytes flags: 0 reserved[2] [0xb0000000-0xbfffffff], 0x10000000 bytes flags: 4 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/ea0a8ccce723478eb518f6fdceb91d4f129efb68.1646122398.git.michal.simek@xilinx.com
| * power: zynqmp: Use zynqmp_pmufw_node() from firmwareMichal Simek2022-03-071-24/+5
| | | | | | | | | | | | | | | | | | | | | | Remove private xpm_configobject[] and use zynqmp_pmufw_node() which provides the same functionality. Also add debug messages for easier debugging. Fixes: e0283cbdfd49 ("power: zynqmp: Add power domain driver for ZynqMP") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
| * gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expanderT Karthik Reddy2022-03-074-0/+125
| | | | | | | | | | | | | | | | | | | | | | slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by writing and reading corresponding gpo bit value into its data register. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
| * mmc: zynq_sdhci: Enable card detect workaround for ZynqMPAshok Reddy Soma2022-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | Card detect state stable issue is observed on few ZynqMP boards(SOM), so enable the workaround 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' for ZynqMP platforms also. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
| * mmc: zynq_sdhci: Change granularity of timeout to 1usAshok Reddy Soma2022-03-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | The timeout used in 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' workaround is 1000ms at a granularity of 1msec. Change it to 1usec, to not waste time incase the cd is stable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
| * mmc: zynq_sdhci: Fix timeout issueAshok Reddy Soma2022-03-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | In the workaround added with 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' the timeout variable has post decrement. Whenever timeout happens, this post decrement is making timeout=0xffffffff, so timeout error print and return statement are never reached. Fix it by decrementing it inside the while loop. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
| * ARM: dts: zynq: add NAND flash controller nodeMichael Walle2022-03-073-29/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently, a driver for the ARM Primecell PL35x static memory controller (including NAND controller) was added in linux. Add the corresponding device tree node. Also update cfi-flash registers and location in DT. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
generated by cgit (git 2.34.1) at 2025-02-27 05:01:36 +0000