| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | xilinx: zynqmp: Add missing prototype for zynqmp_mmio_write | Algapally Santosh Sagar | 2023-03-09 | 1 | -6/+1 |
| * | xilinx: versal-net: Add support for timer and start it | Ashok Reddy Soma | 2023-01-16 | 2 | -0/+42 |
| * | soc: xilinx: versal-net: Add soc_xilinx_versal_net driver | Michal Simek | 2022-11-22 | 1 | -0/+5 |
| * | spi: cadence_qspi: Add support for Versal NET platform | Michal Simek | 2022-09-26 | 1 | -0/+4 |
| * | arm64: versal-net: Add support for Versal NET platform | Michal Simek | 2022-09-26 | 6 | -0/+220 |
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