aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/lib/cache_init.S
Commit message (Expand)AuthorAgeFilesLines
* mips: refactor disabling of cachesDaniel Schwierzeck2020-07-181-0/+6
* mips: add KSEG1 wrapper for change_k0_ccaDaniel Schwierzeck2020-07-181-14/+18
* MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODEDaniel Schwierzeck2018-09-221-5/+1
* MIPS: cache: make index base address configurableDaniel Schwierzeck2018-09-221-10/+8
* MIPS: cache: optimise changing of k0 CCA modeDaniel Schwierzeck2018-09-221-22/+32
* MIPS: cache: reimplement dcache_[status, enable, disable]Daniel Schwierzeck2018-09-221-46/+0
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* MIPS: Ensure cache ops complete in mips_cache_resetPaul Burton2016-09-211-0/+2
* MIPS: Clear hazard between TagLo writes & cache opsPaul Burton2016-09-211-0/+1
* MIPS: Join the coherent domain when a CM is presentPaul Burton2016-09-211-0/+38
* MIPS: L2 cache supportPaul Burton2016-09-211-5/+178
* MIPS: Define register names for cache initPaul Burton2016-09-211-19/+23
* MIPS: Enable use of the instruction cache earlierPaul Burton2016-09-211-0/+13
* MIPS: Split I & D cache line size configPaul Burton2016-05-311-2/+2
* MIPS: Move cache sizes to KconfigPaul Burton2016-05-311-3/+3
* MIPS: Use unchecked immediate addition/subtractionPaul Burton2016-05-211-1/+1
* MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck2016-01-161-8/+8
* MIPS: clear TagLo select 2 during cache initPaul Burton2015-01-291-2/+8
* MIPS: allow systems to skip loads during cache initPaul Burton2015-01-291-6/+13
* MIPS: inline mips_init_[id]cache functionsPaul Burton2015-01-291-58/+28
* MIPS: refactor cache loops to a macroPaul Burton2015-01-291-17/+13
* MIPS: refactor L1 cache config reads to a macroPaul Burton2015-01-291-56/+41
* MIPS: unify cache initialization codePaul Burton2015-01-291-0/+277