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* Merge branch 'next' of ↵Tom Rini2023-09-069-108/+204
|\ | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-coldfire into next - Relocation support
| * arch: m68k: Implement relocationMarek Vasut2023-09-069-108/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement relocation for M68K. Perform all the updates in start.S relocate_code in assemby, since it is a simple matter of traversing the dynsym table and adding relocation offset - MONITOR_BASE to all the items in that table. The necessity to deal with MONITOR_BASE is a specific of M68K, where the ELF entry point is at offset 0x400, which is the MONITOR_BASE, while TEXT_BASE is at offset 0 . This also removes the one last user of NEEDS_MANUAL_RELOC, so that could be finally cleaned up . Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* | Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh ↵Tom Rini2023-09-061-4/+5
|\ \ | | | | | | | | | | | | | | | into next - rmobile cleanup
| * | ARM: rmobile: Clean up rmobile_cpuinfo_idx()Marek Vasut2023-09-061-4/+5
| |/ | | | | | | | | | | | | | | | | Clean the function up a bit further. Return immediately on match and return ARRAY_SIZE() - 1 on failure. Add proper comment in that case. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
* | riscv: Correct event usage for riscv_cpu_probe/setupTom Rini2023-09-061-5/+1
| | | | | | | | | | | | | | | | | | | | With having both an EVENT_SPY_SIMPLE setup for both riscv_cpu_probe and riscv_cpu_setup we do not need the latter function to call the former function as it will already have been done in time. Fixes: 1c55d62fb9cc ("riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback") Tested-by: Milan P. Stanić <mps@arvanta.net> Signed-off-by: Tom Rini <trini@konsulko.com>
* | riscv: Rework riscv_cpu_probe for current event macrosTom Rini2023-09-061-2/+2
|/ | | | | | | | This function should now be a EVENT_SPY_SIMPLE call, update it. Tested-by: Milan P. Stanić <mps@arvanta.net> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'v2023.10-rc4' into nextTom Rini2023-09-0412-63/+16
|\ | | | | | | Prepare v2023.10-rc4
| * Revert "arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee"WIP/2023-08-28-assorted-important-fixesRicardo Salveti2023-08-281-8/+0
| | | | | | | | | | | | | | | | | | | | This reverts commit c5b68ef8af3c2f515c1f5b8d63a69359a85d753b. CONFIG_OPTEE_TZDRAM_SIZE is used by imx6-based SoCs as well. Move the option back. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
| * imx: Drop unneeded phandle in FIT templateSimon Glass2023-08-287-9/+13
| | | | | | | | | | | | | | | | | | | | Adding a phandle to a template node is not allowed, since when the node is instantiated multiple times, we end up with duplicate phandles. Drop this invalid constructs. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Tim Harvey <tharvey@gateworks.com>
| * arm: dts: mediatek: convert gmac link mode to 2500base-x for r3Frank Wunderlich2023-08-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Ethernet on Bananapi-r3 is broken after commit bd70f3cea353 ("net: mediatek: add support for SGMII 1Gbps auto-negotiation mode") because changes from this commit were not applied to bpi-r3 devicetree too: commit aef54ea16cac ("arm: dts: medaitek: convert gmac link mode to 2500base-x") Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
| * ARM: dts: stm32mp13: remove shmem for scmi-opteePatrick Delaunay2023-08-252-22/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE native shared memory registered by clients. To be compatible by default with this configuration this patch removes the shared memory in the SCMI configuration and the associated reserved memory in SRAM. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * ARM: dts: stm32mp15: remove shmem for scmi-opteePatrick Delaunay2023-08-251-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since OP-TEE commit 89ba3422ee80 ("plat-stm32mp1: scmi_server: default use OP-TEE shared memory"), integrated in OP-TEE 3.22.0-rc1 the default configuration for STM32MP15x SoCs changes, CFG_STM32MP1_SCMI_SHM_SYSRAM is disabled by default and the OP-TEE SMCI server uses ithe OP-TEE native shared memory registered by clients. To be compatible by default with this configuration and the next OP-TEE version, this patch removes the SHMEM in the SCMI configuration and the associated reserved memory in the last 4KByte page of SRAM, in the STM32MP15 device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callbackChanho Park2023-08-221-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the Patch 55171aedda88, VisionFive2 booting has been broken [1]. VisionFive2 board requires to enable CONFIG_TIMER_EARLY but booting went to panic from initr_dm_devices due to lack of a timer device. - Error logs initcall sequence 00000000fffd8d38 failed at call 00000000402185e4 (err=-19) Thus, we need to move riscv_cpu_probe function in order to register the timer earlier than initr_dm_devices. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Milan P. Stanić <mps@arvanta.net> Tested-by: Roland Ruckerbauer <mail@ruabmbua.dev> Tested-by: Roland Ruckerbauer <mail@ruabmbua.dev>
* | event: Use an event to replace last_stage_init()WIP/2023-08-31-replace-more-init-hooks-with-eventsSimon Glass2023-08-317-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new event which handles this function. Convert existing use of the function to use the new event instead. Make sure that EVENT is enabled by affected boards, by selecting it from the LAST_STAGE_INIT option. For x86, enable it by default since all boards need it. For controlcenterdc, inline the get_tpm() function and make sure the event is not built in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* | freescale: Drop call to init_func_vid() in the init sequenceSimon Glass2023-08-311-0/+5
| | | | | | | | | | | | | | | | Use the misc_init_f event instead, which is designed for this purpose. All boards with CONFIG_VID already enable CONFIG_EVENT. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: Convert arch_fsp_init() to use eventsSimon Glass2023-08-312-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | Convert this to use events instead of calling a function directly in the init sequence. Rename it to arch_fsp_init_f() to distinguish it from the one that happens after relocation. For FSPv2 nothing needs to be done here, so drop the empty function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | event: Convert existing spy records to simpleSimon Glass2023-08-3117-66/+40
| | | | | | | | | | | | | | | | | | Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge tag 'u-boot-at91-2023.10-a' of ↵WIP/30Aug2023-nextTom Rini2023-08-308-87/+545
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2023.10 cycle: This feature set includes a new board sama5d29 Curiosity, and various fixes and alignments for sam9x60 and sam9x60 curiosity board.
| * | ARM: dts: at91: sam9x60-curiosity: Sync gpio button from LinuxAlexander Dahl2023-08-291-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Copied as is from Linux Kernel release v6.4. (dts file is still the same in Linux v6.5-rc7 but was moved to vendor sub-directories with v6.5-rc1.) Button works out of the box now if the following config options are enabled: CONFIG_BUTTON, CONFIG_BUTTON_GPIO, CONFIG_CMD_BUTTON, CONFIG_DM_GPIO. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | board: sam9x60-curiosity: Let LED subsystem init leds if enabledAlexander Dahl2023-08-291-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_LED and CONFIG_LED_GPIO are enabled, it is not necessary to initialize the RGB LED on the board by manually setting hardcoded GPIOs anymore. Everything is well defined in dts and can be used like on boards of other vendors. Keep the old behaviour as fallback, though. With all this in place enabling CONFIG_CMD_LED gives us a working 'led' command on the U-Boot shell. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | ARM: dts: at91: sam9x60-curiosity: Sync LED nodes from LinuxAlexander Dahl2023-08-291-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Copied as is from Linux Kernel release v6.4. (dts file is still the same in Linux v6.5-rc7 but was moved to vendor sub-directories with v6.5-rc1.) Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | board: at91: sama5d29_curiosity: add initial support for sama5d29_curiosityMihai Sain2023-08-074-0/+289
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for sama5d29_curiosity board. Hardware: SoC: SAMA5D29 500 MHz DRAM: LPDDR2 512 MiB PMIC: MCP16502 Debug: UART0 Flash: QSPI NOR 8 MiB RGB LCD connector Mikrobus connectors x 2 SD-Card connectors x 2 USB 2.0 x 2 Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
| * | ARM: dts: at91: sam9x60-curiosity: Add raw NAND flashAlexander Dahl2023-08-021-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Basically the same as on sam9x60-ek. Same as in Linux. NAND flash is correctly detected when booting into U-Boot: U-Boot 2023.07-rc6-00005-g12719f75dc-dirty (Jul 05 2023 - 13:06:35 +0000) CPU: SAM9X60 128MiB DDR2 SiP Crystal frequency: 24 MHz CPU clock : 600 MHz Master clock : 200 MHz Model: Microchip SAM9X60 Curiosity DRAM: 128 MiB Core: 145 devices, 22 uclasses, devicetree: separate NAND: 512 MiB MMC: sdhci-host@80000000: 0, sdhci-host@90000000: 1 Loading Environment from FAT... Unable to read "uboot.env" from mmc0:1... In: serial Out: serial Err: serial Net: eth0: ethernet@f802c000 Hit any key to stop autoboot: 0 Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | ARM: dts: at91: sam9x60-curiosity: Improve alignment with upstreamAlexander Dahl2023-08-022-55/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | - nodes moved - using node references by label instead of dulicating the node tree Makes it easier to compare with the dts file from Linux kernel. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | ARM: dts: at91: sam9x60: Change i2c compatibleAlexander Dahl2023-08-022-2/+2
| | | | | | | | | | | | | | | | | | There's a more specific compatible string for the i2c interface, use it. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | ARM: dts: at91: sam9x60-curiosity: Fix EEPROM typeAlexander Dahl2023-08-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The user guide says it's a Microchip 24AA025E48 serial EEPROM, which is a 2-Kbit I2C Serial EEPROM with EUI-48™ Identity. This is the chip actually populated on board EV40E67A rev 4. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | ARM: dts: at91: sam9x60: Better align with upstream dtsiAlexander Dahl2023-08-021-33/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional changes, but this: - reorder nodes (ordered by memory offset as in Linux) - add label to pinctrl node name for easier reference in board files - fix whitespace Diff to sam9x60.dtsi in Linux is much better readable now. Signed-off-by: Alexander Dahl <ada@thorsis.com>
* | | nuvoton: npcm845-evb: Add a newline at the end of fileSughosh Ganu2023-08-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a newline at the end of the dts, without which the build fails when including a dtsi file. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
* | | bootstd: Add a test for bootmeth_crosSimon Glass2023-08-251-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ChromiumOS bootmeth has no tests at present. Before adding more features. add a basic test. This creates a disk which can be scanned by the bootmeth, so make sure things work. It is quite rudimentary, since the kernel is faked, the root disk is missing and there is no cmdline stored. Enable the bootmeth for snow so it can build the unit test. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Add a way to access persistent test filesSimon Glass2023-08-251-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some pytests create files in the persistent-data directory. It is useful to be able to access these files in C tests. Add a function which can locate a file given its leaf name, using the environment variable set up in test/py/conftest.py Signed-off-by: Simon Glass <sjg@chromium.org>
* | | expo: Move cedit theme under bootstdSimon Glass2023-08-252-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is related to standard boot, so put it under the same node. This may simplify schema upstreaming later. Mention themes in the documentation while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | arm: qemu: Enable usb keyboard as an input deviceAlper Nebi Yasak2023-08-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 02be57caf730 ("riscv: qemu: Enable usb keyboard as an input device") adds PCI xHCI support to QEMU RISC-V virtual machines and enables using a USB keyboard as one of the input devices. Similarly, enable those for ARM virtual machines as well. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng@tinylab.org>
* | | arm: qemu: Enable PRE_CONSOLE_BUFFERAlper Nebi Yasak2023-08-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 608b80b5b855 ("riscv: qemu: Enable PRE_CONSOLE_BUFFER") enables buffering console messages for QEMU RISC-V virtual machines so those printed before the video console is available will still show up on the display. Similarly, enable it for ARM virtual machines as well. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng@tinylab.org>
* | | arm: qemu: Enable Bochs video supportAlper Nebi Yasak2023-08-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 716161663ec49 ("riscv: qemu: Enable Bochs video support") enables a video console for QEMU RISC-V virtual machines using an emulated Bochs VGA card. Similarly, enable it for ARM virtual machines as well. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
* | | Merge tag 'v2023.10-rc3' into nextTom Rini2023-08-2196-179/+2851
|\ \ \ | | |/ | |/| | | | | | | | | | Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
| * | Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shTom Rini2023-08-202-25/+32
| |\ \
| | * | arm: rmobile: Fix off-by-one error in cpuinfoPaul Barker2023-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In rmobile_cpuinfo_idx() there is an off-by-one error in accessing the rmobile_cpuinfo array. At the end of the loop, i is equal to the array size, i.e. rmobile_cpuinfo[i] accesses one entry past the end of the array. The last entry in the array is a fallback value so the loop should count to ARRAY_SIZE(rmobile_cpuinfo) - 1 instead, this will leave i equal to the index of the fallback value if no match is found. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| | * | ARM: rmobile: Update little‐endian byte order option in srec_cat commandHai Pham2023-08-131-24/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since srecord v1.60, option "-Little_Endian_CONSTant" is deprecated. Fix the build warnings by updating little‐endian byte order option in srec_cat command when generating loader header. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| * | | Merge tag 'tegra-for-2023.10-rc1' of ↵WIP/18Aug2023Tom Rini2023-08-1822-1/+1312
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-tegra ARM: tegra: Changes for v2023.10-rc1 This adds support for various new Tegra30 boards (ASUS, LG and HTC) and has some other minor enhancements, such as enabling the poweroff command on several Tegra210 and Tegra186 boards.
| | * | | board: htc: endeavoru: add One X supportSvyatoslav Ryhel2023-06-303-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HTC One X is a touchscreen-based, slate-sized smartphone designed and manufactured by HTC that runs the Android operating system. The One X features a 4.7" display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and non-extendable 32 GB of internal storage. UART-A is default debug port. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> Tested-by: Ion Agorria <ion@agorria.com> Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | board: lg: x3: add Optimus 4X HD and Optimus Vu supportSvyatoslav Ryhel2023-06-305-0/+277
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LG X3 is a development board based on Nvidia Tegra 3 SoC on base of which Optimus 4X HD and Optimus Vu were created. Both smartphones feature a 4.7" and 5" panels respectively, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 16/32 GB of internal storage. Optimux 4X HD additionally has a micro SD slot. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | board: asus: grouper: add Google Nexus 7 (2012) supportSvyatoslav Ryhel2023-06-306-0/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nexus 7 is a mini tablet computer co-developed by Google and Asus that runs the Android operating system. The Nexus 7 features a 7" display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB of internal storage. This patch brings support for all 3 known ASUS/Google devices: - Nexus 7 (2012) E1565 - Nexus 7 (2012) PM269 - Nexus 7 (2012) 3G - tilapia Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS Grouper E1565 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | board: asus: transformer: add ASUS Transformer T30 family supportSvyatoslav Ryhel2023-06-3010-0/+388
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ASUS Transformer T30 family are 2-in-1 detachable tablets and AiO developed by ASUS that run the Android operating system (TF600T runs Windows RT and P1801-T runs Android and Windows). The T30 Transformers feature a 10.1-inch display (apart P1801-T), an Nvidia Tegra 3 quad-core chip, 1/2 GB of RAM, and 16/32 GB of storage. Transformers board derives from Nvidia Cardhu development board. This patch brings support for 7 known Transformer devices: - ASUS Transformer Prime TF201 - ASUS Transformer Pad TF300T/TF300TG/TF300TL - ASUS VivoTab RT TF600T (Windows RT based) - ASUS Transformer Infinity TF700T - ASUS Portable AiO P1801-T Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # all devices Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | ARM: tegra: add SoC UID calculation functionSvyatoslav Ryhel2023-06-303-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a small tool for calculation of SoC UID based on the same Linux function. It can be further used for generation of device unique data like mac address or exposing it as serial number. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | ARM: dts: trimslice: sync SPI node with Linux dtsTomasz Maciej Nowak2023-06-231-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode" series flash speed and mode wasn't passed to driver anymore, which resulted in: Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19) *** Warning - spi_flash_probe_bus_cs() failed, using default environment Fix it by syncing SPI node of affected device dts with Linux kernel dts. The changed SPI bus frequency doesn't influence stability of read/write operations. Ref: https://patchwork.ozlabs.org/project/uboot/cover/20220518064648.1843664-1-patrice.chotard@foss.st.com Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Tom <twarren@nvidia.com>
| * | | | ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOMMarek Vasut2023-08-162-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad using external pad-to-pad connection. Option (1) has two downsides. ETHCK_K is supplied directly from either PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and since the same PLL output is also used to supply SDMMC blocks, the performance of SD and eMMC access is affected. The second downside is that using this option, the EMI of the SoM is higher. Option (2) solves both of those problems, so implement it here. In this case, the PLL4_P is no longer limited and can be operated faster, at 100 MHz, which improves SDMMC performance (read performance is improved from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M count=1). The EMI interference also decreases. Ported from Linux kernel commit 73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | | | ARM: dts: stm32mp: alignment with v6.4Patrick Delaunay2023-08-1610-56/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device tree alignment with Linux kernel v6.4. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | | | ARM: stm32: Inhibit PDDS because CSTBYDIS is setMarek Vasut2023-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never enter CStandby state and would always end up in CStop state. Clear the PDDS bit, which indicates the CA cores can enter CStandby state as it makes little sense to keep it set with CSTBYDIS also set. This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR PDDS bits are set, then the chip enters CStandby state even though the PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that from happening. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | | ARM: dts: stm32: fix display pinmux for stm32f746-discoDario Binacchi2023-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As reported by the datasheet (DocID027590 Rev 4) for PG12: - AF9 -> LCD_B4 - AF14 -> LCD_B1 So replace AF14 with AF9 for PG12 in the dts. Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | | | common: return type board_get_usable_ram_topHeinrich Schuchardt2023-08-1524-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
generated by cgit (git 2.34.1) at 2025-03-04 04:59:37 +0000