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* Convert CONFIG_SPL_GD_ADDR to KconfigTom Rini2022-06-062-4/+4
| | | | | | | This converts the following to Kconfig: CONFIG_SPL_GD_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SPL_RELOC_TEXT_BASE et al to KconfigTom Rini2022-06-062-6/+6
| | | | | | | | | | This converts the following to Kconfig: CONFIG_SPL_RELOC_TEXT_BASE CONFIG_SPL_RELOC_STACK CONFIG_SPL_RELOC_MALLOC_ADDR CONFIG_SPL_RELOC_MALLOC_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SPL_COMMON_INIT_DDR to KconfigTom Rini2022-06-062-4/+2
| | | | | | | This converts the following to Kconfig: CONFIG_SPL_COMMON_INIT_DDR Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SPL_INIT_MINIMAL et al to KconfigTom Rini2022-06-063-0/+6
| | | | | | | | | This converts the following to Kconfig: CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_FLUSH_IMAGE CONFIG_SPL_SKIP_RELOCATE Signed-off-by: Tom Rini <trini@konsulko.com>
* board: freescale: Update MAINTAINERS ListWasim Khan2022-05-262-0/+3
| | | | | | | Update MAINTAINERS List for LS2088ARDB and LS2088AQDS platforms Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
* i.MX8ULP: add display_ele_fw_version apiGaurav Jain2022-05-201-0/+19
| | | | | | | | | implement get f/w version api. print ele f/w version in spl. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
* caam: Fix crash in case caam_jr_probe failedYe Li2022-05-203-3/+3
| | | | | | | | | If probing caam_jr returns failure, the variable "dev" will not be initialized, so we can't use dev->name for the error print. Otherwise it will cause crash. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
* imx: imx8mp_evk: enable pinctrl_wdog in SPLPeng Fan2022-05-202-19/+0
| | | | | | | | | | Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8mm_evk: enable pinctrl_wdog in SPLPeng Fan2022-05-201-19/+0
| | | | | | | | | | Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8mn_evk: enable pinctrl_wdog in SPLPeng Fan2022-05-201-19/+0
| | | | | | | | | | Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* board: ls1046afrwy: Remove Manish Tomar's emailSean Anderson2022-04-261-4/+0
| | | | | | | | Manish Tomar's email bounces. Remove it, and reassign the config he was maintaining to the primary maintainer for the board. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct placePali Rohár2022-04-261-2/+2
| | | | | | | | Whole section about USB/eLBC configuration seems to be P1020 specific. So add ifdefs to not compile it on other platforms (e.g. P2020). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM mapPali Rohár2022-04-261-3/+3
| | | | | | | | | | | | | | | Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and also allow speculative loading (by not setting Guarded attribute). Also enable Memory Coherency attribute for second 1G SDRAM map. In commit 316f0d0f8f3c ("powerpc: mpc85xx: Fix static TLB table for SDRAM") it was enabled for all SDRAM maps on all other boards, just missed this one case. As a last thing, first 1G SDRAM map has wrong comment, so adjust it. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when ↵Pali Rohár2022-04-261-2/+4
| | | | | | | | | | | | | | | | SDHC_WP is used as GPIO When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes inserted SD card readonly if GPIO[9] is active. In some design GPIO[9] pin does not have to be connected to SD card write-protect pin and can be used as GPIO. So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for SDHC_WP functionality. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurationsPali Rohár2022-04-261-0/+4
| | | | | | | | As written in comment, P2020 has two possible SD switch configurations. Extend code to detect both of them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* board: freescale: p1_p2_rdb_pc: Do not hang in checkboard()Pali Rohár2022-04-261-1/+1
| | | | | | | Like in all other checks in checkboard() function, do not hang on error. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* board: freescale: p1_p2_rdb_pc: Allow to compile it without env supportPali Rohár2022-04-261-0/+4
| | | | | | | | | When env support is disabled then usage of env_init() or env_relocate() generates linker errors. So do not compile env_init() or env_relocate() in SPL code when env support is disabled in SPL. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* armv8: psci: add ARMV8_PSCI_RELOCATE Kconfig optionMichael Walle2022-04-261-8/+0
| | | | | | | | | | | | | | | | | | There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the same meaning but is just for the ls1043ardb board. As no in-tree config uses this, drop it and replace it with something more sophiticated: ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE option which is used as the base to relocate the PSCI code (or any code in the secure region, but that is only PSCI). A SoC (or board) can now opt-in into having such a secure region by enabling SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was possible to relocate the PSCI code before as well as on the LS1028A SoC where there will be PSCI support soon. Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* imx: imx8mn_evk: enable CONFIG_DM_SERIALPeng Fan2022-04-211-10/+2
| | | | | | | | | | Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. move the preloader_console_init() call after spl_init() to avoid board hang Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8mm_evk: enable CONFIG_DM_SERIALPeng Fan2022-04-211-10/+2
| | | | | | | | | | Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. move the preloader_console_init() call after spl_early_init() to avoid board hang Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8mp_evk: enable CONFIG_DM_SERIALPeng Fan2022-04-211-8/+0
| | | | | | | Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already marked with u-boot,dm-spl. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-netTom Rini2022-04-153-5/+5
|\ | | | | | | | | | | | | | | | | | | - DM9000 DM support - tftp server bug fix - mdio ofnode support functions - Various phy fixes and improvements. [trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c drivers/net/phy/phy.c include/phy.h]
| * treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NAMarek Behún2022-04-103-5/+5
| | | | | | | | | | | | | | | | | | | | Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make it compatible with Linux' naming. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
* | board: freescale: imxrt10..-evk: Fix missing include of serial.hJesse Taube2022-04-122-0/+2
| | | | | | | | | | | | If FALCON mode is enabled we have a missing include in spl_start_uboot. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
* | imx: imx8ulp_evk: Enable SD/MMC port auto detectPeng Fan2022-04-121-0/+3
| | | | | | | | | | | | | | Enable the SD/MMC port auto detect. The mmc relevant env can be reset when auto detect is enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: dynamic setting mmcdev and mmcrootPeng Fan2022-04-122-0/+52
| | | | | | | | | | | | | | Dynamic setting mmcdev and mmcroot. Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2" Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp_evk: call the handshake with M33Ye Li2022-04-121-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | If M33 handshake is successful, TPM and DSI panel MUX setting is done by M33, no need to set them. If handshake is failed or M33 is not booted, continue the TPM and DSI panel MUX setting Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp_evk: Update LPDDR4 PHY settingsYe Li2022-04-121-16/+16
| | | | | | | | | | | | | | | | | | Update DDR PHY settings to support LPDDR4 mode only by adjusting DQ VREF ctrl, ODT and pads drive strength. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp: release CAAM for the Cortex-A35Clement Faure2022-04-121-0/+8
| | | | | | | | | | | | | | Release the CAAM for the A35 from the SPL. Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp: Load the lposc fuse for dual bootYe Li2022-04-121-4/+2
| | | | | | | | | | | | | | | | | | | | Found the lposc fuse loading having impact to cpu idle in kernel. Without the loading in dual boot mode, kernel will hang after idle for a while. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp_evk: Skip init DDR for reboot in dual boot modeYe Li2022-04-121-2/+10
| | | | | | | | | | | | | | | | | | | | | | When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset during APD reset. So no need to init DDR again after reboot, but need to reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may change or disable some of them. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp: add ND/LD clockPeng Fan2022-04-123-3/+1128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new ddr script, defconfig for ND Configure the clock for ND mode changing A35 to 960MHz for OD mode Update NIC CLK for the various modes Introduce clock_init_early/late, late is used after pmic voltage setting, early is used in the very early stage for upower mu, lpuart and etc. Note: NIC runs at 324MHz, 442MHz has some random kernel hang issue with cpuidle enabled now. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | imx: imx8ulp_evk: Remove PMIC Bucks PWM mode settingsYe Li2022-04-121-18/+0
| | | | | | | | | | | | | | | | | | | | This workaround is not needed on i.MX8ULP proto-1B EVK as board has fixed the problem. Because we don't support proto-1A any longer, remove the PMIC settings. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | ARM: imx: imx8mn-*-evk: use DM settings for PHY configurationHeiko Thiery2022-04-121-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With the correct settings described in the device-tree the PHY settings in the board init are no longer required. The values are taken from the linux device tree. The PHY latency settings are derived from the phy-mode property and the voltage seetings are done via the regulator. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK Reviewed-by: Fabio Estevam <festevam@gmail.com>
* | Layerscape: Enable Job ring driver model.Gaurav Jain2022-04-1216-85/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162 platforms are enabled with JR driver model. removed sec_init() call from board files. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc>
* | crypto/fsl: i.MX8: Enable Job ring driver model.Gaurav Jain2022-04-122-4/+8
| | | | | | | | | | | | | | | | | | | | i.MX8(QM/QXP) - added support for JR driver model. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
* | crypto/fsl: i.MX8M: Enable Job ring driver model.Gaurav Jain2022-04-124-7/+34
| | | | | | | | | | | | | | | | | | i.MX8MM/MN/MP/MQ - added support for JR driver model. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
* | Convert CONFIG_FSL_QIXIS et al to KconfigTom Rini2022-04-081-0/+8
| | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_FSL_QIXIS CONFIG_QIXIS_I2C_ACCESS Signed-off-by: Tom Rini <trini@konsulko.com>
* | ls1021atwr: Use DEBUG and not CONFIG_DEBUGTom Rini2022-04-081-1/+1
|/ | | | | | | | | We use 'DEBUG' and not 'CONFIG_DEBUG' tree-wide for debug code that is left in, and not wrapped by some other regular debugging type print macro. Cc: Alison Wang <alison.wang@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm64: ls1046a: Support semihosting fallbackSean Anderson2022-04-011-1/+2
| | | | | | | | Use the semihosting_enabled function to determine whether or not to enable semihosting devices. This allows for graceful fallback in the event a debugger is not attached. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
* ls1046ardb: Add support for JTAG bootSean Anderson2022-04-011-0/+10
| | | | | | | | | | | | | | | This adds support for booting entirely from JTAG while using a hard-coded RCW. With these steps, it is not necessary to program a "good" RCW using CodeWarrior. The method here can be performed with any JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP (albeit very slowly). These steps require LS1046A support in OpenOCD, which was added in [1]. [1] https://sourceforge.net/p/openocd/code/ci/5b70c1f679755677c925b4e6dd2c3d8be4715717/ Signed-off-by: Sean Anderson <sean.anderson@seco.com> [trini: Add reference to doc/board/nxp/ls1046ardb.rst]
* nxp: ls1046ardb: Convert README to rSTSean Anderson2022-04-012-76/+1
| | | | | | | This converts the readme for this board to rST. I have tried not to change any semantics from the original (though I did convert MB to M). Signed-off-by: Sean Anderson <sean.anderson@seco.com>
* Convert CONFIG_NORFLASH_PS32BIT to KconfigTom Rini2022-04-011-0/+3
| | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_NORFLASH_PS32BIT Note that we also attempt to correct the behavior of the code here, which had been testing for "NORFLASH_PS32BIT" which would never be set, instead check for the now set "CONFIG_NORFLASH_PS32BIT", which results in some behavior change. Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SRIO_PCIE_BOOT_SLAVE to KconfigTom Rini2022-04-011-0/+3
| | | | | | | This converts the following to Kconfig: CONFIG_SRIO_PCIE_BOOT_SLAVE Signed-off-by: Tom Rini <trini@konsulko.com>
* mx53loco: Convert CONFIG_DIALOG_POWER to KconfigTom Rini2022-04-011-0/+3
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_DEEP_SLEEP to KconfigTom Rini2022-04-011-0/+7
| | | | | | | This converts the following to Kconfig: CONFIG_DEEP_SLEEP Signed-off-by: Tom Rini <trini@konsulko.com>
* MPC837XERDB: Move CONFIG_PCIE to KconfigTom Rini2022-04-011-0/+3
| | | | | | Move this symbol to the board Kconfig file. Signed-off-by: Tom Rini <trini@konsulko.com>
* mpc8548cds: Rework CONFIG_LEGACY usageTom Rini2022-04-012-1/+8
| | | | | | | | This CONFIG option is used in one place, so pick a more direct name and migrate to Kconfig. Rework the code slightly. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove CONFIG_BOARDNAME and CONFIG_BOARD_NAMETom Rini2022-04-011-1/+10
| | | | | | | | | | | Both of these variables are used in a few hard-coded ways to set some string values or print something to the user. In almost all cases, it's just as useful to hard-code the value used. The exception here is printing something closer to correct board name for p1_p2_rdb machines. This can be done using something from the device tree, but for now hard-code a non-CONFIG based value instead. Signed-off-by: Tom Rini <trini@konsulko.com>
* video: Drop FSL DIU driverSimon Glass2022-03-285-315/+0
| | | | | | | | | This does not use driver model and is more than two years past the migration date. Drop it. It can be added back later if needed. Signed-off-by: Simon Glass <sjg@chromium.org>
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