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* Convert CONFIG_CONS_INDEX et al to KconfigTom Rini2021-12-27297-5/+451
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_CONS_INDEX CONFIG_DEBUG_UART_CLOCK CONFIG_FSL_TZPC_BP147 CONFIG_GENERIC_ATMEL_MCI CONFIG_IDENT_STRING CONFIG_LIBATA CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_LPC32XX_GPIO CONFIG_MP CONFIG_MPC8XXX_GPIO CONFIG_MTD_PARTITIONS CONFIG_MVGBE CONFIG_MXC_GPIO CONFIG_NR_DRAM_BANKS CONFIG_OF_BOARD_SETUP CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_OF_SYSTEM_SETUP CONFIG_PREBOOT CONFIG_ROCKCHIP_SERIAL CONFIG_RTC_ENABLE_32KHZ_OUTPUT CONFIG_RTC_MV CONFIG_SCSI_AHCI CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_SPEED CONFIG_SOFT_SPI CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_MACRONIX CONFIG_SPI_FLASH_MTD CONFIG_SPI_FLASH_SPANSION CONFIG_SPI_FLASH_SST CONFIG_SPI_FLASH_STMICRO CONFIG_SUPPORT_RAW_INITRD CONFIG_SYS_ARCH_TIMER CONFIG_SYS_BOARD CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE CONFIG_SYS_DCACHE_OFF CONFIG_SYS_FDT_SAVE_ADDRESS CONFIG_SYS_FLASH_CFI CONFIG_SYS_FSL_ERRATUM_ESDHC135 CONFIG_SYS_HAS_SERDES CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_LITTLE_ENDIAN CONFIG_SYS_LOAD_ADDR CONFIG_SYS_MMCSD_FS_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR CONFIG_SYS_NS16550 CONFIG_SYS_PLLFIN CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_TIMER_SYS_TICK_CH CONFIG_USB_EHCI_FSL CONFIG_U_QE CONFIG_VERSION_VARIABLE Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_SD_BOOT et al to KconfigTom Rini2021-12-2715-15/+14
| | | | | | | | This converts the following to Kconfig: CONFIG_SD_BOOT CONFIG_SD_BOOT_QSPI Signed-off-by: Tom Rini <trini@konsulko.com>
* Convert CONFIG_ENV_SPI_BUS et al to KconfigTom Rini2021-12-2782-178/+2
| | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_ENV_SPI_BUS CONFIG_ENV_SPI_CS CONFIG_ENV_SPI_MAX_HZ CONFIG_ENV_SPI_MODE As part of this, we use Kconfig to provide the defaults now that were done in include/spi_flash.h. We also in some cases change from using CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in use anyhow as ENV was not enabled. Signed-off-by: Tom Rini <trini@konsulko.com>
* Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in KconfigTom Rini2021-12-276-6/+0
| | | | | | | | This is a "hex" prompt but the default value was given as an int. Switch the default to hex (0x0) and remove the defconfigs that were using the default, but as hex before. Signed-off-by: Tom Rini <trini@konsulko.com>
* fdt: Enable OF_HAS_PRIOR_STAGE for most boards with OF_BOARDSimon Glass2021-12-2327-27/+0
| | | | | | | | | | | | | | Use this new Kconfig instead of OF_BOARD, so we know for sure which boards obtain their devicetree from a prior stage. Leave sandbox alone since it does not. Also don't touch xilinx_versal_virt since it does not have a specific TARGET Kconfig. This option implies OF_BOARD for now, but with future work standard passage may be used instead. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add rpi_4_32b and rpi_arm64 to the list of boards converted] Signed-off-by: Tom Rini <trini@konsulko.com>
* fdt: Make OF_BOARD a bool optionSimon Glass2021-12-233-0/+4
| | | | | | | | | | | This should not be a separate option from OF_SEPARATE. It is a run-time option to override the devicetree, even if present. Move the option out of the choice. Disable BINMAN_FDT for a few boards which don't actually use it. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: highbank: Add devicetree filesSimon Glass2021-12-231-0/+1
| | | | | | | Add an empty version of this file, so that we can at least build this board when devicetrees are required. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: qemu-ppce500: Add a devicetree fileSimon Glass2021-12-231-0/+1
| | | | | | | | | This uses QEMU virt which creates its own devicetree. Add an empty version of this file, so that we can at least build this board when devicetrees are required. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: bcm7xxx: Add a devicetree fileSimon Glass2021-12-232-0/+2
| | | | | | | | Add an empty devicetree file for these boards. It seems to be possible to obtain a real one from another bootloader called 'bolt' but I will leave this to the maintainer. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: xilinx_versal_virt: Add a devicetree fileSimon Glass2021-12-231-0/+1
| | | | | | | Add an empty file to prevent build errors when building with CONFIG_OF_SEPARATE enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: octeontx: Add an empty devicetree fileSimon Glass2021-12-234-0/+4
| | | | | | | | | | Add an empty file to prevent build errors when building with CONFIG_OF_SEPARATE enabled. Unfortunately there are no build instructions in the U-Boot tree to enable a real file to be created. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: xenguest_arm64: Add a empty devicetree fileSimon Glass2021-12-231-1/+1
| | | | | | | | | Add an empty version of this file, so that we can at least build this board when devicetrees are required. The real devicetree is created by the Xen project on-the-fly. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: vexpress: Add a devicetree files for junoSimon Glass2021-12-231-0/+1
| | | | | | | | | | | | | | | | | Sync these file, obtained from Linux v5.15. Add a note for the maintainer, and SPDX lines where they are missing. The added lines are: SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause Note, this matches the text in those files, but is not the same as the GPL-2.0 of some files. [1] https://releases.linaro.org/android/reference-lcr/juno/7.1-17.05/ Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* arm: rpi: Sync rpi dts files from LinuxSimon Glass2021-12-233-0/+3
| | | | | | | | | | | | | | | | Sync these files, obtained from Linux v5.15. This adds a devicetree file for rpi_4 which was not there before. Testing shows no change so far as I can see: - boots to U-Boot prompt on rpi0, rpi2 - boots to distro on rpi3 - boots to distro on rpi4 I am assuming that syncing with Linux is safe, but the maintainer should know for sure. Signed-off-by: Simon Glass <sjg@chromium.org>
* riscv: qemu: Split devicetree files for qemu_riscv32/64Simon Glass2021-12-236-2/+6
| | | | | | | | | | | This uses QEMU virt which creates its own devicetree. Copy the existing empty version of this file, so splitting the existing qemu-virt into two, since anyone actually trying to use this will need a different devicetree for 32- and 64-bit machines. Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: qemu: Add a devicetree file for qemu_arm64 virtSimon Glass2021-12-231-0/+1
| | | | | | | | | | This uses QEMU virt which creates its own devicetree. Add an empty version of this file, so that we can at least build this board when devicetrees are required. Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: qemu: Add a devicetree file for qemu_armSimon Glass2021-12-231-0/+1
| | | | | | | | | | This uses QEMU virt which creates its own devicetree. Add an empty version of this file, so that we can at least build this board when devicetrees are required. Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'v2022.01-rc4' into nextWIP/20Dec2021-nextTom Rini2021-12-205-2/+8
|\ | | | | | | Prepare v2022.01-rc4
| * Merge tag 'u-boot-stm32-20211213' of ↵WIP/13Dec2021Tom Rini2021-12-131-0/+2
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm - enable KSZ90x1 PHY driver on DHCOR - DHSOM boards: - increase USB power-good delay - add update_sf script to install U-Boot into SF - increase PHY auto-negotiation timeout to 20 seconds - fix SoM and board coding strap GPIO handling # gpg verification failed.
| | * ARM: stm32: Enable KSZ90x1 PHY driver on DHCORMarek Vasut2021-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable KSZ9x01 PHY driver in DHCOR common configuration, since the AV96 board has this PHY populated on the PCB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliasesAdam Ford2021-12-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The resync of the device trees from Linux 5.16-rc3 caused aliases to appear on the MMC devices which changed the numbering. This broke the reading/writing of the environmental variables, so update the defconfig accordingly. Signed-off-by: Adam Ford <aford173@gmail.com>
| * | riscv: Support booting SiFive Unmatched from SPI.Thomas Skibo2021-12-021-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Configure SPI flash devices into SPL. Add SPI boot option to spl.c. Document how to format flash for booting. Signed-off-by: Thomas Skibo <thomas-git@skibo.net> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
| * | riscv: Update Microchip MPFS Icicle Kit supportPadmarao Begari2021-12-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates Microchip MPFS Icicle Kit support. For now, add Microchip I2C driver, set environment variables for mac addresses and default build for SBI_V02. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
| * | configs: enable CMD_TPM on QEMU ARMHeinrich Schuchardt2021-11-302-0/+2
| |/ | | | | | | | | | | | | | | | | | | With TPM emulation enabled in u-boot-test-hooks we should also provide the tpm2 command used for the test/py/tests/test_tpm2.py test. One of the Python TPMv2 tests expects sandbox specific values. So disable it on other platforms. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* | arm: mvebu: maxbcm_defconfig: Enable DM_I2CStefan Roese2021-12-191-3/+1
| | | | | | | | | | | | | | Move to the DM I2C version, so that this board will not get dropped from mainline. Signed-off-by: Stefan Roese <sr@denx.de>
* | arm: mvebu: ds414_defconfig: Enable DM_I2CStefan Roese2021-12-191-3/+1
| | | | | | | | | | | | | | | | Move to the DM I2C version, so that this board will not get dropped from mainline. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Phil Sutter <phil@nwl.cc>
* | arm: mvebu: db-mv784mp-gp_defconfig: Enable DM_I2CStefan Roese2021-12-191-3/+1
| | | | | | | | | | | | | | Move to the DM I2C version, so that this board will not get dropped from mainline. Signed-off-by: Stefan Roese <sr@denx.de>
* | arm: mvebu: theadorable_debug_defconfig: Enable DM_I2CStefan Roese2021-12-191-3/+1
| | | | | | | | | | | | | | Move to the DM I2C version, so that this board will not get dropped from mainline. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge tag 'u-boot-at91-2022.04-a' of ↵Tom Rini2021-12-1715-0/+30
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2022.04 cycle: This feature set includes : support for the new QSPI hardware on sama7g5, small fixes on sam9x60 and sama7g5, some additions of commands and PIO controller on sam9x60/sam9x60ek.
| * | configs: at91: sam9x60ek: add CLK and GPIO commandsMihai Sain2021-11-223-0/+6
| | | | | | | | | | | | | | | | | | | | | Add clock command for CLK sub-system and gpio command for query and control gpio pins. Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
| * | configs: sama5d2 boards: add DM and GPIO commandsMihai Sain2021-11-2212-0/+24
| | | | | | | | | | | | | | | | | | | | | Add dm command for driver model low level access and gpio command for query and control gpio pins. Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
* | | sandbox: Drop CONFIG_SYS_TIMER_RATESimon Glass2021-12-051-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is not used by sandbox since it uses driver model for the timer. Drop it. Also update the tools_only build to avoid build errors, since it does actually build U-Boot too. Enable DM so we can use CONFIG_TIMER, disable EFI_LOADER to avoid an error about board_quiesce_devices() and disable NET to avoid having to define CONFIG_AVB_BUF_ADDR Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_KEYBOARD to KconfigSimon Glass2021-12-057-0/+7
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_KEYBOARD Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_SYS_BR0_PRELIM et al to KconfigTom Rini2021-12-0153-23/+561
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_SYS_BR0_PRELIM CONFIG_SYS_OR1_PRELIM CONFIG_SYS_BR1_PRELIM CONFIG_SYS_OR2_PRELIM CONFIG_SYS_BR2_PRELIM CONFIG_SYS_OR2_PRELIM CONFIG_SYS_BR3_PRELIM CONFIG_SYS_OR3_PRELIM CONFIG_SYS_BR4_PRELIM CONFIG_SYS_OR4_PRELIM CONFIG_SYS_BR5_PRELIM CONFIG_SYS_OR5_PRELIM CONFIG_SYS_BR6_PRELIM CONFIG_SYS_OR6_PRELIM CONFIG_SYS_BR7_PRELIM CONFIG_SYS_OR7_PRELIM This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms that can set these values do so. Add the relevant SYS_BRx_PRELIM_BOOL to platforms that had not been previously migrated. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Convert CONFIG_USE_BOOTCOMMAND et al to KconfigTom Rini2021-12-01461-101/+768
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_USE_BOOTCOMMAND CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND CONFIG_NFSBOOTCOMMAND Signed-off-by: Tom Rini <trini@konsulko.com>
* | | configs: stm32mp15: deactivate the CONFIG_STM32_IPCCPatrick Delaunay2021-11-309-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IPCC mailbox is only used for communication with M4 firmware but it is not used in the stm32 remoteproc driver; it was planed but the support of this mailbox in remoteproc for STM32MP15x is dropped. So the associated drivers and config CONFIG_STM32_IPCC can be deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be also deactivated as the mailbox UCLASS is no more used. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | | board: stm32mp1: enable simple framebuffer node for splashscreenPatrick Delaunay2021-11-303-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable an existing simple framebuffer node in the Linux kernel device tree and the add the associated reserved memory node to preserved the resources (clock, memory) used by the stm32 video driver to display the splashscreen = background in exlinux.conf file. These resources will be released by the Linux driver only when the associated driver is ready to avoid transition issues during the Linux kernel initialization between U-Boot splash screen and the final display. See Linux documentation for details: Documentation/devicetree/bindings/display/simple-framebuffer.yaml Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | | Convert CONFIG_LCD_DT_SIMPLEFB to KconfigPatrick Delaunay2021-11-309-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_LCD_DT_SIMPLEFB This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com>
* | | ARM: stm32: Enable KSZ90x1 PHY driver on DHCORMarek Vasut2021-11-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable KSZ9x01 PHY driver in DHCOR common configuration, since the AV96 board has this PHY populated on the PCB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | Merge tag 'v2022.01-rc3' into nextTom Rini2021-11-291-1/+1
|\ \ \ | | |/ | |/| | | | | | | | | | Prepare v2022.01-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
| * | Merge tag 'xilinx-for-v2022.01-rc3' of ↵WIP/16Nov2021Tom Rini2021-11-161-1/+1
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.01-rc3 sdhci: - Fix emmc mini case with missing firmware interface zynqmp: - Restore JTAG interface if required - Allow overriding board name - Add support for DLC21 - Fix one fallthrought statement description - Use config macro instead of name duplication - Save multiboot to variable firmware: - Handle ipi_req errors better - Use local buffer in case user doesn't need it instead of NULL/0 location spi: - gqsi: Fix write issue at low frequencies net: - gem: Disable broadcasts
| | * arm64: zynqmp: Add support for DLC21 (Smartlynq+) boardMichal Simek2021-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | DLC21 is used as fast jtag cable. The patch adds support for this board from PS perspective. The most interesting part on the board is seps525 oled display. Also i2c, gpio, ethernet, uart, SD and eMMC are tested. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3d35cd6a11cffc7456e21a88b214cc965734e852.1634231268.git.michal.simek@xilinx.com
* | | sandbox: Enable HEXDUMP for sandbox_flattreeSimon Glass2021-11-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | At present the hexdump tests are disabled in sandbox_flattree. This is good, because they do not pass. Enable the required Kconfig so that they will, when enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | stm32mp15: deactivate CONFIG_SCMI_AGENT_MAILBOXPatrick Delaunay2021-11-232-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Deactivate the SCMI agent mailbox which is not used on STM32MP15 platforms. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
* | | net: phy: realtek: Add tx/rx delay config for 8211eSamuel Holland2021-11-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards need to change the tx/rx delay config in order for gigabit Ethernet to work. In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config"), Realtek documented the bits for overriding the delays from the hardware straps. Copy the logic from linux, so the delay config is set from the PHY's interface type (the phy-mode property in the device tree). This removes the need for a one-off workaround for the Pine A64+ board. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* | | configs: ls1021a-tsn: enable the generation of random Ethernet MAC addressesVladimir Oltean2021-11-232-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Don't fail when booting a board with an empty EEPROM for MAC addresses. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | configs: ls1021a-tsn: enable sja1105 switch driverVladimir Oltean2021-11-232-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The sja1105 is a 5-port switch that uses a DM_DSA driver. Its 5th (CPU) port is connected internally to the eth2 port of the LS1021A SoC. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | configs: am64x_evm_*_defconfig: Add configs to enable serdes for USB 3.0 supportWIP/2021-11-17-assorted-driver-platform-updatesAswath Govindraju2021-11-172-0/+28
| | | | | | | | | | | | | | | | | | Add configs to enable serdes for USB 3.0 support. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
* | | configs: ast2600: Boot kernel FIT in DRAMChia-Wei Wang2021-11-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 leverages the FIT hash/signature verification to fulfill secure boot trust chain. To improve the performance and save SW code size for those crypto operations, the two HW crypto engine, HACE and ACRY, are enabled. However, both of the engines can only access to data stored in DRAM space. Therefore, we need to move the FIT image into DRAM before the booting. This patch update the CONFIG_BOOTCOMMAND to execute the pre-defined ENV variable which consists of FIT image copy to memory and booting. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
* | | configs: ast2600-evb: Enable SPL FIT supportChia-Wei Wang2021-11-171-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPL FIT image load and verification support. The HW accelerated SHA is also available with the newly added support of the HACE HW hash engine. The SPL thumb build is also enabled to keep the binary less than 64KB to fit into the Aspeed secure boot design. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au>
generated by cgit (git 2.34.1) at 2025-03-03 10:28:14 +0000