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path: root/drivers/clk/sunxi
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* clk: sunxi: add EMAC and EPHY clocks and resets for the V3s SoCMichael Walle2024-07-151-0/+6
* Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"WIP/20May2024-nextTom Rini2024-05-2015-15/+0
* Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini2024-05-1915-0/+15
* clk: Remove <common.h> and add needed includesTom Rini2024-05-0715-15/+0
* sunxi: add Allwinner R528/T113 SoC supportAndre Przywara2023-10-221-0/+1
* clk: sunxi: Add support for the D1 CCUSamuel Holland2023-10-224-0/+96
* clk: sunxi: Add NAND clocks and resetsSamuel Holland2023-04-2811-0/+43
* clk: sunxi: Add DE2 display-related clocks/resetsSamuel Holland2023-01-237-0/+141
* reset: sunxi: Reuse the platform data from the clock driverSamuel Holland2022-07-181-1/+6
* clk: sunxi: Convert driver private data to platform dataSamuel Holland2022-07-181-17/+24
* clk: sunxi: Use a single driver for all variantsSamuel Holland2022-07-1816-276/+137
* reset: sunxi: Get the reset count from the CCU descriptorSamuel Holland2022-07-1816-95/+20
* clk: sunxi: Prevent out-of-bounds gate array accessSamuel Holland2022-07-181-2/+5
* clk: sunxi: Store the array sizes in the CCU descriptorSamuel Holland2022-07-1815-0/+32
* clk: sunxi: Add additional RTC compatible stringsSamuel Holland2022-06-261-0/+2
* clk: sunxi: add and use dummy gate clocksAndre Przywara2022-05-244-0/+9
* clk: sunxi: add PIO bus gate clocksAndre Przywara2022-05-2412-0/+28
* clk: sunxi: h6_r: Correct the driver nameSamuel Holland2022-05-241-2/+2
* clk: sunxi: implement clock driver for suniv f1c100sGeorge Hilliard2022-05-233-0/+82
* clk: sunxi: Extend DM_RESET selection to SPLSamuel Holland2021-10-251-0/+1
* clk: sunxi: Add drivers for A31 and H6 PRCM CCUsSamuel Holland2021-10-114-0/+136
* clk: sunxi: Add support for I2C gates/resetsSamuel Holland2021-10-1112-0/+86
* clk: sunxi: Move header out of arch directorySamuel Holland2021-10-1113-13/+13
* clk: sunxi: h6: Add XHCI clocksSamuel Holland2021-04-161-0/+2
* clk: sunxi: Add a dummy clock driver for the RTCSamuel Holland2021-04-162-0/+37
* clk: sunxi: Add support for H616 clocksJernej Skrabec2021-01-253-0/+128
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1311-11/+11
* clk: sunxi: add compatible string for V3Icenowy Zheng2020-11-171-0/+2
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-1812-0/+12
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* sunxi: clocks: Add H6 USB clock gates and resetsAndre Przywara2019-07-161-0/+29
* clk: sunxi: r40: Fix GMAC reset reg offsetJagan Teki2019-04-161-1/+2
* clk: sunxi: a10: Add CLK_AHB_GMACJagan Teki2019-04-011-0/+2
* clk: sunxi: h3: Implement EPHY CLK and RESETJagan Teki2019-03-091-0/+4
* clk: sunxi: Implement EMAC, GMAC clocks, resetsJagan Teki2019-03-096-0/+15
* clk: sunxi: Implement A10 EMAC clocksJagan Teki2019-03-092-0/+2
* clk: sunxi: Implement SPI clocks, resetsJagan Teki2019-03-0411-0/+97
* sunxi: clk: enable clk and reset for CCU devicesAndre Przywara2019-01-301-0/+12
* sunxi: clk: A80: add MMC clock supportAndre Przywara2019-01-291-1/+27
* sunxi: clk: add MMC gates/resetsAndre Przywara2019-01-2911-0/+63
* clk: sunxi: Add Allwinner A80 CLK driverJagan Teki2019-01-183-0/+65
* clk: sunxi: Add Allwinner H6 CLK driverJagan Teki2019-01-183-0/+61
* clk: sunxi: Implement UART resetsJagan Teki2019-01-187-0/+43
* clk: sunxi: Implement UART clocksJagan Teki2019-01-189-0/+57
* clk: sunxi: Add Allwinner V3S CLK driverJagan Teki2019-01-183-0/+59
* clk: sunxi: Add Allwinner R40 CLK driverJagan Teki2019-01-183-0/+78
* clk: sunxi: Add Allwinner A83T CLK driverJagan Teki2019-01-183-0/+71
* clk: sunxi: Add Allwinner A23/A33 CLK driverJagan Teki2019-01-183-0/+71
* clk: sunxi: Add Allwinner A31 CLK driverJagan Teki2019-01-183-0/+76
* clk: sunxi: Add Allwinner A10s/A13 CLK driverJagan Teki2019-01-183-0/+64
generated by cgit (git 2.34.1) at 2025-02-25 10:19:38 +0000