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| * | | ddr: fsl: Fix fsl_ddr_sdram_size() for 4GB modules with 32-bit phys_size_tPali Rohár2022-09-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function fsl_ddr_compute() always return size in unsigned long long type, but function fsl_ddr_sdram_size() returns size in phys_size_t type. When 36-bit addressing mode is not enabled then phys_size_t type is only 32-bit and thus it cannot store value 4GB (0x100000000). Function fsl_ddr_sdram_size() in this case returns truncated value 0x0. Fix this issue by returning the highest representable value, which is 0xffffffff (4GB - 1 byte). This change fixes crashing of proper U-Boot because it detected 4 GB module as RAM with zero size. Signed-off-by: Pali Rohár <pali@kernel.org>
| * | | ddr: fsl: Fix checking for maximal mappable memoryPali Rohár2022-09-231-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check needs to be done against CONFIG_MAX_MEM_MAPPED macro and not fixed size 4GB (as CONFIG_MAX_MEM_MAPPED can be lower and for example for e500 cores it is just 2GB). Also fix printf re-align, which should be applied only for non-SPL builds, during init_dram() call. Signed-off-by: Pali Rohár <pali@kernel.org>
| * | | cpu: add basic cpu driver for MediaTek ARM chipsWeijie Gao2022-09-232-0/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic CPU driver used to retrieve CPU model information. Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | clk: mediatek: add clock driver support for MediaTek MT7981 SoCWeijie Gao2022-09-232-0/+684
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock driver support for MediaTek MT7981 SoC Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | clk: mediatek: add clock driver support for MediaTek MT7986 SoCWeijie Gao2022-09-232-0/+673
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock driver support for MediaTek MT7986 SoC Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | clk: mediatek: add CLK_XTAL support for clock driverWeijie Gao2022-09-232-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the CLK_XTAL macro/flag to allow modeling clocks which are directly connected to the xtal clock. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | clk: mediatek: add infrasys clock mux supportWeijie Gao2022-09-232-1/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds infrasys clock mux support for mediatek clock drivers. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | clk: mediatek: add support to configure clock driver parentWeijie Gao2022-09-232-33/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for a clock node to configure its parent clock where possible. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock ↵Weijie Gao2022-09-232-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | parent of xtal clock The mtk clock framework in u-boot uses array index for searching clock parent (kernel uses strings for search), so we need to specify a special clock with ID=0 for CLK_XTAL in u-boot. In the mt7622/mt7629 clock tree, the clocks with ID=0 never call mtk_topckgen_get_mux_rate, adn return xtal clock directly. This what we expected. However for newer chips, they may have some clocks with ID=0 not representing the xtal clock and still needs mtk_topckgen_get_mux_rate be called. Current logic will make entire clock driver not working. This patch adds a flag to indicate that whether a clock driver needs clocks with ID=0 to call mtk_topckgen_get_mux_rate. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | pinctrl: mediatek: add pinctrl driver for MT7986 SoCWeijie Gao2022-09-233-0/+780
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl and gpio support for MT7986 SoC Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | pinctrl: mediatek: add pinctrl driver for MT7981 SoCWeijie Gao2022-09-233-0/+1054
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl and gpio support for MT7981 SoC Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | i2c: add support for MediaTek I2C interfaceWeijie Gao2022-09-233-0/+832
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MediaTek I2C interface Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | spi: add support for MediaTek spi-mem controllerWeijie Gao2022-09-233-0/+710
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for spi-mem controller found on newer MediaTek SoCs This controller supports Single/Dual/Quad SPI mode. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
| * | | watchdog: mediatek: add support for MediaTek MT7986 SoCWeijie Gao2022-09-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add watchdog support for MediaTek MT7986 SoC Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | timer: mtk: add support for MediaTek MT7981/MT7986 SoCsWeijie Gao2022-09-231-22/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add general-purpose timer support for MediaTek MT7981/MT7986. These two SoCs uses a newer version of timer with its register definition slightly changed. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | pwm: mtk: add support for MediaTek MT7981 SoCWeijie Gao2022-09-231-2/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds PWM support for MediaTek MT7981 SoC. MT7981 uses a different register offset so we have to add a version field to indicate the IP core version. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | pwm: mtk: add support for MediaTek MT7986 SoCWeijie Gao2022-09-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds PWM support for MediaTek MT7986 SoC. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | serial: mtk: add support for using dynamic baud clock souceWeijie Gao2022-09-231-33/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The baud clock on some platform may change due to assigned-clock-parent set in DT. In current flow the baud clock is only retrieved during probe stage. If the parent of the source clock changes after probe stage, the setbrg will set wrong baudrate. To get the right clock rate, this patch records the baud clk struct to the driver's priv, and changes the driver's flow to get the clock rate before calling _mtk_serial_setbrg(). Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | net: mediatek: add support for MediaTek MT7981/MT7986Weijie Gao2022-09-232-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MediaTek MT7981 and MT7986. Both chips uses PDMA v2. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | net: mediatek: add support for PDMA v2Weijie Gao2022-09-232-21/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for PDMA v2 hardware. The PDMA v2 has extended the DMA descriptor to 8-words, and some of its fields have changed comparing to the v1 hardware. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | | net: mediatek: stop using bitfileds for DMA descriptorsWeijie Gao2022-09-232-96/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a preparation for adding a new version of PDMA of which the DMA descriptor fields has changed. Using bitfields will result in a complex modification. Convert bitfields to u32 units can solve this problem easily. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
| * | | net: mediatek: use a struct to cover variations of all SoCsWeijie Gao2022-09-232-17/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using a single soc id to control different initialization and TX/RX flow for all SoCs is not extensible if more hardware variations are added in the future. This patch introduces a struct to replace the original mtk_soc to allow the driver be able handle newer hardwares. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
| * | | mmc: mediatek: add support for MediaTek MT7891/MT7986 SoCsWeijie Gao2022-09-231-15/+53
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | Add eMMC and SDXC support for MediaTek MT7981/MT7986 SoCs Both chips support SDXC and eMMC 4.5. MT7986A supports eMMC 5.1. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | Merge branch 'next' of ↵WIP/20Sep2022-nextTom Rini2022-09-202-12/+96
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-marvell into next - Enable CONFIG_TIMER for all Kirkwood / MVEBU boards (Stefan) - u-boot-spl.kwb/SPL: Add / improve size limit setup / detection (Pali) - mvebu: theadorable: Misc updates in defconfig und dts (Stefan)
| | * | timer: orion-timer: Add timer_get_boot_us() for BOOTSTAGE supportStefan Roese2022-09-201-19/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE enabled, like pogo_v4. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Tony Dinh <mibodhi@gmail.com>
| | * | timer: orion-timer: Add support for other Armada SoC'sStefan Roese2022-09-202-4/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for other Marvell Armada SoC's, supporting the 25MHz fixed clock operation, like the Armada XP etc. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Tony Dinh <mibodhi@gmail.com>
| * | | Merge tag 'u-boot-at91-2023.01-a' of ↵Tom Rini2022-09-204-21/+135
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2023.01 cycle: This feature set includes the important update on PIO4 pinctrl driver that solves a long time mismatch between Linux and U-boot, related on the unification of pinctrl and gpio driver support, now respecting the pinctrl bindings ABI; and also support for pinctrl subnodes. The feature set also adds support for PDA screen detection for sam9x60_curiosity board , one fix for SD-Card reinsertion and one fix for sam9x60 clocks.
| | * | pinctrl: at91-pio4: Add support for pinctrl config subnodesSergiu Moga2022-09-191-12/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, in order for the `pinctrl-*` DT node properties to be properly processed, the pinctrl's subnodes were limited to only having the `pinmux` property as well as other additional properties (slew-rate, bias-disable, etc.). Now, with this patch the pinctrl driver is made to work similarly to the one from Linux. It can now distinguish between one subnode and a subnode with multiple subnodes. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
| | * | pinctrl: at91-pio4: Bind GPIO driver to the pinctrl DT nodeSergiu Moga2022-09-192-7/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has been done in order to align the DT of U-Boot with the DT of Linux. In Linux, a phandle from a '-gpio' DT property is linked to the pinctrl driver, a single driver that handles both pinctrl settings and offers GPIO API to callers. On the other hand, U-Boot redirects such phandle to a corresponding UCLASS_GPIO driver, because U-Boot offers two different types of drivers in this case: UCLASS_PINCTRL which handles pin functions and UCLASS_GPIO which handles gpio requests as a gpio provider. Due to this, we have two drivers in Uboot, but the Devicetree has a single node. Thus, just one of the drivers can be probed for the DT node during platform initialization, before relocation. Our previous solution in U-Boot was to have a different devicetree: the gpio node has a subnode for the pinctrl driver, which is not compliant with Linux ABI. Furthermore, our documentation for this type of nodes mentions no such gpio compatible. After this patch, we can no longer add nodes with a gpio compatible in the DT. Thus, in order to link the pinctrl driver to the gpio one, a hook to the bind method of the former in U-Boot has been added and the GPIO related compatibles have been removed to avoid conflict when compatibles are enumerated and bound to drivers during platform start before relocation. The bind method will attach the GPIO driver to the pinctrl DT node so that every phandle coming from '-gpio' DT properties will be redirected to a valid driver attached to the pinctrl DT node. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
| | * | clk: at91: sam9x60: change parent clock from mck_pres to mck_divMihai Sain2022-09-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ddrck and qspick should have mck_div as parent clocks to be in sync with linux driver. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
| | * | mmc: atmel_sdhci: re-enable sdhci after SD Card re-insertionSergiu Moga2022-09-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whenever the SD Card would be removed and then re-inserted while in the U-Boot command line, the `SDBPWR` bit of the `SDMMC_PCR` register would remain unset afterwards. In order for the bit to be set again after re-insertion, register an additional `deferred_probe` method that the DM would then transparently call. This method will call the generic `sdhci_probe` which will, during its execution flow, set this bit to 1. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reported-by: Mihai Sain <mihai.sain@microchip.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
| * | | Merge branch 'master' into nextTom Rini2022-09-1934-588/+865
| |\ \ \ | | |/ / | |/| | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | cyclic: Use schedule() instead of WATCHDOG_RESET()Stefan Roese2022-09-1847-111/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Globally replace all occurances of WATCHDOG_RESET() with schedule(), which handles the HW_WATCHDOG functionality and the cyclic infrastructure. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
| * | | watchdog: Integrate watchdog triggering into the cyclic frameworkStefan Roese2022-09-182-32/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch integrates the watchdog triggering into the recently added cyclic infrastructure. Each watchdog device that shall be triggered registers it's own cyclic function. This way, multiple watchdog devices are still supported, each via a cyclic function with separate trigger intervals. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
| * | | blk: Drop if_typeWIP/2022-09-16-rationalize-the-block-interfaceSimon Glass2022-09-162-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the uclass ID instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | blk: Switch over to using uclass IDsSimon Glass2022-09-1618-71/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently have an if_type (interface type) and a uclass id. These are closely related and we don't need to have both. Drop the if_type values and use the uclass ones instead. Maintain the existing, subtle, one-way conversion between UCLASS_USB and UCLASS_MASS_STORAGE for now, and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Rewrite if_type to name functionsSimon Glass2022-09-161-18/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are currently using a simple array lookup in one direction, and relying on if_type being sequential. With the move to uclass IDs this needs to change. Update the code to prepare for the new way. This patch is intended to introduce no functional change. The returning of "(none)" from blk_get_if_type_name() is handling a case that should not happen in either case. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Rename var in blk_get_devnum_by_typename()Simon Glass2022-09-161-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we use a variable with the same name as the enum. Change this since we plan to #define the enum to uclass_id. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Drop IF_TYPE_SDSimon Glass2022-09-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is not really needed since it does the same things as MMC. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Drop IF_TYPE_ATAPISimon Glass2022-09-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is not really needed since it does the same things as IDE. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | ide: Use a flag for an ATAPI deviceSimon Glass2022-09-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than setting a different interface type, use a flag to indicate that a device is ATAPI. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Drop IF_TYPE_DOCSimon Glass2022-09-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This doesn't seem to be used for anything and it isn't clear what it is. It dates from the first U-Boot commit. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Hide the BLK and SPL_LEGACY_BLOCK optionsSimon Glass2022-09-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't want boards to be able to change these. They can be handled as dependencies of options that need them, such as SPL_MMC. There is no point in enabling the block interface without any storage devices to create a block device. Hide both options from the 'menuconfig' display and deny their use in defconfig files. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Select SPL_LEGACY_BLOCK automaticallySimon Glass2022-09-166-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Selecting this option can be handled in the Kconfig option itself, as it is with BLK. Update this an drop the various 'select' clauses. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Rename HAVE_BLOCK_DEVICESimon Glass2022-09-168-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option is fact really related to SPL. For U-Boot proper we always use driver model for block devices, so CONFIG_BLK is enabled if block devices are in use. It is only for SPL that we have two cases: - SPL_BLK is enabled, in which case we use driver model and blk-uclass.c - SPL_BLK is not enabled, in which case (if we need block devices) we must use blk_legacy.c Rename the symbol to SPL_LEGACY_BLOCK to make this clear. This is different enough from BLK and SPL_BLK that there should be no confusion. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Drop unnecessary #ifdef in in blk_legacySimon Glass2022-09-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | We can rely on the compiler to eliminate any dead code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Use a function for whether block devices are availableSimon Glass2022-09-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present we use HAVE_BLOCK_DEVICE to indicate when block devices are available. This is a very strange option, since it partially duplicates the BLK option used by driver model. It also covers both U-Boot proper and SPL, even though one might have block devices and another not. As a first step towards correcting this, create a new inline function called blk_enabled() which indicates if block devices are available. This cannot be used in Makefiles, or #if clauses, but can be used in C code. A function is useful because we cannot use CONFIG_IS_ENABLED(BLK) to decide if block devices are needed, since we must consider the legacy block interface, enabled by HAVE_BLOCK_DEVICE Update a few places where it can be used and drop some unnecessary #if checks around some functions in disk/part.c - rely on the compiler's dead-code elimination instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | disk: Use Makefile to omit partition driversSimon Glass2022-09-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present these files have an #ifdef covering the whole file. Move the condition to the Makefile instead. Add BLK to the condition since future patches will adjust things so that HAVE_BLOCK_DEVICE is only for SPL, but the partition drivers are needed in U-Boot proper too. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | ata: Fix an instance of SPL_SATA_SUPPORTSimon Glass2022-09-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The _SUPPORT suffix should be dropped. This happened because the rename was applied around the same time as this new option, so did not include renaming the new option. The relevant commits are: f7560376ae sata: Rename SATA_SUPPORT to SATA 73059529b2 ata: ahci-pci: Add new option CONFIG_SPL_AHCI_PCI Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | blk: Enable CONFIG_BLK for all mediaSimon Glass2022-09-165-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable this option on all boards which support block devices. Drop the related depencies on BLK since these are not needed anymore. Disable BLOCK_CACHE on M5253DEMO as this causes a build error. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-03-04 00:35:39 +0000