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* ata: Migrate CONFIG_LIBATA to KconfigTuomas Tynkkynen2017-12-121-0/+11
| | | | | | | | This symbol enables some library code used by various SATA drivers, so make this a non-user-visible symbol select'ed by the respective drivers, and let moveconfig handle the rest. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SCSI_AHCI to KconfigTuomas Tynkkynen2017-12-121-0/+5
| | | | | | And use 'imply' liberally. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_DWC_AHSATA to KconfigTuomas Tynkkynen2017-12-121-0/+6
| | | | Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_FSL_SATA to KconfigTuomas Tynkkynen2017-12-121-0/+6
| | | | | | | Use 'imply' here liberally to avoid the combinatorial explosion of defconfig changes in the PowerPC boards. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SATA_MV to KconfigTuomas Tynkkynen2017-12-121-0/+6
| | | | Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SATA_SIL3114 to KconfigTuomas Tynkkynen2017-12-121-0/+5
| | | | Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Migrate CONFIG_SATA_SIL to KconfigTuomas Tynkkynen2017-12-121-0/+6
| | | | | | | Use 'imply' here liberally to avoid the combinatorial explosion of defconfig changes in the PowerPC boards. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Drop CONFIG_MX51_PATATuomas Tynkkynen2017-12-122-130/+0
| | | | | | | The last user of this driver went away in August 2015 in commit: b6073fd2115 ("arm: Remove mx51_efikamx, mx51_efikasb boards") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* ata: Drop CONFIG_SATA_DWCTuomas Tynkkynen2017-12-123-2536/+0
| | | | | | | The last user of this driver went away in June 2017, in commit: 98f705c9ce ("powerpc: remove 4xx support") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* gpio/hsdk: Depend on DM_GPIO instead of simple DMAlexey Brodkin2017-12-121-1/+1
| | | | | | | | | | | | | | | | This driver really is DM GPIO one and so we need to have a correct dependency, because DM alone doesn't provide required for CMD_GPIO call and we're seeing build failures like this: ---------------------->8--------------------- cmd/built-in.o: In function 'do_gpio': .../cmd/gpio.c:188: undefined reference to 'gpio_request' ... ---------------------->8--------------------- Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-uniphierTom Rini2017-12-111-4/+3
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| * mtd: nand: denali: make NAND_DENALI unconfigurable optionMasahiro Yamada2017-12-121-4/+3
| | | | | | | | | | | | | | | | | | | | denali.c has no driver entry in itself. It makes sense only when compiled together with denali_dt.c Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from the Kconfig menu. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARC: clk: introduce HSDK CGU clock driverEugeniy Paltsev2017-12-113-0/+571
|/ | | | | | | | | | | | | | Synopsys HSDK clock controller generates and supplies clocks to various controllers and peripherals within the SoC. Each clock has assigned identifier and client device tree nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device tree sources. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-12-079-484/+534
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| * driver: fsl-mc: MC object cleanup when DPL not loadedYogesh Gaur2017-12-061-1/+2
| | | | | | | | | | | | | | | | For case when MC is loaded but DPL is not deployed perform MC object [DPBP, DPIO, DPNI and DPRC] cleanup. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: fsl-mc: flib changes for MC 10.3.0Yogesh Gaur2017-12-069-483/+532
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing MC driver framework is based on MC-9.x.x flib. This patch migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib which is MC-10.3.0. Changes introduced due to migration: 1. To get OBJ token, pair of create and open API replaces create APIs 2. Pair of close and destroy APIs replaces destroy APIs 3. For version read, get_version APIs replaces get_attributes APIs 4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs 5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct 6. Single API dpni_get_buffer_layout/set_buffer_layout replaces dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs. New API takes a queue type as an argument. 7. Similarly dpni_get_queue/set_queue replaces dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related APIs Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | i2c: at91_i2c: remove the .probe_chip functionAlan Ott2017-12-071-22/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .probe_chip function is supposed to probe an i2c device on the bus to determine whether a device is answering to a particular address. at91_i2c_probe_chip() did not do anything resembling this and always returned 0. It looks as though at91_i2c_probe_chip() was intended to be a .probe function for the controller, as it was copied-and-pasted to become at91_i2c_probe() in 0bc8f640a4d7ed. Removing the at91_i2c_probe_chip() function makes the higher layer (i2c_probe_chip()) try a zero-length read transfer to test for the presence of a device instead, which does work. Signed-off-by: Alan Ott <alan@softiron.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | i2c: at91_i2c: Wait for TXRDY after sending the first byteAlan Ott2017-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | The driver must wait for TXRDY after each byte is pushed into the i2c FIFO before pushing the next byte. Previously this was not done for the first byte, causing a race condition with zeros sometimes being sent for the next byte (which is typically the first actual data byte). Signed-off-by: Alan Ott <alan@softiron.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | i2c: meson: add some commentsBeniamino Galvani2017-12-071-6/+19
| | | | | | | | | | | | | | | | | | Add some comment describing the purpose of struct members and functions. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | i2c: meson: fix return codes on errorBeniamino Galvani2017-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | Change meson_i2c_xfer_msg() to return -EREMOTEIO in case of NACK, as done by other drivers. Also, don't change the return error in meson_i2c_xfer(). Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | i2c: meson: reduce timeoutBeniamino Galvani2017-12-071-1/+1
| | | | | | | | | | | | | | | | | | The datasheet doesn't specify a suggested timeout and 500ms seems very long: reduce it to 100ms. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | i2c: meson: improve Kconfig descriptionBeniamino Galvani2017-12-071-1/+6
|/ | | | | | | | Expand the Kconfig description with hardware features. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* Merge git://git.denx.de/u-boot-uniphierTom Rini2017-12-0418-48/+22
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| * mtd: nand: denali: consolidate include directivesMasahiro Yamada2017-12-041-3/+3
| | | | | | | | | | | | | | | | | | Include necessary headers explicitly without relying on indirect header inclusion. <common.h>, <malloc.h> are unneeded. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mtd: nand: denali_dt: replace printf() with pr_err()Masahiro Yamada2017-12-041-2/+2
| | | | | | | | | | | | | | The Linux derived log functions can be used anywhere and easily turned on/off by CONFIG_LOGLEVEL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mtd: nand: Rename nand.h into rawnand.hMasahiro Yamada2017-12-0416-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This header was renamed to rawnand.h in Linux. The following is the corresponding commit in Linux. commit d4092d76a4a4e57b65910899948a83cc8646c5a5 Author: Boris Brezillon <boris.brezillon@free-electrons.com> Date: Fri Aug 4 17:29:10 2017 +0200 mtd: nand: Rename nand.h into rawnand.h We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mtd: nand: denali: remove ad-hoc board_nand_init() entryMasahiro Yamada2017-12-041-26/+0
| | | | | | | | | | | | | | This driver is highly dependent on the configuration from denali_dt.c Please enable CONFIG_NAND_DENALI_DT if you use this driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mtd: nand: denali: remove bogus __maybe_unusedMasahiro Yamada2017-12-041-1/+1
| | | | | | | | | | | | | | | | denali_setup_data_interface() is always used. I put __maybe_unused for a temporal use, then forgot to delete it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge git://git.denx.de/u-boot-cfi-flashTom Rini2017-12-041-3/+9
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| * | mtd: cfi: Fix checking status register featureYork Sun2017-12-041-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 72443c7f7d21 ("mtd: cfi: Add support for status register polling") added a feature check to determine if status register is available for certain flash chips. The "lower software bits" register used to determine this feature is not backward compati- ble. Older flash chips without this feature has reserved value 0xff. Instead of checking "lower software bits" register, use CFI primary vendor-specific extended query. Since CFI version 1.4, software features can be read from offset 0x53 according to document AN201168 from Cypress. Signed-off-by: York Sun <york.sun@nxp.com> CC: Marek Vasut <marek.vasut@gmail.com> Tested-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | drivers: firmware: psci: use pr_* log functions instead of printf()Masahiro Yamada2017-12-041-3/+4
| |/ |/| | | | | | | | | | | | | | | In Linux, the warning messages are printed out by pr_warn(). We can use Linux-like log functions in tree-wide. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | rockchip: rk3128: add sdram driverKever Yang2017-11-302-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3128: add pinctrl driverKever Yang2017-11-303-2/+199
| | | | | | | | | | | | | | | | Add rk3128 pinctrl driver and grf/iomux structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | rockchip: rk3128: add clock driverKever Yang2017-11-302-1/+598
| | | | | | | | | | | | | | | | Add rk3128 clock driver and cru structure definition. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini2017-11-309-6/+423
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| * | gpio: rmobile: Set GPIO mode in GPSR when requestedMarek Vasut2017-11-301-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | When requesting a GPIO, set the PFC GPSR register to GPIO mode, otherwise the GPIO cannot work. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | pfc: rmobile: Add hook to configure pin as GPIOMarek Vasut2017-11-302-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | Add hook into the PFC driver to allow the GPIO driver to toggle GPSR registers into GPIO mode when GPIO is requested. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | pinctrl: rmobile: Add support for setting single pinsMarek Vasut2017-11-301-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | Add code to handle single pins nodes from DT in addition to already support groups handling. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | net: ravb: Fix reset GPIO handlingMarek Vasut2017-11-301-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix handling of the reset GPIO. Drop the _nodev() suffix from the gpio_request_by_name() call as there is now a proper DM capable GPIO driver. Also check if the GPIO is valid before freeing it in remove path, otherwise U-Boot will crash. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | i2c: rcar_iic: Add RCar IIC driverMarek Vasut2017-11-303-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for the RCar IIC or DVFS I2C controller. This driver is based on the SH I2C driver, but supports DM and DT probing as well as modern I2C framework API. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | serial: sh: Unify R8A7795 and R8A7796 as Gen3Marek Vasut2017-11-301-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unify the CONFIG_R8A7795 and CONFIG_R8A7796 as CONFIG_RCAR_GEN3 so that every time we add a new SoC, we won't have to add more stuff to this list. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | clk: rmobile: Add R8A7796 xHCI clockMarek Vasut2017-11-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add xHCI entry into the clock tables, so that the xHCI USB driver can enable the clock for the xHCI block via clock framework. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | clk: rmobile: Move preboot clock shutdown to the driverMarek Vasut2017-11-301-0/+59
| |/ | | | | | | | | | | | | | | | | | | | | The MSTP registers were poked in boards/renesas/rcar-common/common.c in arch_preboot_os hook thus far to shut down the clock before Linux takes over. With DM, this is no longer needed and we can do the same in the clock driver .remove callback. This patch adds such a .remove callback for R8A7795 and R8A7796. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2017-11-301-0/+2
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| * | fix: nand: pxa3xx: fix defined but not used warningsSean Nyekjaer2017-11-301-0/+2
| |/ | | | | | | | | | | | | | | bbt_mirror_descr and bbt_main_descr is defined but not used when compiling without CONFIG_SYS_NAND_USE_FLASH_BBT set. Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Stefan Roese <sr@denx.de>
* | mmc: atmel_sdhci: not on capabilities to set gck rateLudovic Desroches2017-11-291-10/+2
| | | | | | | | | | | | | | | | | | | | | | The capabilities have default values which doesn't reflect the reality when it concerns the base clock and the mul value. Use a fixe rate for the gck. 240 MHz is an arbitrary choice, it is a multiple of the maximum SD clock frequency handle by the controller and it allows to get a 400 kHz clock for the card initialisation. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* | clk: at91: clk-generated: fix incorrect index of clk sourceWenyou Yang2017-11-291-6/+8
| | | | | | | | | | | | | | | | Differentiate the generic clock source selection value from the parent clock index to fix the incorrect assignment of the generic clock source selection. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* | clk: at91: clk-generated: select absolute closest rateLudovic Desroches2017-11-291-3/+1
| | | | | | | | | | | | | | | | | | To get the same behavior as the Linux driver, instead of selecting the closest inferior rate, select the closest inferior or superior rate Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* | clk: at91: Kconfig: fix the dependency of AT91_UTMIWenyou Yang2017-11-291-3/+3
| | | | | | | | | | | | | | What the AT91_UTMI depends on SPL_DM isn't right. AT91_UTMI is not only used in SPL, also in other place, even if SPL_DM isn't enabled. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* | clk: clk_stm32fx: add clock configuration for mmc usagePatrice Chotard2017-11-291-1/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC block needs 48Mhz source clock, for that we choose to select the SAI PLL. Update also stm32_clock_get_rate() to retrieve the MMC clock source needed in MMC driver. STM32F4 uses a different RCC variant than STM32F7. For STM32F4 sdmmc clocks bit are located into dckcfgr register whereas there are located into dckcfgr2 registers on STM32F7. In both registers, bits CK48MSEL and SDMMC1SEL are located at the same position. Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
generated by cgit (git 2.34.1) at 2025-02-27 15:25:13 +0000