aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Expand)AuthorAgeFilesLines
* Merge git://source.denx.de/u-boot-socfpgaWIP/23Sep2021Tom Rini2021-09-231-4/+4
|\
| * ddr: altera: use KBUILD_BASENAME instead of __FILE__Marek Vasut2021-09-221-4/+4
* | usb: xhci-dwc3: Add support for USB 3.1 controllersMark Kettenis2021-09-221-1/+2
* | usb: ehci-mx6: use phy_type from device treeMatthias Schiffer2021-09-221-2/+23
* | usb: add support for ULPI/SERIAL/HSIC PHY modesMatthias Schiffer2021-09-221-0/+3
* | usb: xhci-dwc3: Add support for clocks/resetsSamuel Holland2021-09-221-0/+56
* | usb: xhci-pci: Move reset logic out of XHCI coreSamuel Holland2021-09-223-41/+48
* | phy: sun50i-usb3: Add a driver for the H6 USB3 PHYSamuel Holland2021-09-223-0/+180
|/
* wdt: dw: Fix passing NULL pointer to reset functionsSean Anderson2021-09-201-5/+5
* clk: ti: k3: Update driver to account for divider flagsSuman Anna2021-09-171-2/+2
* clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-writeDave Gerlach2021-09-171-2/+11
* pinctrl: fix typoYuan Fang2021-09-141-1/+1
* Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2021-09-131-3/+7
|\
| * sunxi: mmc: A20: Fix MMC optimisationAndre Przywara2021-09-141-3/+7
* | pci: Drop DM_PCISimon Glass2021-09-137-46/+10
* | pci: Drop PCI_INDIRECT_BRIDGESimon Glass2021-09-132-72/+0
* | net: Drop DM_PCI check from designware driverSimon Glass2021-09-131-12/+10
* | pci: acpi: Drop DM_PCI check from ahciSimon Glass2021-09-131-55/+0
|/
* Merge tag 'mmc-2021-9-13' of https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini2021-09-134-15/+32
|\
| * mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common()Michael Walle2021-09-131-7/+0
| * mmc: fix device_remove when HS400_ES is enabledYe Li2021-09-101-3/+5
| * mmc: fix switch issue with send_status disabledYe Li2021-09-101-1/+1
| * mmc: Add support for enumerating MMC card in a given mode using mmc commandAswath Govindraju2021-09-102-2/+25
| * Revert "mmc: sdhci: set to INT_DATA_END when there are data"Yuezhang.Mo@sony.com2021-09-101-2/+1
* | arm: a37xx: pci: Don't spam about PIO Response StatusMarek Behún2021-09-101-1/+1
* | arm: mvebu : sata_mv should probe all portsTony Dinh2021-09-101-4/+10
* | arm: a37xx: pci: Implement re-issuing config requests on CRS responsePali Rohár2021-09-101-15/+43
* | arm: a37xx: pci: Disable returning CRS responsePali Rohár2021-09-101-1/+12
|/
* image: Drop if/elseif hash selection in calculate_hash()Alexandru Gagniuc2021-09-081-0/+2
* cache: add sifive composable cache driverZong Li2021-09-073-0/+83
* riscv: Add missing sentinel in ocores_i2c.cThomas Skibo2021-09-071-0/+1
* spi: zynqmp_gqspi: Fix dma alignment issueAshok Reddy Soma2021-09-031-9/+7
* spi: zynqmp_gqspi: Switch genfifo start to manual modeAshok Reddy Soma2021-09-031-7/+7
* Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodia...WIP/27Aug2021Tom Rini2021-08-2714-42/+662
|\
| * watchdog: versal: Include header file needed for dev_ functionsAshok Reddy Soma2021-08-261-0/+1
| * soc: xilinx: versal: Add soc_xilinx_versal driverT Karthik Reddy2021-08-263-0/+85
| * soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driverT Karthik Reddy2021-08-263-0/+87
| * mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma2021-08-261-20/+1
| * mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy2021-08-261-0/+19
| * mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma2021-08-261-1/+107
| * mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma2021-08-261-14/+59
| * mmc: sdhci: Change prototype of set_delay to return errorsAshok Reddy Soma2021-08-061-2/+8
| * mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelayAshok Reddy Soma2021-08-061-5/+18
| * reset: zynqmp: Add reset controller for ZynqMP SoCMichal Simek2021-08-063-0/+110
| * rtc: zynqmp: Add support for ZynqMP RTCMichal Simek2021-08-063-0/+166
| * dm: rtc: uclass: Add flag to control sequence numberingMichal Simek2021-08-061-0/+1
* | ddr: altera: Add SDRAM driver for Intel N5X deviceTien Fong Chee2021-08-254-1/+2371
* | ddr: socfpga: Enable memory test on memory size less than 1GBTien Fong Chee2021-08-251-3/+21
* | drivers: clk: Add memory clock driver for Intel N5X deviceSiew Chin Lim2021-08-253-0/+221
* | drivers: clk: Add clock driver for Intel N5X deviceSiew Chin Lim2021-08-253-1/+708