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* Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"WIP/11Oct2024Tom Rini2024-10-111-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simon Glass <sjg@chromium.org> says: When the SPL build-phase was first created it was designed to solve a particular problem (the need to init SDRAM so that U-Boot proper could be loaded). It has since expanded to become an important part of U-Boot, with three phases now present: TPL, VPL and SPL Due to this history, the term 'SPL' is used to mean both a particular phase (the one before U-Boot proper) and all the non-proper phases. This has become confusing. For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL' phases, not just SPL. So code which can only be compiled for actual SPL, for example, must use something like this: #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) In Makefiles we have similar issues. SPL_ has been used as a variable which expands to either SPL_ or nothing, to chose between options like CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was updated to support 'VPL_' as well. This series starts a change in terminology and usage to resolve the above issues: - The word 'xPL' is used instead of 'SPL' to mean a non-proper build - A new CONFIG_XPL_BUILD define indicates that the current build is an 'xPL' build - The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now defined for TPL and VPL phases - The existing SPL_ Makefile variable is renamed to SPL_ - The existing SPL_TPL Makefile variable is renamed to PHASE_ It should be noted that xpl_phase() can generally be used instead of the above CONFIGs without a code-space or run-time penalty. This series does not attempt to convert all of U-Boot to use this new terminology but it makes a start. In particular, renaming spl.h and common/spl seems like a bridge too far at this point. The series is fully bisectable. It has also been checked to ensure there are no code-size changes on any commit.
| * global: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILDSimon Glass2024-10-111-1/+1
| | | | | | | | | | | | | | | | | | Complete this rename for all directories outside arch/ board/ drivers/ and include/ Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <sjg@chromium.org>
* | Subtree merge tag 'v6.11-dts' of dts repo [1] into dts/upstreamWIP/01Oct2024-nextTom Rini2024-10-011487-17123/+69996
|/ | | | [1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
* arm64: dts: ti: k3-am62x-sk-common: Add bootph-all property in phy_gmii_sel nodeChintan Vankar2024-08-301-0/+4
| | | | | | | | | | | | | | | | Add missing bootph-all property for CPSW MAC's PHY node phy_gmii_sel. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Chintan Vankar <c-vankar@ti.com> Link: https://lore.kernel.org/r/20240430085048.3143665-1-c-vankar@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> [ upstream commit: ba50141137fae205a731005e70687f4a52289050 ] (cherry picked from commit 2bdd1743a9f6515efe7c3648a25d63b4a9ce4a10) Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
* arm64: dts: rockchip: change spi-max-frequency for Radxa ROCK 3CFUKAUMI Naoki2024-08-121-1/+1
| | | | | | | | | | | | | SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20240623023329.1044-3-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 06f6dd4d607766a527e37529f2f3f90dd1464293 ] (cherry picked from commit dd40945a1d0e28ae6eaf9da04f8e2dcebf8233ea) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: add ROCK 5 ITX boardHeiko Stuebner2024-08-091-0/+1177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ROCK 5 ITX as the name suggests is made in the ITX form factor and actually built in a form to be used in a regular case even providing connectors for regular front-panel io. It can be powered either by 12V, ATX power-supply or PoE. Notable peripherals are the 4 SATA ports, M.2 M-Key slot, M.2 E-key slot, 2*2.5Gb PCIe-connected Ethernet NICs. As of yet unsupported display options consist of 2*HDMI, DP via USB-c, eDP + 2*DSI via PCB connectors. USB ports are 4*USB3 + 2*USB2 on the back panel and 2-port front-panel connector. Schematics for the board can be found on - https://dl.radxa.com/rock5/5itx/radxa_rock_5_itx_X1100_schematic.pdf - https://dl.radxa.com/rock5/5itx/v1110/radxa_rock_5itx_v1110_schematic.pdf Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240704153815.837392-3-heiko@sntech.de [ upstream commit: 31390eb8ffbf2b6be7d789708ec08b635d7a3eb8 ] (cherry picked from commit 9cff9fef0a295e3b8feb7bc4116a297a842cad01) Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: add thermal zones information on RK3588Alexey Charkov2024-08-091-0/+153
| | | | | | | | | | | | | | | | | | | | | | | | This includes the necessary device tree data to allow thermal monitoring on RK3588(s) using the on-chip TSADC device, along with trip points for automatic thermal management. Each of the CPU clusters (one for the little cores and two for the big cores) get a passive cooling trip point at 85C, which will trigger DVFS throttling of the respective cluster upon reaching a high temperature condition. All zones also have a critical trip point at 115C, which will trigger a reset. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-1-c1f5f3267f1e@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 510cd9e688453166b2bff3999ed21cac97385bb5 ] (cherry picked from commit 33e7079543d5eee1415b937054e8634000d1bde4) Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPsDragan Simic2024-08-097-3076/+3090
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the Rockchip RK3588 SoC dtsi files and, consequently, adjust their contents appropriately, to prepare them for the ability to specify different CPU and GPU OPPs for each of the supported RK3588 SoC variants. As already discussed, [1][2][3][4] some of the RK3588 SoC variants require different OPPs, and it makes more sense to have the OPPs already defined when a board dts(i) file includes one of the SoC variant dtsi files (rk3588.dtsi, rk3588j.dtsi or rk3588s.dtsi), rather than requiring the board dts(i) file to also include a separate rk3588*-opp.dtsi file. The choice of the SoC variant is already made by the inclusion of the SoC dtsi file into the board dts(i) file, and it doesn't make much sense to, effectively, allow the board dts(i) file to include and use an incompatible set of OPPs for the already selected RK3588 SoC variant. The new naming scheme for the RK3588 SoC dtsi files uses "-base" and "-extra" suffixes to denote the DT data shared between all RK5588 SoC variants, and the DT data shared between the unrestricted SoC variants, respectively. For example, the DT data for the RK3588 includes both rk3588-base.dtsi and rk3588-extra.dtsi, because it's an unrestricted SoC variant, while the DT data for the RK3588S variant includes rk3588-base.dtsi only, because it's a restricted SoC variant, feature- and interface-wise. This achieves a more logical naming of the RK3588 SoC dtsi files, which reflects the way DT data for the SoC variants is built by "stacking" the SoC variant features made available through the "-base" and "-extra" SoC dtsi files. Additionally, the SoC variant dtsi files (rk3588.dtsi, rk3588j.dtsi and rk3588s.dtsi) are no longer parents to any other SoC variant dtsi files, which should help with making the new "stacking" approach cleaner and easier to follow. The RK3588 pinctrl dtsi files are also renamed in the same way, for the sake of consistency. This also keeps the "-base" and "-extra" groups of the dtsi files together when looked at in a directory listing, which is helpful. The per-SoC-variant OPPs should go directly into the SoC dtsi files, if no more than one SoC variant uses those OPPs, or be put into a separate "-opp" dtsi file that's shared between and included from two or more SoC variant dtsi files. An example for the former is the non-shared OPP data that should go directly into the RK3588J SoC variant dtsi file (i.e. rk3588j.dtsi), and an example for the latter is the shared OPP data that should be put into rk3588-opp.dtsi and be included from the RK3588 and RK3588S SoC variant dtsi files (i.e. rk3588.dtsi and rk3588s.dtsi, respectively). Consequently, if the OPPs for the RK3588 and RK3588S SoC variants are ever made different, the shared rk3588-opp.dtsi file should be deleted and the new OPPs should be put directly into rk3588.dtsi and rk3588s.dtsi. [4] No functional changes are introduced, which was validated by decompiling and comparing all affected dtb files before and after these changes. As a side note, due to the nature of introduced changes, this commit is best viewed using the --break-rewrites option for git-log(1). [1] https://lore.kernel.org/linux-rockchip/646a33e0-5c1b-471c-8183-2c0df40ea51a@cherry.de/ [2] https://lore.kernel.org/linux-rockchip/CABjd4Yxi=+3gkNnH3BysUzzYsji-=-yROtzEc8jM_g0roKB0-w@mail.gmail.com/ [3] https://lore.kernel.org/linux-rockchip/035a274be262528012173d463e25b55f@manjaro.org/ [4] https://lore.kernel.org/linux-rockchip/673dcf47596e7bc8ba065034e339bb1bbf9cdcb0.1716948159.git.dsimic@manjaro.org/T/#u Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/9ffedc0e2ca7f167d9d795b2a8f43cb9f56a653b.1717923308.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: def88eb4d8365a4aa064d28405d03550a9d0a3be ] (cherry picked from commit bf8f631f62026a6b844d34c7e0549e4ec3fd4716) Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add FriendlyElec CM3588 NAS boardSebastian Kropatsch2024-08-092-0/+1431
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CM3588 NAS by FriendlyElec pairs the CM3588 compute module, based on the Rockchip RK3588 SoC, with the CM3588 NAS Kit carrier board. To reflect the hardware setup, add device tree sources for the SoM and the NAS daughter board as separate files. Hardware features: - Rockchip RK3588 SoC - 4GB/8GB/16GB LPDDR4x RAM - 64GB eMMC - MicroSD card slot - 1x RTL8125B 2.5G Ethernet - 4x M.2 M-Key with PCIe 3.0 x1 (via bifurcation) for NVMe SSDs - 2x USB 3.0 (USB 3.1 Gen1) Type-A, 1x USB 2.0 Type-A - 1x USB 3.0 Type-C with DP AltMode support - 2x HDMI 2.1 out, 1x HDMI in - MIPI-CSI Connector, MIPI-DSI Connector - 40-pin GPIO header - 4 buttons: power, reset, recovery, MASK, user button - 3.5mm Headphone out, 2.0mm PH-2A Mic in - 5V Fan connector, PWM beeper, IR receiver, RTC battery connector PCIe bifurcation is used to handle all four M.2 sockets at PCIe 3.0 x1 speed. Data lane mapping in the DT is done like described in commit f8020dfb311d ("phy: rockchip-snps-pcie3: fix bifurcation on rk3588"). This device tree includes support for eMMC, SD card, ethernet, all USB2 and USB3 ports, all four M.2 slots, GPU, beeper, IR, RTC, UART debugging as well as the buttons and LEDs. The GPIOs are labeled according to the schematics. Reviewed-by: Space Meyer <git@the-space.agency> Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de> Link: https://lore.kernel.org/r/20240616215354.40999-3-seb-dev@mail.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: e23819cf273c110662fdc392dcb55a75b3888609 ] (cherry picked from commit c1a8bf31d96d890dd8328ae452fe62971ac555c2) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add Xunlong Orange Pi 3BJonas Karlman2024-08-093-0/+777
| | | | | | | | | | | | | | | | The Xunlong Orange Pi 3B is a single-board computer based on the Rockchip RK3566 SoC. Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240626230319.1425316-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d79d713d602e8b32cf935ddfdf61769cb74ba1dc ] (cherry picked from commit 9defe71f2674f82c27a8d4593d8c5851ab5d51e7) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: add gpio-line-names to radxa-zero-3Trevor Woerner2024-08-091-0/+72
| | | | | | | | | | | | | | | | | | | | Add names to the pins of the general-purpose expansion header as given in the Radxa documentation[1] following the conventions in the kernel[2] to make it easier for users to correlate pins with functions when using utilities such as 'gpioinfo'. [1] https://docs.radxa.com/en/zero/zero3/hardware-design/hardware-interface [2] https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20240620013301.33653-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: f7c742cbe664ebdedc075945e75443683d1175f7 ] (cherry picked from commit 8b26cf42ba0c74a9c86cebe591a9195f75151d97) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: fix mmc aliases for Radxa ZERO 3E/3WFUKAUMI Naoki2024-08-093-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | align with other Radxa products. - mmc0 is eMMC - mmc1 is microSD for ZERO 3E, there is no eMMC, but aliases should start at 0, so mmc0 is microSD as exception. Fixes: 1a5c8d307c83 ("arm64: dts: rockchip: Add Radxa ZERO 3W/3E") Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Changes in v3: - fix syntax error in rk3566-radxa-zero-3e.dts Changes in v2: - microSD is mmc0 instead of mmc1 for ZERO 3E Link: https://lore.kernel.org/r/20240620224435.2752-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 060c1950037e4c54ca4d8186a8f46269e35db901 ] (cherry picked from commit 8324bc7493e4088013c62bc41f49d6d181575493) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add Radxa ZERO 3W/3EJonas Karlman2024-08-093-0/+605
| | | | | | | | | | | | | | | | | | | | | | | | | | The Radxa ZERO 3W/3E is an ultra-small, high-performance single board computer based on the Rockchip RK3566, with a compact form factor and rich interfaces. The ZERO 3W and ZERO 3E are basically the same size and model, but differ only in storage and network interfaces. - eMMC (3W) - SD-card (both) - Ethernet (3E) - WiFi/BT (3W) Add initial support for eMMC, SD-card, Ethernet, HDMI and USB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521202810.1225636-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 1a5c8d307c83c808a32686ed51afb4bac2092d39 ] (cherry picked from commit 1476c5882f8a47b6f0f895c6424dacf6334487ae) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add Radxa ROCK 3BJonas Karlman2024-08-091-0/+781
| | | | | | | | | | | | | | | | | | The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community version based on the RK3568 SoC and an industrial version based on the RK3568J SoC. Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240627211737.1985549-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 846ef7748fa9124c8eea76e2d5e833fa69b3ef7c ] (cherry picked from commit 5416329b387d3c13392f84ba35273a402c7010f8) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add Radxa ROCK S0Jonas Karlman2024-08-091-0/+293
| | | | | | | | | | | | | | | | Radxa ROCK S0 is a single-board computer based on the Rockchip RK3308B SoC in an ultra-compact form factor. Add initial support for eMMC, SD-card, Ethernet, WiFi/BT and USB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521212247.1240226-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: adeb5d2a4ba47910238b3c4f5fd960cc0c26a98b ] (cherry picked from commit e291d457b0378f2cb3d3ebb597032ca862cdb973) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Update WIFi/BT related nodes on rk3308-rock-pi-sJonas Karlman2024-08-091-4/+36
| | | | | | | | | | | | | | | | | | Update WiFi SDIO and BT UART related props to better reflect details about the optional onboard RTL8723DS WiFi/BT module. Also correct the compatible used for bluetooth to match the WiFi/BT module used on the board. Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-14-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 12c3ec878cbe3709782e85b88124abecc3bb8617 ] (cherry picked from commit caba73747c927b4fdccea3aeb16e077b4e6af006) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add io-domains to rk3308-rock-pi-sJonas Karlman2024-08-091-0/+10
| | | | | | | | | | | | | | | The VCCIO4 io-domain used for WiFi/BT is using 1v8 IO signal voltage. Add io-domains node with the VCCIO supplies connected on the board. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-13-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 100b3bdee6035192f6d4a1847970fe004bb505fb ] (cherry picked from commit f93b224359278728f01767a4701678ada9c25570) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add mdio and ethernet-phy nodes to rk3308-rock-pi-sJonas Karlman2024-08-091-3/+23
| | | | | | | | | | | | | | | Be explicit about the Ethernet port and define mdio and ethernet-phy nodes in the device tree for ROCK Pi S. Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-8-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 4b64ed510ed946a4e4ca6d51d6512bf5361f6a04 ] (cherry picked from commit 703b8eae20eec5dbb0e52f0e1fb71e712c007dae) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add pinctrl for UART0 to rk3308-rock-pi-sJonas Karlman2024-08-091-0/+2
| | | | | | | | | | | | | | | | | | UAR0 CTS/RTS is not wired to any pin and is not used for the default serial console use of UART0 on ROCK Pi S. Override the SoC defined pinctrl props to limit configuration of the two xfer pins wired to one of the GPIO pin headers. Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-6-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 7affb86ef62581e3475ce3e0a7640da1f2ee29f8 ] (cherry picked from commit 9c72cd5fa9f971be8ebbc1f43bd74a72e33db2fa) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add sdmmc related properties on rk3308-rock-pi-sJonas Karlman2024-08-091-0/+3
| | | | | | | | | | | | | | | | | Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC to uSD board. Use disable-wp to signal that no physical write-protect line is present. Also add vcc_io used for card and IO line power as vmmc-supply. Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-5-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: fc0daeccc384233eadfa9d5ddbd00159653c6bdc ] (cherry picked from commit 39110e4bec51c9ce6bbd342234b288dbfccb9f80) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add rk3308 IO voltage domainsJonas Karlman2024-08-091-0/+5
| | | | | | | | | | | | | Add a disabled RK3308 IO voltage domains node to SoC DT. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-12-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d1829ba469d5743734e37d59fece73e3668ab084 ] (cherry picked from commit cebde305971e33a76efc3280e09814499ef89f54) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm64: dts: rockchip: Add OTP device node for RK3308Jonas Karlman2024-08-091-0/+24
| | | | | | | | | | | | | | The RK3308 SoC contains a controller for one-time-programmable memory, add a device node for it. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240521211029.1236094-9-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 36d3bbc8cdbef2f83391f7708888265ac4c37a99 ] (cherry picked from commit db11d284200d0f811a8f8238dbc9c63daf4e6131) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* tools: Add script to update git subtree projectsRaymond Mao2024-07-311-48/+0
| | | | | | | | | | | | | | | | | | | | Recently we are introducing multiple git subtree projects and it is the right time to have a universal script to update various subtrees and replace the dts/update-dts-subtree.sh. update-subtree.sh is a wrapper of git subtree commands. Usage: From U-Boot top directory, run $ ./tools/update-subtree.sh pull <subtree-name> <release-tag> for pulling a tag from the upstream. Or run $ ./tools/update-subtree.sh pick <subtree-name> <commit-id> for cherry-pick a commit from the upstream. Currently <subtree-name> supports dts, mbedtls and lwip. Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
* Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstreamWIP/20Jul2024Tom Rini2024-07-201155-10194/+42985
| | | | [1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
* arm64: dts: rockchip: add PCIe3 support on rk3588-jaguarHeiko Stuebner2024-07-171-0/+59
| | | | | | | | | | | | | | | | | The Jaguar SBC provides an M.2 slot connected to the pcie3 controller. In contrast to a number of other boards the pcie-refclk is gpio-controlled, so the necessary clock and is added to the list of pcie3 clocks. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240423074956.2622318-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 0ec7e1096332bc2b9bc881c21cfd234058f747b3 ] (cherry picked from commit 76a89655ae740dddb57187b5b52071ed99187452) Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* Merge patch series "Add Turris 1.x board"Tom Rini2024-07-121-0/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marek Mojík <marek.mojik@nic.cz> says: Hello all, this is a continuation of previous work by Pali to add support for the Turris 1.x board. As the patches were based on u-boot v2022.04, a nontrivial rebasing was needed. Some notes: - Some options that are in SD defconfig are disabled in NOR defconfig because over the years u-boot grew and the old NOR defconfig will not fit into NOR memory. - SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We were not able to fix this yet)
| * board_f: Add support for CONFIG_OF_BOARD_FIXUP for XIP imagesPali Rohár2024-07-121-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When U-Boot is running from flash memory (execute in place) then gd->fdt_blob before relocation points to read-only flash memory. So U-Boot calls board_fix_fdt() with read-only gd->fdt_blob pointer which cause immediate CPU crash when callback is trying to modify gd->fdt_blob. Fix this issue by introducing a new config option OF_INITIAL_DTB_READONLY which moves fix_fdt callback after the reloc_fdt callback. This makes CONFIG_OF_BOARD_FIXUP working also if U-Boot before relocation is not running from read/write (S)RAM memory. This is required for mpc85xx boards when booting from flash NOR. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Mojík <marek.mojik@nic.cz> Reviewed-by: Marek Behún <kabel@kernel.org>
* | Merge patch series "xtensa: Enable qemu-xtensa board"WIP/04Jul2024Tom Rini2024-07-041-0/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jiaxun Yang <jiaxun.yang@flygoat.com> says: Hi all, This series enabled qemu-xtensa board. For dc232b CPU it needs to be built with toolchain[1]. This is a side product of me investigating architectures physical address != virtual address in U-Boot. Now we can get it covered under CI and regular tests. VirtIO devices are not working as expected, due to U-Boot's assumption on VA == PA everywhere, I'm going to get this fixed later. My Xtensa knowledge is pretty limited, Xtensa people please feel free to point out if I got anything wrong. Thanks [1]: https://github.com/foss-xtensa/toolchain/releases/download/2020.07/x86_64-2020.07-xtensa-dc232b-elf.tar.gz
| * | dts/upsteam: Add Makefile for xtensaJiaxun Yang2024-07-041-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | It is required to get it xtensa OF_UPSTREAM work. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
* | | arm64: dts: rockchip: add dual-role usb3 hosts to rk3588 Tiger-HaikouHeiko Stuebner2024-06-141-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apart from the host-only usb3 controller (host2) the rk3588 also provides two dual-role controllers. On the Tiger-Haikou combination these are connected to the lower usb3-host port in host-only mode and the micro-usb3 port for dual-role operation. Add the necessary controllers, phys to the Tiger-Haikou board and enable the usb-id extcon. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240422163951.2604273-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d7b83921d098bd76623381f75f5cd2296f1315cc ] (cherry picked from commit 193d3b2a0a98f2dcd8c43bcbf8a766098a9fa75d)
* | | arm64: dts: rockchip: add usb-id extcon on rk3588 tigerHeiko Stuebner2024-06-141-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Q7 standard specifies a usb-id pin on the connector to distiuish between host and device mode. Model this via the usb-id extcon binding. While the pin is part of the Q7 standard, so part of the module, the extcon stays disabled in the som dtsi and will only be enabled in a baseboard using it. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240422163951.2604273-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: eabb53f5dacfd643b5255f35bad30b8f914decdc ] (cherry picked from commit 4843cec4092318ef7feb0999b0d34ef817465b33)
* | | arm64: dts: rockchip: fix comment for upper usb3 portHeiko Stuebner2024-06-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment for the host2_xhci points to the wrong port on the board. The upper usb3 port is the correct one, so fix the comment to prevent confusion. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240422163951.2604273-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 3482efee1144262dc839792103e6a9e29defecbc ] (cherry picked from commit 56f3031edf22d163f10bc4b631d37a9aaa82d4d4)
* | | arm64: dts: rockchip: fix pcie-refclk frequency on rk3588 tigerHeiko Stuebner2024-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock-generator of course only produces a 100MHz clock rate, not 1GHz. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240423114635.2637310-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 0eb2a93518fb4728bd1d55fcd3b57fce4797ef1d ] (cherry picked from commit b574cbafae976cf508692088944e45c9764c0048)
* | | arm64: dts: rockchip: correct gpio_pwrctrl1 typos on rk3588(s) boardsJing Luo2024-06-149-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpio_pwrctrl2 gets duplicated by both rk806_dvs1_null and rk806_dvs2_null gpio_pwrctrl1 is unset. This typo appears in multiple files. Let's fix them. Note: I haven't had the chance to test them all because I don't own all of these boards (obviously). Please test if it's needed. Signed-off-by: Jing Luo <jing@jing.rocks> Link: https://lore.kernel.org/r/20240420130355.639406-1-jing@jing.rocks Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d7f2039e5321636069baa77ef2f1e5d22cb69a88 ] (cherry picked from commit cb2b6d1d19ed10fcaec5f5859c08a3355d1c66e0) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: move uart2 pinmux to dtsi on rk3588-tigerHeiko Stuebner2024-06-142-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The association of uart2 to the q7-uart pins is part of the module itself and not the baseboard used. Therefore move the pinctrl over to the tiger dtsi. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240422143356.2596414-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 5adbad5c464a708a87cf5ade1bfe2ca947bb2f82 ] (cherry picked from commit f8314a4fbc00a3d651a7e9b4d9462d10c6c02a12)
* | | arm64: dts: rockchip: enable gpu on rk3588-tigerHeiko Stuebner2024-06-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the mali gpu node and add the som-specific supply-regulator. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240327112120.1181570-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: f5256f8ed4b729c3ab9d9cd7d406313773484b59 ] (cherry picked from commit 27350b241eafea37dc94743cd9c5dd83295faca9)
* | | arm64: dts: rockchip: Add ArmSom Sige7 boardJianfeng Liu2024-06-141-0/+721
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 8/16/32GB Memory LPDDR4/LPDDR4x Mali G610MP4 GPU 2× MIPI-CSI Connector 1× MIPI-DSI Connector 1x M.2 Key M (PCIe 3.0 4-lanes) 2x RTL8125 2.5G Ethernet Onboard AP6275P for WIFI6/BT5 32GB/64GB/128GB eMMC MicroSD card slot 1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C 1x HDMI Output, 1x type-C DP Output Functions work normally: USB2.0 Host USB3.0 Type-A Host M.2 Key M (PCIe 3.0 4-lanes) 2x RTL8125 2.5G Ethernet eMMC MicroSD card More information can be obtained from the following website https://docs.armsom.org/armsom-sige7 Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com> Link: https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 81c828a67c78bb03ea75819c417c93c7f3d637b5 ] (cherry picked from commit d427a11542bcf5364a5260280e077f0a2e030dcb) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: add rk3588 pcie and php IOMMUsNiklas Cassel2024-06-141-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmu600_pcie is connected with the five PCIe controllers. The mmu600_php is connected with the USB3 controller, the GMAC controllers, and the SATA controllers. See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual). The IOMMUs are disabled by default, as further patches are needed to program the SID/SSIDs in to the IOMMUs. iommu: Default domain type: Translated iommu: DMA domain TLB invalidation policy: strict mode arm-smmu-v3 fc900000.iommu: ias 48-bit, oas 48-bit (features 0x001c1eaf) arm-smmu-v3 fc900000.iommu: allocated 65536 entries for cmdq arm-smmu-v3 fc900000.iommu: allocated 32768 entries for evtq arm-smmu-v3 fc900000.iommu: msi_domain absent - falling back to wired irqs Additionally, the IOMMU correctly triggers an IOMMU fault when a PCIe device performs a write (since the device hasn't been assigned a SID/SSID): arm-smmu-v3 fc900000.iommu: event 0x02 received: arm-smmu-v3 fc900000.iommu: 0x0000010000000002 arm-smmu-v3 fc900000.iommu: 0x0000000000000000 arm-smmu-v3 fc900000.iommu: 0x0000000000000000 arm-smmu-v3 fc900000.iommu: 0x0000000000000000 While this doesn't provide much value as is, having the devices as disabled in the device tree will allow developers to see that the rk3588 actually has IOMMUs on the SoC. Signed-off-by: Niklas Cassel <cassel@kernel.org> Link: https://lore.kernel.org/r/20240502140231.477049-2-cassel@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: cd81d3a0695cc54ad6ac0ef4bbb67a7c8f55d592 ] (cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: add USB3 DRD controllers on rk3588Sebastian Reichel2024-06-142-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add both USB3 dual-role controllers to the RK3588 devicetree. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240408225109.128953-8-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 33f393a2a990e16f56931ca708295f31d2b44415 ] (cherry picked from commit c7ed588e14f7dd04a92fb55f12680f94c7b14edf) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: add USBDP phys on rk3588Sebastian Reichel2024-06-142-0/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add both USB3-DisplayPort PHYs to RK3588 SoC DT. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240408225109.128953-7-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: e18e5e8188f2671abf63abe7db5f21555705130f ] (cherry picked from commit 5110caca9865718616cf7093ed4a9a1bc54780db) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: reorder usb2phy properties for rk3588Sebastian Reichel2024-06-141-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorder common DT properties alphabetically for usb2phy, according to latest DT style rules. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240408225109.128953-6-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: abe68e0ca71dddce0e5419e35507cb464d61870d ] (cherry picked from commit f6835a60a8a28ff14ffb3dd80c99ce1c137d06c5) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: fix usb2phy nodename for rk3588Sebastian Reichel2024-06-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb2-phy should be named usb2phy according to the DT binding, so let's fix it up accordingly. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240408225109.128953-5-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 4e07a95f7402de092cd71b2cb96c69f85c98f251 ] (cherry picked from commit 5a3e4638492497ae81b9bd4a8627f4727e312ccc) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: Fix ordering of nodes on rk3588sDiederik de Haas2024-06-141-152/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the ordering of the main nodes by sorting them alphabetically and then the ones with a memory address sequentially by that address. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20240406172821.34173-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: cbb97fe18e299ece1c0074924c630de6a19b320f ] (cherry picked from commit bbf7c16f2f1208b96349f6f6648b69cfaa1a482b) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | arm64: dts: rockchip: Add rk3588 GPU nodeBoris Brezillon2024-06-141-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Mali GPU Node to the RK3588 SoC DT including GPU clock operating points Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240326165232.73585-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 6fca4edb93d335f29f81e484936f38a5eed6a9b1 ] (cherry picked from commit 3cd15354ea0c8668812bc0b3a4136606c10803e9) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | Merge tag 'v2024.07-rc4' into nextTom Rini2024-06-041-0/+4
|\ \ \ | |_|/ |/| | | | | Prepare v2024.070-rc4
| * | ARM: dts: renesas: Reserve space in 64bit R-Car DTsMarek Vasut2024-06-011-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | Reserve 4 kiB of space in 64bit R-Car DTs when those DTs are compiled to permit patching in OpTee-OS /firmware node, /reserved-memory node, possibly also additional /memory@ nodes and RPC node by TFA. This duplicates behavior in arch/arm/dts/Makefile with OF_UPSTREAM. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
* / Subtree merge tag 'v6.9-dts' of devicetree-rebasing repo [1] into dts/upstreamTom Rini2024-05-201276-12498/+55311
|/ | | | | | | [1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/ Tested-by: Heiko Stuebner <heiko@sntech.de> # rk3588-rock5b, rk3588-jaguar, # rk3588-tiger (pending patch)
* dts: support building all dtb files for a specific vendorCaleb Connolly2024-04-291-0/+24
| | | | | | | | | | | This adjusts OF_UPSTREAM to behave more like the kernel by allowing for all the devicetree files for a given vendor to be compiled. This is useful for Qualcomm in particular as most boards are supported by a single U-Boot build just provided with a different DT. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Amlogic boards builds
* Subtree merge tag 'v6.8-dts' of devicetree-rebasing repo [1] into dts/upstreamTom Rini2024-04-011311-8539/+67670
| | | | [1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
* Makefile: Add missing OF_UPSTREAM Makefile for 32bit ARMMarek Vasut2024-03-201-0/+14
| | | | | | | | | | Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm Tested-by: Tony Dinh <mibodhi@gmail.com>
generated by cgit (git 2.34.1) at 2025-02-25 17:39:55 +0000