From 364174b2d3bcad1a3ebd30c0eec9307ae5cb477a Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 26 Jul 2021 21:35:28 +0200 Subject: spi: nxp_fspi: Ensure width is respected in spi-mem operations Import linux commit 007773e16a6f ("spi: nxp-fspi: Ensure width is respected in spi-mem operations") to fix SPI access on boards which don't have all SPI I/O lines connected to the flash. Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection") u-boot figures out the capabilities by looking at spi_mem_supports_op(). The FlexSPI driver doesn't take the board layout into account. Fix that. Fixes: 383fded70c4f ("spi: nxp_fspi: new driver for the FlexSPI controller") Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav Reviewed-by: Priyanka Jain --- drivers/spi/nxp_fspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index 6c5bad4c2ca..bba7a330e0c 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -428,7 +428,7 @@ static bool nxp_fspi_supports_op(struct spi_slave *slave, op->data.nbytes > f->devtype_data->txfifo) return false; - return true; + return spi_mem_default_supports_op(slave, op); } /* Instead of busy looping invoke readl_poll_sleep_timeout functionality. */ -- cgit From a968e9adac7e239d03a759805ccb36bd3152c07e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 21 Jul 2021 18:53:20 -0400 Subject: arm: Finish migration of HAS_FSL_XHCI_USB This symbol was largely migrated, except for one case. Update it. Cc: Priyanka Jain Signed-off-by: Tom Rini Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 ++++-- include/configs/lx2160a_common.h | 1 - 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9c58f69dbd0..9cef363fbaa 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -58,6 +58,7 @@ config ARCH_LS1043A select ARM_ERRATA_855873 if !TFABOOT select FSL_LAYERSCAPE select FSL_LSCH2 + select HAS_FSL_XHCI_USB if USB_HOST select SYS_FSL_SRDS_1 select SYS_HAS_SERDES select SYS_FSL_DDR @@ -89,6 +90,7 @@ config ARCH_LS1046A select ARMV8_SET_SMPEN select FSL_LAYERSCAPE select FSL_LSCH2 + select HAS_FSL_XHCI_USB if USB_HOST select SYS_FSL_SRDS_1 select SYS_HAS_SERDES select SYS_FSL_DDR @@ -245,6 +247,7 @@ config ARCH_LX2160A bool select ARMV8_SET_SMPEN select FSL_LSCH3 + select HAS_FSL_XHCI_USB if USB_HOST select NXP_LSCH3_2 select SYS_HAS_SERDES select SYS_FSL_SRDS_1 @@ -642,9 +645,8 @@ config SPL_LDSCRIPT config HAS_FSL_XHCI_USB bool - default y if ARCH_LS1043A || ARCH_LS1046A help - For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use + For some SoC (such as LS1043A and LS1046A), USB and QE-HDLC multiplex use pins, select it when the pins are assigned to USB. config SYS_FSL_BOOTROM_BASE diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 1338ee3cda3..8977ee9de23 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -143,7 +143,6 @@ /* USB */ #ifdef CONFIG_USB_HOST -#define CONFIG_HAS_FSL_XHCI_USB #ifndef CONFIG_TARGET_LX2162AQDS #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif -- cgit From 8331618cc336b4a8576bb9062142a58796b2259b Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 26 Jul 2021 22:08:44 +0200 Subject: board: sl28: drop unneeded and outdated flash partitions This board doesn't use the MTD subsystem in u-boot, thus there is no need to specify the partitions. They are outdated anyway. Just drop them. Signed-off-by: Michael Walle Reviewed-by: Priyanka Jain --- arch/arm/dts/fsl-ls1028a-kontron-sl28.dts | 55 ------------------------------- 1 file changed, 55 deletions(-) diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts index ea77a83d2fe..7f237c39ec0 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts @@ -72,61 +72,6 @@ /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */ spi-rx-bus-width = <2>; /* 2 SPI Rx lines */ spi-tx-bus-width = <1>; /* 1 SPI Tx line */ - - partition@0 { - reg = <0x000000 0x010000>; - label = "rcw"; - read-only; - }; - - partition@10000 { - reg = <0x010000 0x0f0000>; - label = "failsafe bootloader"; - read-only; - }; - - partition@100000 { - reg = <0x100000 0x040000>; - label = "failsafe DP firmware"; - read-only; - }; - - partition@140000 { - reg = <0x140000 0x0a0000>; - label = "failsafe trusted firmware"; - read-only; - }; - - partition@1e0000 { - reg = <0x1e0000 0x020000>; - label = "reserved"; - read-only; - }; - - partition@200000 { - reg = <0x200000 0x010000>; - label = "configuration store"; - }; - - partition@210000 { - reg = <0x210000 0x0f0000>; - label = "bootloader"; - }; - - partition@300000 { - reg = <0x300000 0x040000>; - label = "DP firmware"; - }; - - partition@340000 { - reg = <0x340000 0x0a0000>; - label = "trusted firmware"; - }; - - partition@3e0000 { - reg = <0x3e0000 0x020000>; - label = "bootloader environment"; - }; }; }; -- cgit From 00ac37a9bc3da4e072fc1c4b460ec28c8dcd2275 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Wed, 28 Jul 2021 14:05:59 +0530 Subject: lx2160a: Enable CONFIG_SPI_FLASH_MT35XU for lx2160a-rdb/qds LX2160A-RDB/QDS has micron mt35xu512aba flash which requires flag CONFIG_SPI_FLASH_MT35XU on to probe flash successfully. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig | 1 + 5 files changed, 5 insertions(+) diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index ed4304c7048..91fba196182 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -51,6 +51,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index faa8da770b5..d52063c7a87 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -58,6 +58,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y CONFIG_SPI_FLASH_SST=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index f8511cb193d..94e103c5d1d 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 004eb7de74f..d09bcde92e7 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -56,6 +56,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 140f851ba27..93b1e49cf2d 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -56,6 +56,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y -- cgit From 6466b95e7c94a48d8f8093b0a765fd51ab6e84ae Mon Sep 17 00:00:00 2001 From: Camelia Groza Date: Thu, 29 Jul 2021 19:31:20 +0300 Subject: board: freescale: t208xrdb: enable Power-On Reset for rev D boards Starting with board revision D, the MISCCSR CPLD register needs to be configured to enable Power-on Reset for software reset commands. Signed-off-by: Camelia Groza Reviewed-by: Priyanka Jain --- board/freescale/t208xrdb/cpld.h | 4 ++++ board/freescale/t208xrdb/t208xrdb.c | 7 +++++++ 2 files changed, 11 insertions(+) diff --git a/board/freescale/t208xrdb/cpld.h b/board/freescale/t208xrdb/cpld.h index a623b1811fa..3139c2b85fd 100644 --- a/board/freescale/t208xrdb/cpld.h +++ b/board/freescale/t208xrdb/cpld.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor + * Copyright 2021 NXP */ /* @@ -42,3 +43,6 @@ void cpld_write(unsigned int reg, u8 value); /* RSTCON Register */ #define CPLD_RSTCON_EDC_RST 0x04 + +/* MISCCSR Register */ +#define CPLD_MISC_POR_EN 0x30 diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 1f0cdee0b86..947dd6aa9f3 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -128,6 +128,13 @@ int misc_init_r(void) reg |= CPLD_RSTCON_EDC_RST; CPLD_WRITE(reset_ctl, reg); + /* Enable POR for boards revisions D and up */ + if (get_hw_revision() >= 'D') { + reg = CPLD_READ(misc_csr); + reg |= CPLD_MISC_POR_EN; + CPLD_WRITE(misc_csr, reg); + } + return 0; } -- cgit From 0dfa9da277a4556f9e7faa0101c7694fe2b78733 Mon Sep 17 00:00:00 2001 From: Kshitiz Varshney Date: Sun, 1 Aug 2021 14:31:45 +0200 Subject: board: fsl_validate: Fix resource leak issue Free dynamically allocated memory before every return statement in calc_img_key_hash() and calc_esbchdr_esbc_hash() function. Verified the secure boot changes using ls1046afrwy board. Signed-off-by: Kshitiz Varshney Reviewed-by: Priyanka Jain --- board/freescale/common/fsl_validate.c | 36 ++++++++++++++++++++++++++--------- 1 file changed, 27 insertions(+), 9 deletions(-) diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 066aa9a7c37..c90afe2e210 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015 Freescale Semiconductor, Inc. + * Copyright 2021 NXP */ #include @@ -498,8 +499,11 @@ static int calc_img_key_hash(struct fsl_secboot_img_priv *img) return ret; ret = algo->hash_init(algo, &ctx); - if (ret) + if (ret) { + if (ctx) + free(ctx); return ret; + } /* Update hash for ESBC key */ #ifdef CONFIG_KEY_REVOCATION @@ -518,8 +522,11 @@ static int calc_img_key_hash(struct fsl_secboot_img_priv *img) /* Copy hash at destination buffer */ ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size); - if (ret) + if (ret) { + if (ctx) + free(ctx); return ret; + } for (i = 0; i < SHA256_BYTES; i++) img->img_key_hash[i] = hash_val[i]; @@ -547,14 +554,18 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) ret = algo->hash_init(algo, &ctx); /* Copy hash at destination buffer */ - if (ret) + if (ret) { + free(ctx); return ret; + } /* Update hash for CSF Header */ ret = algo->hash_update(algo, ctx, (u8 *)&img->hdr, sizeof(struct fsl_secboot_img_hdr), 0); - if (ret) + if (ret) { + free(ctx); return ret; + } /* Update the hash with that of srk table if srk flag is 1 * If IE Table is selected, key is not added in the hash @@ -581,22 +592,29 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) key_hash = 1; } #endif - if (ret) + if (ret) { + free(ctx); return ret; - if (!key_hash) + } + if (!key_hash) { + free(ctx); return ERROR_KEY_TABLE_NOT_FOUND; + } /* Update hash for actual Image */ ret = algo->hash_update(algo, ctx, (u8 *)(*(img->img_addr_ptr)), img->img_size, 1); - if (ret) + if (ret) { + free(ctx); return ret; + } /* Copy hash at destination buffer */ ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size); - if (ret) + if (ret) { + free(ctx); return ret; - + } return 0; } -- cgit From b62c174e861bddc3c7131045ed018556645cecb9 Mon Sep 17 00:00:00 2001 From: Wasim Khan Date: Mon, 2 Aug 2021 10:34:52 +0200 Subject: armv8: fsl : create bootcmd and mcinitcmd as per boot source NXP platforms expect custom bootcmd and mcinitcmd to be updated as per boot source with default environment. Check env variable fsl_bootcmd_mcinitcmd_set to prepare bootcmd and mcinitcmd Fixes: cbf77d201870 (armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A) Signed-off-by: Wasim Khan Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 1641b657990..42a09685462 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -953,12 +953,15 @@ int board_late_init(void) #endif #ifdef CONFIG_TFABOOT /* - * Set bootcmd and mcinitcmd if they don't exist in the environment. + * Set bootcmd and mcinitcmd if "fsl_bootcmd_mcinitcmd_set" does + * not exists in env */ - if (!env_get("bootcmd")) + if (env_get_yesno("fsl_bootcmd_mcinitcmd_set") <= 0) { + // Set bootcmd and mcinitcmd as per boot source fsl_setenv_bootcmd(); - if (!env_get("mcinitcmd")) fsl_setenv_mcinitcmd(); + env_set("fsl_bootcmd_mcinitcmd_set", "y"); + } #endif #ifdef CONFIG_QSPI_AHB_INIT qspi_ahb_init(); -- cgit From 9b90e0d08f17780633d7f35b1a22c14283d15de9 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Tue, 10 Aug 2021 11:20:06 +0530 Subject: env: Kconfig: Add default option for PHY_CORTINA Add PHY_CORTINA as default option in SYS_MMC_ENV_DEV Kconfig entry as PHY_CORTINA require SYS_MMC_ENV_DEV value similar to FMAN_ENET or QE. This helps in resolving compilation failure. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- env/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/env/Kconfig b/env/Kconfig index 67ff172e3a9..c0dff1fd819 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -616,7 +616,7 @@ config SYS_RELOC_GD_ENV_ADDR config SYS_MMC_ENV_DEV int "mmc device number" depends on ENV_IS_IN_MMC || ENV_IS_IN_FAT || SYS_LS_PPA_FW_IN_MMC || \ - CMD_MVEBU_BUBT || FMAN_ENET || QE + CMD_MVEBU_BUBT || FMAN_ENET || QE || PHY_CORTINA default 0 help MMC device number on the platform where the environment is stored. -- cgit From e99b1dfcb78229845058c8045031a9508813e0d7 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Tue, 10 Aug 2021 11:20:07 +0530 Subject: configs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to Kconfig Use moveconfig.py script to convert below defines to Kconfig and move these entries to defconfigs. CONFIG_CORTINA_FW_ADDR CONFIG_CORTINA_FW_LENGTH Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/ls2081ardb_defconfig | 1 + configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_qspi_defconfig | 1 + drivers/net/phy/Kconfig | 10 ++++++++++ include/configs/T208xRDB.h | 6 ------ include/configs/T4240RDB.h | 2 -- include/configs/ls2080ardb.h | 10 ---------- scripts/config_whitelist.txt | 2 -- 21 files changed, 26 insertions(+), 20 deletions(-) diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 95a2c778fc0..93d8d4ba56e 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -69,6 +69,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_NAND=y +CONFIG_CORTINA_FW_ADDR=0x200000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 21d22df4eb3..10598804a1f 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -66,6 +66,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_MMC=y +CONFIG_CORTINA_FW_ADDR=0x114000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 393b6db2863..59963fdf374 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -68,6 +68,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y +CONFIG_CORTINA_FW_ADDR=0x120000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 24e927c7350..466e91743f5 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -53,6 +53,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0xEFE00000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 250c2d5e962..f6eeade2a39 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -70,6 +70,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_NAND=y +CONFIG_CORTINA_FW_ADDR=0x200000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index d5eea40797a..0286610cb03 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -67,6 +67,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_MMC=y +CONFIG_CORTINA_FW_ADDR=0x114000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 4d38f4b978f..eb073ce4be5 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -69,6 +69,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y +CONFIG_CORTINA_FW_ADDR=0x120000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 2ecbabf99ec..ab7096e5202 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -54,6 +54,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0xEFE00000 CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_DM_MDIO=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 2230e674fcb..c1ca2565e26 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -57,6 +57,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x77f000 CONFIG_PHY_TERANETICS=y CONFIG_PHY_VITESSE=y CONFIG_DM_ETH=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index abb2137d91e..14594b05791 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -45,6 +45,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHYLIB_10G=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0xefe00000 CONFIG_PHY_TERANETICS=y CONFIG_PHY_VITESSE=y CONFIG_DM_ETH=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index b1477eac141..365ee87bdbc 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x580980000 CONFIG_E1000=y CONFIG_MII=y CONFIG_NVME=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index c107bcddad7..cb46f4e4bbc 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -50,6 +50,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x580980000 CONFIG_E1000=y CONFIG_MII=y CONFIG_NVME=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 6615958ae4e..d371fa5e69b 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -58,6 +58,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x980000 CONFIG_E1000=y CONFIG_MII=y CONFIG_NVME=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index da02de270fb..26692b2e73e 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -45,6 +45,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x980000 CONFIG_E1000=y CONFIG_MII=y CONFIG_NVME=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 0201fce1a72..bd16602413f 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x980000 CONFIG_DM_ETH=y CONFIG_DM_MDIO=y CONFIG_E1000=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 336a0a7b32b..3a426031b91 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -51,6 +51,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_CORTINA_FW_ADDR=0x980000 CONFIG_DM_ETH=y CONFIG_DM_MDIO=y CONFIG_E1000=y diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 405bf767530..64d5ddf2385 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -131,6 +131,16 @@ config SYS_CORTINA_FW_IN_SPIFLASH endchoice +config CORTINA_FW_ADDR + hex "Cortina Firmware Address" + depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD + default 0x0 + +config CORTINA_FW_LENGTH + hex "Cortina Firmware Length" + depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD + default 0x40000 + config PHY_CORTINA_ACCESS bool "Cortina Access Ethernet PHYs support" default y diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 63cc5af2c6d..601e67c80c3 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -479,7 +479,6 @@ unsigned long get_board_ddr_clk(void); * env, so we got 0x110000. */ #define CONFIG_SYS_FMAN_FW_ADDR 0x110000 -#define CONFIG_CORTINA_FW_ADDR 0x120000 #elif defined(CONFIG_SDCARD) /* @@ -488,11 +487,9 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#define CONFIG_CORTINA_FW_ADDR (512 * 0x8a0) #elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) -#define CONFIG_CORTINA_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing @@ -502,17 +499,14 @@ unsigned long get_board_ddr_clk(void); * master LAW->the ucode address in master's memory space. */ #define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000 -#define CONFIG_CORTINA_FW_ADDR 0xFFE10000 #else #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 -#define CONFIG_CORTINA_FW_ADDR 0xEFE00000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_CORTINA_FW_LENGTH 0x40000 #define RGMII_PHY1_ADDR 0x01 /* RealTek RTL8211E */ #define RGMII_PHY2_ADDR 0x02 #define CORTINA_PHY_ADDR1 0x0c /* Cortina CS4315 */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 57a39fa970f..c796b1d7ed0 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -517,8 +517,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_CORTINA_FW_ADDR 0xefe00000 -#define CONFIG_CORTINA_FW_LENGTH 0x40000 #define SGMII_PHY_ADDR1 0x0 #define SGMII_PHY_ADDR2 0x1 #define SGMII_PHY_ADDR3 0x2 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 49c2cc573bc..bfbde1da978 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -560,14 +560,6 @@ unsigned long get_board_sys_clk(void); #endif /* MAC/PHY configuration */ -#ifdef CONFIG_FSL_MC_ENET -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_CORTINA_FW_ADDR 0x20980000 -#else -#define CONFIG_CORTINA_FW_ADDR 0x580980000 -#endif -#define CONFIG_CORTINA_FW_LENGTH 0x40000 - #define CORTINA_PHY_ADDR1 0x10 #define CORTINA_PHY_ADDR2 0x11 #define CORTINA_PHY_ADDR3 0x12 @@ -577,9 +569,7 @@ unsigned long get_board_sys_clk(void); #define AQ_PHY_ADDR3 0x02 #define AQ_PHY_ADDR4 0x03 #define AQR405_IRQ_MASK 0x36 - #define CONFIG_ETHPRIME "DPMAC1@xgmii" -#endif #include diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2d70bf5da7c..d86f35856f7 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -190,8 +190,6 @@ CONFIG_CONS_SCIF1 CONFIG_CONS_SCIF2 CONFIG_CONS_SCIF4 CONFIG_CON_ROT -CONFIG_CORTINA_FW_ADDR -CONFIG_CORTINA_FW_LENGTH CONFIG_CPLD_BR_PRELIM CONFIG_CPLD_OR_PRELIM CONFIG_CPM2 -- cgit From 5528c90e2dd801c35e0c7a4c9deb84f37d15ca08 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Tue, 10 Aug 2021 11:20:08 +0530 Subject: net: cortina: Add support for tfa boot in cortina firmware Add support for boards supporting TFA boot separately in cortina firmware. Please note, a weak function is defined to retrieve firmware address values as CONFIG_CORTINA_FW_ADDR is now defined in defconfig and can only have one possible value defined. This weak function will help in overwrting the values to get proper addresses as per boot source. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- drivers/net/phy/cortina.c | 79 +++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 69 insertions(+), 10 deletions(-) diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index b381a431fd9..2ac02952450 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -17,12 +17,11 @@ #include #include #include -#ifdef CONFIG_SYS_CORTINA_FW_IN_NAND #include -#elif defined(CONFIG_SYS_CORTINA_FW_IN_SPIFLASH) #include -#elif defined(CONFIG_SYS_CORTINA_FW_IN_MMC) #include +#ifdef CONFIG_ARM64 +#include #endif #ifndef CONFIG_PHYLIB_10G @@ -124,6 +123,11 @@ struct cortina_reg_config cortina_reg_cfg[] = { {VILLA_LINE_SDS_COMMON_STX0_TX_OUTPUT_CTRLB, 0xc01E}, }; +__weak ulong *cs4340_get_fw_addr(void) +{ + return (ulong *)CONFIG_CORTINA_FW_ADDR; +} + void cs4340_upload_firmware(struct phy_device *phydev) { char line_temp[0x50] = {0}; @@ -132,22 +136,76 @@ void cs4340_upload_firmware(struct phy_device *phydev) int i, line_cnt = 0, column_cnt = 0; struct cortina_reg_config fw_temp; char *addr = NULL; + ulong cortina_fw_addr = (ulong)cs4340_get_fw_addr(); + +#ifdef CONFIG_TFABOOT + enum boot_src src = get_boot_src(); + + if (src == BOOT_SOURCE_IFC_NOR) { + addr = (char *)cortina_fw_addr; + } else if (src == BOOT_SOURCE_IFC_NAND) { + int ret; + size_t fw_length = CONFIG_CORTINA_FW_LENGTH; + + addr = malloc(CONFIG_CORTINA_FW_LENGTH); + ret = nand_read(get_nand_dev_by_index(0), + (loff_t)cortina_fw_addr, &fw_length, (u_char *)addr); + if (ret == -EUCLEAN) { + printf("NAND read of Cortina firmware at 0x%lx failed %d\n", + cortina_fw_addr, ret); + } + } else if (src == BOOT_SOURCE_QSPI_NOR) { + int ret; + struct spi_flash *ucode_flash; + addr = malloc(CONFIG_CORTINA_FW_LENGTH); + ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + if (!ucode_flash) { + puts("SF: probe for Cortina ucode failed\n"); + } else { + ret = spi_flash_read(ucode_flash, cortina_fw_addr, + CONFIG_CORTINA_FW_LENGTH, addr); + if (ret) + puts("SF: read for Cortina ucode failed\n"); + spi_flash_free(ucode_flash); + } + } else if (src == BOOT_SOURCE_SD_MMC) { + int dev = CONFIG_SYS_MMC_ENV_DEV; + u32 cnt = CONFIG_CORTINA_FW_LENGTH / 512; + u32 blk = cortina_fw_addr / 512; + struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); + + if (!mmc) { + puts("Failed to find MMC device for Cortina ucode\n"); + } else { + addr = malloc(CONFIG_CORTINA_FW_LENGTH); + printf("MMC read: dev # %u, block # %u, count %u ...\n", + dev, blk, cnt); + mmc_init(mmc); +#ifdef CONFIG_BLK + (void)blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); +#else + (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, addr); +#endif + } + } +#else /* CONFIG_TFABOOT */ #if defined(CONFIG_SYS_CORTINA_FW_IN_NOR) || \ defined(CONFIG_SYS_CORTINA_FW_IN_REMOTE) - addr = (char *)CONFIG_CORTINA_FW_ADDR; + addr = (char *)cortina_fw_addr; #elif defined(CONFIG_SYS_CORTINA_FW_IN_NAND) int ret; size_t fw_length = CONFIG_CORTINA_FW_LENGTH; addr = malloc(CONFIG_CORTINA_FW_LENGTH); ret = nand_read(get_nand_dev_by_index(0), - (loff_t)CONFIG_CORTINA_FW_ADDR, + (loff_t)cortina_fw_addr, &fw_length, (u_char *)addr); if (ret == -EUCLEAN) { - printf("NAND read of Cortina firmware at 0x%x failed %d\n", - CONFIG_CORTINA_FW_ADDR, ret); + printf("NAND read of Cortina firmware at 0x%lx failed %d\n", + cortina_fw_addr, ret); } #elif defined(CONFIG_SYS_CORTINA_FW_IN_SPIFLASH) int ret; @@ -159,7 +217,7 @@ void cs4340_upload_firmware(struct phy_device *phydev) if (!ucode_flash) { puts("SF: probe for Cortina ucode failed\n"); } else { - ret = spi_flash_read(ucode_flash, CONFIG_CORTINA_FW_ADDR, + ret = spi_flash_read(ucode_flash, cortina_fw_addr, CONFIG_CORTINA_FW_LENGTH, addr); if (ret) puts("SF: read for Cortina ucode failed\n"); @@ -168,7 +226,7 @@ void cs4340_upload_firmware(struct phy_device *phydev) #elif defined(CONFIG_SYS_CORTINA_FW_IN_MMC) int dev = CONFIG_SYS_MMC_ENV_DEV; u32 cnt = CONFIG_CORTINA_FW_LENGTH / 512; - u32 blk = CONFIG_CORTINA_FW_ADDR / 512; + u32 blk = cortina_fw_addr / 512; struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); if (!mmc) { @@ -186,6 +244,7 @@ void cs4340_upload_firmware(struct phy_device *phydev) addr); #endif } +#endif #endif while (*addr != 'Q') { @@ -195,7 +254,7 @@ void cs4340_upload_firmware(struct phy_device *phydev) line_temp[i++] = *addr++; if (0x50 < i) { printf("Not found Cortina PHY ucode at 0x%p\n", - (char *)CONFIG_CORTINA_FW_ADDR); + (char *)cortina_fw_addr); return; } } -- cgit From 961928397f75a5099740519d79ef594eeec87238 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Tue, 10 Aug 2021 11:20:09 +0530 Subject: board: ls2088ardb: Extend cs4340_get_fw_addr() functionality LS2088A-RDB supports TFA boot source and has 2 nor banks(default and altbank) and QSPI as boot source. The corresponding defconfig can only have one entry defined and therefore, extend cs4340_get_fw_addr() function to overwrite firmware address which will be later used in cortina firmware. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- board/freescale/ls2080ardb/ls2080ardb.c | 38 +++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 6504cf768f1..e8722f20c13 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -33,6 +33,9 @@ #endif #include "../common/vid.h" +#define CORTINA_FW_ADDR_IFCNOR 0x580980000 +#define CORTINA_FW_ADDR_IFCNOR_ALTBANK 0x584980000 +#define CORTINA_FW_ADDR_QSPI 0x980000 #define PIN_MUX_SEL_SDHC 0x00 #define PIN_MUX_SEL_DSPI 0x0a @@ -235,6 +238,41 @@ int config_board_mux(int ctrl_type) return 0; } +ulong *cs4340_get_fw_addr(void) +{ +#ifdef CONFIG_TFABOOT + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 svr = gur_in32(&gur->svr); +#endif + ulong cortina_fw_addr = CONFIG_CORTINA_FW_ADDR; + +#ifdef CONFIG_TFABOOT + /* LS2088A TFA boot */ + if (SVR_SOC_VER(svr) == SVR_LS2088A) { + enum boot_src src = get_boot_src(); + u8 sw; + + switch (src) { + case BOOT_SOURCE_IFC_NOR: + sw = QIXIS_READ(brdcfg[0]); + sw = (sw & 0x0f); + if (sw == 0) + cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR; + else if (sw == 4) + cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR_ALTBANK; + break; + case BOOT_SOURCE_QSPI_NOR: + /* Only one bank in QSPI */ + cortina_fw_addr = CORTINA_FW_ADDR_QSPI; + break; + default: + printf("WARNING: Boot source not found\n"); + } + } +#endif + return (ulong *)cortina_fw_addr; +} + int board_init(void) { #ifdef CONFIG_FSL_MC_ENET -- cgit From 8ae83cc5af56abe3334dbe48e03407f7ff641c24 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Tue, 10 Aug 2021 11:20:10 +0530 Subject: board: t208x: Extend cs4340_get_fw_addr() functionality T2080RDB supports booting from 2 nor banks(default and altbank). The corresponding defconfig can only have one entry defined and therefore, extend cs4340_get_fw_addr() function to overwrite firmware address which will be later used in cortina firmware. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- board/freescale/t208xrdb/t208xrdb.c | 20 ++++++++++++++++++++ board/freescale/t208xrdb/t208xrdb.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 947dd6aa9f3..73ebb4a55bf 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -165,3 +165,23 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } + +ulong *cs4340_get_fw_addr(void) +{ + ulong cortina_fw_addr = CONFIG_CORTINA_FW_ADDR; + +#ifdef CONFIG_SYS_CORTINA_FW_IN_NOR + u8 reg; + + reg = CPLD_READ(flash_csr); + if (!(reg & CPLD_BOOT_SEL)) { + reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT); + if (reg == 0) + cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR; + else if (reg == 4) + cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR_ALTBANK; + } +#endif + + return (ulong *)cortina_fw_addr; +} diff --git a/board/freescale/t208xrdb/t208xrdb.h b/board/freescale/t208xrdb/t208xrdb.h index edbc860c9d0..26998898e82 100644 --- a/board/freescale/t208xrdb/t208xrdb.h +++ b/board/freescale/t208xrdb/t208xrdb.h @@ -7,6 +7,9 @@ #ifndef __CORENET_DS_H__ #define __CORENET_DS_H__ +#define CORTINA_FW_ADDR_IFCNOR 0xefe00000 +#define CORTINA_FW_ADDR_IFCNOR_ALTBANK 0xebe00000 + void fdt_fixup_board_enet(void *blob); void pci_of_setup(void *blob, struct bd_info *bd); void fdt_fixup_board_fman_ethernet(void *blob); -- cgit From 3bd5ea566eeec9373c7413d383f02096f5f9aaa4 Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Tue, 10 Aug 2021 11:20:11 +0530 Subject: board: T4240rdb: Extend cs4340_get_fw_addr() functionality T4240RDB supports booting from 2 nor banks(default and altbank). The corresponding defconfig can only have one entry defined and therefore, extend cs4340_get_fw_addr() function to overwrite firmware address which will be later used in cortina firmware. Signed-off-by: Kuldeep Singh Reviewed-by: Priyanka Jain --- board/freescale/t4rdb/t4240rdb.c | 19 +++++++++++++++++++ board/freescale/t4rdb/t4rdb.h | 3 +++ 2 files changed, 22 insertions(+) diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c index 6ab35ca9185..20ce7523e57 100644 --- a/board/freescale/t4rdb/t4240rdb.c +++ b/board/freescale/t4rdb/t4240rdb.c @@ -151,3 +151,22 @@ void board_detail(void) break; } } + +ulong *cs4340_get_fw_addr(void) +{ + ulong cortina_fw_addr = CONFIG_CORTINA_FW_ADDR; + +#ifdef CONFIG_SYS_CORTINA_FW_IN_NOR + u8 sw; + + sw = CPLD_READ(vbank); + sw = sw & CPLD_BANK_SEL_MASK; + + if (sw == 0) + cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR; + else if (sw == 4) + cortina_fw_addr = CORTINA_FW_ADDR_IFCNOR_ALTBANK; +#endif + + return (ulong *)cortina_fw_addr; +} diff --git a/board/freescale/t4rdb/t4rdb.h b/board/freescale/t4rdb/t4rdb.h index 3f1fa7bbd24..06779f552fa 100644 --- a/board/freescale/t4rdb/t4rdb.h +++ b/board/freescale/t4rdb/t4rdb.h @@ -11,6 +11,9 @@ #define CONFIG_SYS_NUM_FM1_DTSEC 4 #define CONFIG_SYS_NUM_FM2_DTSEC 4 +#define CORTINA_FW_ADDR_IFCNOR 0xefe00000 +#define CORTINA_FW_ADDR_IFCNOR_ALTBANK 0xebf00000 + void fdt_fixup_board_enet(void *blob); void pci_of_setup(void *blob, struct bd_info *bd); -- cgit From cb0db5b948aacead6816873870d8f23b654b8a5f Mon Sep 17 00:00:00 2001 From: Horia Geantă Date: Tue, 10 Aug 2021 17:12:19 +0300 Subject: crypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversion MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit One of the "dma_addr_t" instances was left out when converting to "caam_dma_addr_t". Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64") Signed-off-by: Horia Geantă Reviewed-by: Priyanka Jain --- drivers/crypto/fsl/jobdesc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index d2354155318..c350b328561 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -300,7 +300,7 @@ void inline_cnstr_jobdesc_rng_deinstantiation(u32 *desc, int handle) void inline_cnstr_jobdesc_rng(u32 *desc, void *data_out, u32 size) { - dma_addr_t dma_data_out = virt_to_phys(data_out); + caam_dma_addr_t dma_data_out = virt_to_phys(data_out); init_job_desc(desc, 0); append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG | -- cgit From 760ca92d554e2ff340c9299aa8a71ab101145a81 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Wed, 18 Aug 2021 12:37:03 +0530 Subject: configs: lx2160a: load device-tree in RAM for distro boot Update boot-commands to load device-tree from boot-device at 'fdt_addr_r' address in DDR during distro-boot. Signed-off-by: Priyanka Jain --- include/configs/lx2160a_common.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 8977ee9de23..1ae7d37dd9f 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -180,6 +180,7 @@ unsigned long get_board_ddr_clk(void); #define XSPI_MC_INIT_CMD \ "sf probe 0:0 && " \ "sf read 0x80640000 0x640000 0x80000 && " \ + "sf read $fdt_addr_r 0xf00000 0x100000 && " \ "env exists secureboot && " \ "esbc_validate 0x80640000 && " \ "esbc_validate 0x80680000; " \ @@ -190,6 +191,7 @@ unsigned long get_board_ddr_clk(void); #define SD_MC_INIT_CMD \ "mmc read 0x80a00000 0x5000 0x1200;" \ "mmc read 0x80e00000 0x7000 0x800;" \ + "mmc read $fdt_addr_r 0x7800 0x800;" \ "env exists secureboot && " \ "mmc read 0x80640000 0x3200 0x20 && " \ "mmc read 0x80680000 0x3400 0x20 && " \ @@ -200,6 +202,7 @@ unsigned long get_board_ddr_clk(void); #define SD2_MC_INIT_CMD \ "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \ "mmc read 0x80e00000 0x7000 0x800;" \ + "mmc read $fdt_addr_r 0x7800 0x800;" \ "env exists secureboot && " \ "mmc read 0x80640000 0x3200 0x20 && " \ "mmc read 0x80680000 0x3400 0x20 && " \ -- cgit