From 213ed175b0a97313982c8341c34e48f0ea59b60e Mon Sep 17 00:00:00 2001 From: Zong Li Date: Wed, 1 Sep 2021 15:01:41 +0800 Subject: riscv: lib: implement enable_caches for sifive cache The enable_caches is a generic hook for architecture-implemented, we define this function to enable composable cache of sifive platforms. In sifive_cache, it invokes the generic cache_enable interface of cache uclass to execute the relative implementation in SiFive ccache driver. Signed-off-by: Zong Li Reviewed-by: Rick Chen --- arch/riscv/lib/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/riscv/lib/Makefile') diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index c4cc41434b0..06020fcc2ad 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o +obj-$(CONFIG_SIFIVE_CACHE) += sifive_cache.o ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint.o obj-$(CONFIG_ANDES_PLIC) += andes_plic.o -- cgit