/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2019 NXP * Copyright 2024 Gilles Talis */ #ifndef __IMX8MP_NAVQP_H #define __IMX8MP_NAVQP_H #include #include #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) #include /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x40000000 #define CFG_SYS_INIT_RAM_SIZE 0x80000 /* 8GB DDR */ #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0x140000000 /* 5 GB */ #endif